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media: verisilicon: change confusingly named relaxed register access
The register abstraction has wrappers around both the normal writel() and its writel_relaxed() counterpart, but this has led to a lot of users ending up with the relaxed version. There is sometimes a need to intentionally pick the relaxed accessor for performance critical functions, but I noticed that each hantro_reg_write() call also contains a non-relaxed readl(), which is typically much more expensive than a writel, so there is little benefit here but an added risk of missing a serialization against DMA. To make this behave like other interfaces, use the normal accessor by default and only provide the relaxed version as an alternative for performance critical code. hantro_postproc.c is the only place that used both the relaxed and normal writel, but this does not seem cricital either, so change it all to the normal ones. [hverkuil: fix function prototype alignment] Signed-off-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
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@ -441,14 +441,14 @@ static __always_inline void hantro_reg_write(struct hantro_dev *vpu,
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const struct hantro_reg *reg,
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u32 val)
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{
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vdpu_write_relaxed(vpu, vdpu_read_mask(vpu, reg, val), reg->base);
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vdpu_write(vpu, vdpu_read_mask(vpu, reg, val), reg->base);
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}
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static __always_inline void hantro_reg_write_s(struct hantro_dev *vpu,
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const struct hantro_reg *reg,
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u32 val)
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static __always_inline void hantro_reg_write_relaxed(struct hantro_dev *vpu,
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const struct hantro_reg *reg,
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u32 val)
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{
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vdpu_write(vpu, vdpu_read_mask(vpu, reg, val), reg->base);
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vdpu_write_relaxed(vpu, vdpu_read_mask(vpu, reg, val), reg->base);
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}
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void *hantro_get_ctrl(struct hantro_ctx *ctx, u32 id);
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@ -21,11 +21,11 @@
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val); \
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}
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#define HANTRO_PP_REG_WRITE_S(vpu, reg_name, val) \
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#define HANTRO_PP_REG_WRITE_RELAXED(vpu, reg_name, val) \
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{ \
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hantro_reg_write_s(vpu, \
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&hantro_g1_postproc_regs.reg_name, \
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val); \
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hantro_reg_write_relaxed(vpu, \
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&hantro_g1_postproc_regs.reg_name, \
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val); \
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}
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#define VPU_PP_IN_YUYV 0x0
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@ -72,7 +72,7 @@ static void hantro_postproc_g1_enable(struct hantro_ctx *ctx)
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dma_addr_t dst_dma;
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/* Turn on pipeline mode. Must be done first. */
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HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x1);
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HANTRO_PP_REG_WRITE(vpu, pipeline_en, 0x1);
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src_pp_fmt = VPU_PP_IN_NV12;
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@ -242,7 +242,7 @@ static void hantro_postproc_g1_disable(struct hantro_ctx *ctx)
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{
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struct hantro_dev *vpu = ctx->dev;
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HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x0);
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HANTRO_PP_REG_WRITE(vpu, pipeline_en, 0x0);
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}
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static void hantro_postproc_g2_disable(struct hantro_ctx *ctx)
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