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tg3: Adjust RSS ring allocation strategies
When multivector RSS is enabled, the first interrupt vector is only used to report link interrupts and error conditions. This patch changes the code so that rx and tx ring resources are not allocated for this vector. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -4804,7 +4804,8 @@ static irqreturn_t tg3_msi_1shot(int irq, void *dev_id)
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struct tg3 *tp = tnapi->tp;
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struct tg3 *tp = tnapi->tp;
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prefetch(tnapi->hw_status);
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prefetch(tnapi->hw_status);
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prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]);
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if (tnapi->rx_rcb)
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prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]);
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if (likely(!tg3_irq_sync(tp)))
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if (likely(!tg3_irq_sync(tp)))
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napi_schedule(&tnapi->napi);
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napi_schedule(&tnapi->napi);
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@ -4822,7 +4823,8 @@ static irqreturn_t tg3_msi(int irq, void *dev_id)
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struct tg3 *tp = tnapi->tp;
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struct tg3 *tp = tnapi->tp;
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prefetch(tnapi->hw_status);
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prefetch(tnapi->hw_status);
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prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]);
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if (tnapi->rx_rcb)
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prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]);
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/*
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/*
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* Writing any value to intr-mbox-0 clears PCI INTA# and
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* Writing any value to intr-mbox-0 clears PCI INTA# and
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* chip-internal interrupt pending events.
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* chip-internal interrupt pending events.
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@ -5765,6 +5767,9 @@ static void tg3_free_rings(struct tg3 *tp)
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for (j = 0; j < tp->irq_cnt; j++) {
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for (j = 0; j < tp->irq_cnt; j++) {
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struct tg3_napi *tnapi = &tp->napi[j];
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struct tg3_napi *tnapi = &tp->napi[j];
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if (!tnapi->tx_buffers)
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continue;
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for (i = 0; i < TG3_TX_RING_SIZE; ) {
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for (i = 0; i < TG3_TX_RING_SIZE; ) {
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struct tx_ring_info *txp;
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struct tx_ring_info *txp;
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struct sk_buff *skb;
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struct sk_buff *skb;
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@ -5815,10 +5820,12 @@ static int tg3_init_rings(struct tg3 *tp)
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tnapi->tx_prod = 0;
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tnapi->tx_prod = 0;
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tnapi->tx_cons = 0;
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tnapi->tx_cons = 0;
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memset(tnapi->tx_ring, 0, TG3_TX_RING_BYTES);
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if (tnapi->tx_ring)
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memset(tnapi->tx_ring, 0, TG3_TX_RING_BYTES);
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tnapi->rx_rcb_ptr = 0;
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tnapi->rx_rcb_ptr = 0;
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memset(tnapi->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
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if (tnapi->rx_rcb)
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memset(tnapi->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
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}
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}
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return tg3_rx_prodring_alloc(tp, &tp->prodring[0]);
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return tg3_rx_prodring_alloc(tp, &tp->prodring[0]);
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@ -5898,6 +5905,13 @@ static int tg3_alloc_consistent(struct tg3 *tp)
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memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE);
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memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE);
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/*
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* If multivector RSS is enabled, vector 0 does not handle
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* rx or tx interrupts. Don't allocate any resources for it.
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*/
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if (!i && (tp->tg3_flags3 & TG3_FLG3_ENABLE_RSS))
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continue;
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tnapi->rx_rcb = pci_alloc_consistent(tp->pdev,
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tnapi->rx_rcb = pci_alloc_consistent(tp->pdev,
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TG3_RX_RCB_RING_BYTES(tp),
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TG3_RX_RCB_RING_BYTES(tp),
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&tnapi->rx_rcb_mapping);
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&tnapi->rx_rcb_mapping);
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@ -10166,8 +10180,13 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
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struct tg3_napi *tnapi, *rnapi;
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struct tg3_napi *tnapi, *rnapi;
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struct tg3_rx_prodring_set *tpr = &tp->prodring[0];
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struct tg3_rx_prodring_set *tpr = &tp->prodring[0];
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tnapi = &tp->napi[0];
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if (tp->irq_cnt > 1) {
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rnapi = &tp->napi[0];
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tnapi = &tp->napi[1];
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rnapi = &tp->napi[1];
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} else {
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tnapi = &tp->napi[0];
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rnapi = &tp->napi[0];
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}
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coal_now = tnapi->coal_now | rnapi->coal_now;
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coal_now = tnapi->coal_now | rnapi->coal_now;
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if (loopback_mode == TG3_MAC_LOOPBACK) {
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if (loopback_mode == TG3_MAC_LOOPBACK) {
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