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net: phy: dp83867: add w/a for packet errors seen with short cables
Introduce the W/A for packet errors seen with short cables (<1m) between
two DP83867 PHYs.
The W/A recommended by DM requires FFE Equalizer Configuration tuning by
writing value 0x0E81 to DSP_FFE_CFG register (0x012C), surrounded by hard
and soft resets as follows:
write_reg(0x001F, 0x8000); //hard reset
write_reg(DSP_FFE_CFG, 0x0E81);
write_reg(0x001F, 0x4000); //soft reset
Since DP83867 PHY DM says "Changing this register to 0x0E81, will not
affect Long Cable performance.", enable the W/A by default.
Fixes: 2a10154abc
("net: phy: dp83867: Add TI dp83867 phy")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
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@ -44,6 +44,7 @@
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#define DP83867_STRAP_STS1 0x006E
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#define DP83867_STRAP_STS2 0x006f
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#define DP83867_RGMIIDCTL 0x0086
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#define DP83867_DSP_FFE_CFG 0x012c
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#define DP83867_RXFCFG 0x0134
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#define DP83867_RXFPMD1 0x0136
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#define DP83867_RXFPMD2 0x0137
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@ -941,8 +942,27 @@ static int dp83867_phy_reset(struct phy_device *phydev)
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usleep_range(10, 20);
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return phy_modify(phydev, MII_DP83867_PHYCTRL,
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err = phy_modify(phydev, MII_DP83867_PHYCTRL,
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DP83867_PHYCR_FORCE_LINK_GOOD, 0);
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if (err < 0)
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return err;
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/* Configure the DSP Feedforward Equalizer Configuration register to
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* improve short cable (< 1 meter) performance. This will not affect
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* long cable performance.
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*/
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err = phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_DSP_FFE_CFG,
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0x0e81);
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if (err < 0)
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return err;
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err = phy_write(phydev, DP83867_CTRL, DP83867_SW_RESTART);
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if (err < 0)
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return err;
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usleep_range(10, 20);
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return 0;
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}
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static void dp83867_link_change_notify(struct phy_device *phydev)
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