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x86: apic: Cleanup and simplify setup_local_APIC()
setup_local_APIC() is used to setup local APIC early during CPU initialization and already assumes that preemption is disabled on entry. However, The function unnecessarily disables and enables preemption and uses smp_processor_id() multiple times in and out of the nested preemption disabled section. This gives the wrong impression that the function might be able to handle being called with preemption enabled and/or migrated to another processor in the middle. Make it clear that the function is always called with preemption disabled, drop the confusing preemption disable block and call smp_processor_id() once at the beginning of the function. Signed-off-by: Tejun Heo <tj@kernel.org> Acked-by: Cyrill Gorcunov <gorcunov@gmail.com> Reviewed-by: Pekka Enberg <penberg@kernel.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: brgerst@gmail.com LKML-Reference: <4D00B3B9.7060702@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -1195,12 +1195,15 @@ static void __cpuinit lapic_setup_esr(void)
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oldvalue, value);
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}
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/**
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* setup_local_APIC - setup the local APIC
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*
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* Used to setup local APIC while initializing BSP or bringin up APs.
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* Always called with preemption disabled.
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*/
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void __cpuinit setup_local_APIC(void)
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{
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int cpu = smp_processor_id();
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unsigned int value, queued;
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int i, j, acked = 0;
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unsigned long long tsc = 0, ntsc;
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@ -1225,8 +1228,6 @@ void __cpuinit setup_local_APIC(void)
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#endif
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perf_events_lapic_init();
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preempt_disable();
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/*
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* Double-check whether this APIC is really registered.
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* This is meaningless in clustered apic mode, so we skip it.
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@ -1342,21 +1343,19 @@ void __cpuinit setup_local_APIC(void)
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* TODO: set up through-local-APIC from through-I/O-APIC? --macro
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*/
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value = apic_read(APIC_LVT0) & APIC_LVT_MASKED;
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if (!smp_processor_id() && (pic_mode || !value)) {
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if (!cpu && (pic_mode || !value)) {
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value = APIC_DM_EXTINT;
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apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n",
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smp_processor_id());
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apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", cpu);
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} else {
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value = APIC_DM_EXTINT | APIC_LVT_MASKED;
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apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n",
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smp_processor_id());
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apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", cpu);
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}
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apic_write(APIC_LVT0, value);
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/*
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* only the BP should see the LINT1 NMI signal, obviously.
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*/
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if (!smp_processor_id())
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if (!cpu)
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value = APIC_DM_NMI;
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else
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value = APIC_DM_NMI | APIC_LVT_MASKED;
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@ -1364,11 +1363,9 @@ void __cpuinit setup_local_APIC(void)
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value |= APIC_LVT_LEVEL_TRIGGER;
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apic_write(APIC_LVT1, value);
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preempt_enable();
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#ifdef CONFIG_X86_MCE_INTEL
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/* Recheck CMCI information after local APIC is up on CPU #0 */
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if (smp_processor_id() == 0)
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if (!cpu)
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cmci_recheck();
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#endif
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}
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