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soc/tegra: pmc: Wait for powergate state to change

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Currently, the function tegra_powergate_set() simply sets the desired
powergate state but does not wait for the state to change. In most cases
we should wait for the state to change before proceeding. Currently,
there is a case for Tegra114 and Tegra124 devices where we do not wait
when starting the secondary CPU as this is not necessary. However, this
is only done at boot time and so waiting here will only have a small
impact on boot time. Therefore, update tegra_powergate_set() to wait
when setting the powergate.

By adding this feature, we can also eliminate the polling loop from
tegra30_boot_secondary().

A function has been added for checking the status of the powergate and
so update the tegra_powergate_is_powered() to use this macro as well.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Jon Hunter 2016-02-26 15:48:40 +00:00 committed by Thierry Reding
parent bc9af23d31
commit 0a2d87e047
2 changed files with 11 additions and 14 deletions
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16
arch/arm/mach-tegra/platsmp.c
View File

@ -108,19 +108,9 @@ static int tegra30_boot_secondary(unsigned int cpu, struct task_struct *idle)
* be un-gated by un-toggling the power gate register
* manually.
*/
if (!tegra_pmc_cpu_is_powered(cpu)) {
ret = tegra_pmc_cpu_power_on(cpu);
if (ret)
return ret;
/* Wait for the power to come up. */
timeout = jiffies + msecs_to_jiffies(100);
while (!tegra_pmc_cpu_is_powered(cpu)) {
if (time_after(jiffies, timeout))
return -ETIMEDOUT;
udelay(10);
}
}
ret = tegra_pmc_cpu_power_on(cpu);
if (ret)
return ret;
remove_clamps:
/* CPU partition is powered. Enable the CPU clock. */

9
drivers/soc/tegra/pmc.c
View File

@ -28,6 +28,7 @@
#include <linux/export.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
@ -194,6 +195,9 @@ static inline bool tegra_powergate_is_valid(int id)
*/
static int tegra_powergate_set(unsigned int id, bool new_state)
{
bool status;
int err;
if (id == TEGRA_POWERGATE_3D && pmc->soc->has_gpu_clamps)
return -EINVAL;
@ -206,9 +210,12 @@ static int tegra_powergate_set(unsigned int id, bool new_state)
tegra_pmc_writel(PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE);
err = readx_poll_timeout(tegra_powergate_state, id, status,
status == new_state, 10, 100000);
mutex_unlock(&pmc->powergates_lock);
return 0;
return err;
}
/**