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usb: renesas_usbhs: fix usbhsf_fifo_clear() for RX direction
This patch fixes an issue that the usbhsf_fifo_clear() is possible
to cause 10 msec delay if the pipe is RX direction and empty because
the FRDY bit will never be set to 1 in such case.
Fixes: e8d548d549
("usb: renesas_usbhs: fifo became independent from pipe.")
Cc: <stable@vger.kernel.org> # v3.1+
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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@ -284,8 +284,17 @@ static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
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struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
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int ret = 0;
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if (!usbhs_pipe_is_dcp(pipe))
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ret = usbhsf_fifo_barrier(priv, fifo);
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if (!usbhs_pipe_is_dcp(pipe)) {
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/*
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* This driver checks the pipe condition first to avoid -EBUSY
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* from usbhsf_fifo_barrier() with about 10 msec delay in
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* the interrupt handler if the pipe is RX direction and empty.
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*/
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if (usbhs_pipe_is_dir_in(pipe))
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ret = usbhs_pipe_is_accessible(pipe);
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if (!ret)
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ret = usbhsf_fifo_barrier(priv, fifo);
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}
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/*
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* if non-DCP pipe, this driver should set BCLR when
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