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ARM: Consolidate clks_register() and similar
Most machine classes want some way to register a block of clk_lookup structures, and most do it by implementing a clks_register() type function which walks an array, or by open-coding a loop. Consolidate all this into clkdev_add_table(). Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -99,6 +99,16 @@ void clkdev_add(struct clk_lookup *cl)
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}
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EXPORT_SYMBOL(clkdev_add);
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void __init clkdev_add_table(struct clk_lookup *cl, size_t num)
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{
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mutex_lock(&clocks_mutex);
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while (num--) {
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list_add_tail(&cl->node, &clocks);
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cl++;
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}
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mutex_unlock(&clocks_mutex);
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}
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#define MAX_DEV_ID 20
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#define MAX_CON_ID 16
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@ -27,4 +27,7 @@ struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
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void clkdev_add(struct clk_lookup *cl);
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void clkdev_drop(struct clk_lookup *cl);
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void clkdev_add_table(struct clk_lookup *, size_t);
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int clk_add_alias(const char *, const char *, char *, struct device *);
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#endif
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@ -142,8 +142,7 @@ void __init bcmring_amba_init(void)
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chipcHw_busInterfaceClockEnable(bus_clock);
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for (i = 0; i < ARRAY_SIZE(lookups); i++)
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clkdev_add(&lookups[i]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
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struct amba_device *d = amba_devs[i];
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@ -445,7 +445,6 @@ static void __init ep93xx_dma_clock_init(void)
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static int __init ep93xx_clock_init(void)
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{
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u32 value;
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int i;
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value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
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if (!(value & 0x00800000)) { /* PLL1 bypassed? */
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@ -474,8 +473,7 @@ static int __init ep93xx_clock_init(void)
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clk_f.rate / 1000000, clk_h.rate / 1000000,
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clk_p.rate / 1000000);
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for (i = 0; i < ARRAY_SIZE(clocks); i++)
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clkdev_add(&clocks[i]);
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clkdev_add_table(clocks, ARRAY_SIZE(clocks));
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return 0;
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}
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arch_initcall(ep93xx_clock_init);
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@ -144,8 +144,7 @@ static int __init integrator_init(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(lookups); i++)
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clkdev_add(&lookups[i]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
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struct amba_device *d = amba_devs[i];
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@ -558,9 +558,7 @@ static void __init intcp_init(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(cp_lookups); i++)
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clkdev_add(&cp_lookups[i]);
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clkdev_add_table(cp_lookups, ARRAY_SIZE(cp_lookups));
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platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
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for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
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@ -88,11 +88,3 @@ unsigned long clk_get_rate(struct clk *clk)
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return rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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void clks_register(struct clk_lookup *clks, size_t num)
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{
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int i;
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for (i = 0; i < num; i++)
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clkdev_add(&clks[i]);
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}
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@ -68,5 +68,3 @@ struct clk clk_##_name = { \
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extern struct clk clk_pxa168_gpio;
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extern struct clk clk_pxa168_timers;
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extern void clks_register(struct clk_lookup *, size_t);
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@ -94,7 +94,7 @@ static int __init pxa168_init(void)
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mfp_init_base(MFPR_VIRT_BASE);
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mfp_init_addr(pxa168_mfp_addr_map);
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pxa_init_dma(IRQ_PXA168_DMA_INT0, 32);
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clks_register(ARRAY_AND_SIZE(pxa168_clkregs));
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clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs));
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}
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return 0;
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@ -131,7 +131,7 @@ static int __init pxa910_init(void)
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mfp_init_base(MFPR_VIRT_BASE);
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mfp_init_addr(pxa910_mfp_addr_map);
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pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);
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clks_register(ARRAY_AND_SIZE(pxa910_clkregs));
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clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs));
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}
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return 0;
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@ -570,7 +570,6 @@ static struct clk_lookup lookups[] __initdata = {
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int __init mx1_clocks_init(unsigned long fref)
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{
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unsigned int reg;
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int i;
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/* disable clocks we are able to */
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__raw_writel(0, SCM_GCCR);
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@ -592,8 +591,7 @@ int __init mx1_clocks_init(unsigned long fref)
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reg = (reg & CCM_CSCR_CLKO_MASK) >> CCM_CSCR_CLKO_OFFSET;
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clko_clk.parent = (struct clk *)clko_clocks[reg];
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for (i = 0; i < ARRAY_SIZE(lookups); i++)
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clkdev_add(&lookups[i]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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clk_enable(&hclk);
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clk_enable(&fclk);
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@ -968,7 +968,6 @@ static struct clk_lookup lookups[] = {
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*/
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int __init mx21_clocks_init(unsigned long lref, unsigned long href)
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{
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int i;
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u32 cscr;
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external_low_reference = lref;
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@ -986,8 +985,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
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else
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spll_clk.parent = &fpm_clk;
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for (i = 0; i < ARRAY_SIZE(lookups); i++)
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clkdev_add(&lookups[i]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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/* Turn off all clock gates */
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__raw_writel(0, CCM_PCCR0);
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@ -719,7 +719,6 @@ static void __init to2_adjust_clocks(void)
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int __init mx27_clocks_init(unsigned long fref)
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{
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u32 cscr = __raw_readl(CCM_CSCR);
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int i;
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external_high_reference = fref;
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@ -736,8 +735,7 @@ int __init mx27_clocks_init(unsigned long fref)
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to2_adjust_clocks();
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for (i = 0; i < ARRAY_SIZE(lookups); i++)
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clkdev_add(&lookups[i]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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/* Turn off all clocks we do not need */
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__raw_writel(0, CCM_PCCR0);
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@ -210,11 +210,7 @@ static struct clk_lookup lookups[] = {
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int __init mx25_clocks_init(unsigned long fref)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(lookups); i++)
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clkdev_add(&lookups[i]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
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return 0;
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@ -485,15 +485,13 @@ static struct clk_lookup lookups[] = {
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int __init mx35_clocks_init()
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{
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int i;
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unsigned int ll = 0;
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#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
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ll = (3 << 16);
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#endif
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for (i = 0; i < ARRAY_SIZE(lookups); i++)
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clkdev_add(&lookups[i]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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/* Turn off all clocks except the ones we need to survive, namely:
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* EMI, GPIO1/2/3, GPT, IOMUX, MAX and eventually uart
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@ -578,12 +578,10 @@ static struct clk_lookup lookups[] = {
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int __init mx31_clocks_init(unsigned long fref)
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{
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u32 reg;
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int i;
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ckih_rate = fref;
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for (i = 0; i < ARRAY_SIZE(lookups); i++)
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clkdev_add(&lookups[i]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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/* change the csi_clk parent if necessary */
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reg = __raw_readl(MXC_CCM_CCMR);
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@ -624,7 +624,6 @@ static struct clk_lookup lookups[] = {
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int __init mxc91231_clocks_init(unsigned long fref)
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{
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void __iomem *gpt_base;
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int i;
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ckih_rate = fref;
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@ -632,8 +631,7 @@ int __init mxc91231_clocks_init(unsigned long fref)
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sdhc_clk[0].parent = clk_sdhc_parent(&sdhc_clk[0]);
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sdhc_clk[1].parent = clk_sdhc_parent(&sdhc_clk[1]);
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for (i = 0; i < ARRAY_SIZE(lookups); i++)
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clkdev_add(&lookups[i]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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gpt_base = MXC91231_IO_ADDRESS(MXC91231_GPT1_BASE_ADDR);
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mxc_timer_init(&gpt_clk, gpt_base, MXC91231_INT_GPT);
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@ -78,11 +78,3 @@ const struct clkops clk_cken_ops = {
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.enable = clk_cken_enable,
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.disable = clk_cken_disable,
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};
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void clks_register(struct clk_lookup *clks, size_t num)
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{
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int i;
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for (i = 0; i < num; i++)
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clkdev_add(&clks[i]);
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}
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@ -67,7 +67,3 @@ extern void clk_pxa3xx_cken_enable(struct clk *);
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extern void clk_pxa3xx_cken_disable(struct clk *);
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#endif
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void clks_register(struct clk_lookup *clks, size_t num);
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int clk_add_alias(const char *alias, const char *alias_name, char *id,
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struct device *dev);
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@ -128,6 +128,6 @@ static struct clk_lookup eseries_clkregs[] = {
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void eseries_register_clks(void)
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{
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clks_register(eseries_clkregs, ARRAY_SIZE(eseries_clkregs));
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clkdev_add_table(eseries_clkregs, ARRAY_SIZE(eseries_clkregs));
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}
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@ -349,7 +349,7 @@ static int __init pxa25x_init(void)
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reset_status = RCSR;
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clks_register(pxa25x_clkregs, ARRAY_SIZE(pxa25x_clkregs));
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clkdev_add_table(pxa25x_clkregs, ARRAY_SIZE(pxa25x_clkregs));
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if ((ret = pxa_init_dma(IRQ_DMA, 16)))
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return ret;
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@ -370,7 +370,7 @@ static int __init pxa25x_init(void)
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/* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */
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if (cpu_is_pxa255())
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clks_register(&pxa25x_hwuart_clkreg, 1);
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clkdev_add(&pxa25x_hwuart_clkreg);
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return ret;
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}
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@ -392,7 +392,7 @@ static int __init pxa27x_init(void)
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reset_status = RCSR;
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clks_register(pxa27x_clkregs, ARRAY_SIZE(pxa27x_clkregs));
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clkdev_add_table(pxa27x_clkregs, ARRAY_SIZE(pxa27x_clkregs));
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if ((ret = pxa_init_dma(IRQ_DMA, 32)))
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return ret;
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@ -102,12 +102,12 @@ static int __init pxa300_init(void)
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if (cpu_is_pxa300() || cpu_is_pxa310()) {
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mfp_init_base(io_p2v(MFPR_BASE));
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mfp_init_addr(pxa300_mfp_addr_map);
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clks_register(ARRAY_AND_SIZE(common_clkregs));
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clkdev_add_table(ARRAY_AND_SIZE(common_clkregs));
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}
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if (cpu_is_pxa310()) {
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mfp_init_addr(pxa310_mfp_addr_map);
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clks_register(ARRAY_AND_SIZE(pxa310_clkregs));
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clkdev_add_table(ARRAY_AND_SIZE(pxa310_clkregs));
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}
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return 0;
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@ -90,7 +90,7 @@ static int __init pxa320_init(void)
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if (cpu_is_pxa320()) {
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mfp_init_base(io_p2v(MFPR_BASE));
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mfp_init_addr(pxa320_mfp_addr_map);
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clks_register(ARRAY_AND_SIZE(pxa320_clkregs));
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clkdev_add_table(ARRAY_AND_SIZE(pxa320_clkregs));
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}
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return 0;
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@ -634,7 +634,7 @@ static int __init pxa3xx_init(void)
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*/
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ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
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clks_register(pxa3xx_clkregs, ARRAY_SIZE(pxa3xx_clkregs));
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clkdev_add_table(pxa3xx_clkregs, ARRAY_SIZE(pxa3xx_clkregs));
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if ((ret = pxa_init_dma(IRQ_DMA, 32)))
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return ret;
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@ -346,10 +346,7 @@ static struct clk_lookup lookups[] = {
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static int __init clk_init(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(lookups); i++)
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clkdev_add(&lookups[i]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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return 0;
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}
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arch_initcall(clk_init);
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@ -1276,11 +1276,8 @@ static struct clk_lookup lookups[] = {
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static void __init clk_register(void)
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{
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int i;
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/* Register the lookups */
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for (i = 0; i < ARRAY_SIZE(lookups); i++)
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clkdev_add(&lookups[i]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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}
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/*
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@ -85,11 +85,8 @@ static struct clk_lookup lookups[] = {
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static int __init clk_init(void)
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{
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int i;
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/* register the clock lookups */
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for (i = 0; i < ARRAY_SIZE(lookups); i++)
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clkdev_add(&lookups[i]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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return 0;
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}
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arch_initcall(clk_init);
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@ -851,8 +851,7 @@ void __init versatile_init(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(lookups); i++)
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clkdev_add(&lookups[i]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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platform_device_register(&versatile_flash_device);
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platform_device_register(&versatile_i2c_device);
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@ -90,12 +90,3 @@ void nuc900_subclk_enable(struct clk *clk, int enable)
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__raw_writel(clken, W90X900_VA_CLKPWR + SUBCLK);
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}
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void clks_register(struct clk_lookup *clks, size_t num)
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{
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int i;
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for (i = 0; i < num; i++)
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clkdev_add(&clks[i]);
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}
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@ -14,7 +14,6 @@
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void nuc900_clk_enable(struct clk *clk, int enable);
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void nuc900_subclk_enable(struct clk *clk, int enable);
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void clks_register(struct clk_lookup *clks, size_t num);
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struct clk {
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unsigned long cken;
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@ -208,6 +208,6 @@ void __init nuc900_map_io(struct map_desc *mach_desc, int mach_size)
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void __init nuc900_init_clocks(void)
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{
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clks_register(nuc900_clkregs, ARRAY_SIZE(nuc900_clkregs));
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clkdev_add_table(nuc900_clkregs, ARRAY_SIZE(nuc900_clkregs));
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}
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@ -1126,9 +1126,8 @@ static int __init clk_init(void)
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if (ops && ops->set_parent)
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ops->set_parent(cl->clk, cl->clk->parent);
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}
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clkdev_add(cl);
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}
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clkdev_add_table(onchip_clks, ARRAY_SIZE(onchip_clks));
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return 0;
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}
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