Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-2.6

Conflicts:
	drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
This commit is contained in:
John W. Linville 2010-12-02 15:46:37 -05:00
commit 09f921f83f
21 changed files with 240 additions and 212 deletions

View File

@ -57,8 +57,11 @@
#define SUB_NUM_CTL_MODES_AT_5G_40 2 /* excluding HT40, EXT-OFDM */
#define SUB_NUM_CTL_MODES_AT_2G_40 3 /* excluding HT40, EXT-OFDM, EXT-CCK */
#define CTL(_tpower, _flag) ((_tpower) | ((_flag) << 6))
static int ar9003_hw_power_interpolate(int32_t x,
int32_t *px, int32_t *py, u_int16_t np);
static const struct ar9300_eeprom ar9300_default = {
.eepromVersion = 2,
.templateVersion = 2,
@ -296,21 +299,21 @@ static const struct ar9300_eeprom ar9300_default = {
}
},
.ctlPowerData_2G = {
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
{ { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
},
.modalHeader5G = {
/* 4 idle,t1,t2,b (4 bits per setting) */
@ -582,56 +585,56 @@ static const struct ar9300_eeprom ar9300_default = {
.ctlPowerData_5G = {
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 0}, {60, 1}, {60, 0}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 1},
CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
}
},
{
{
{60, 0}, {60, 1}, {60, 1}, {60, 0},
{60, 1}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 0},
{60, 0}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 1},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
}
},
{
{
{60, 1}, {60, 1}, {60, 0}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 0}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 0}, {60, 1},
CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
}
},
}
@ -873,21 +876,21 @@ static const struct ar9300_eeprom ar9300_x113 = {
}
},
.ctlPowerData_2G = {
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
{ { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
},
.modalHeader5G = {
/* 4 idle,t1,t2,b (4 bits per setting) */
@ -1159,56 +1162,56 @@ static const struct ar9300_eeprom ar9300_x113 = {
.ctlPowerData_5G = {
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 0}, {60, 1}, {60, 0}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 1},
CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
}
},
{
{
{60, 0}, {60, 1}, {60, 1}, {60, 0},
{60, 1}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 0},
{60, 0}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 1},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
}
},
{
{
{60, 1}, {60, 1}, {60, 0}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 0}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 0}, {60, 1},
CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
}
},
}
@ -1451,21 +1454,21 @@ static const struct ar9300_eeprom ar9300_h112 = {
}
},
.ctlPowerData_2G = {
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
{ { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
},
.modalHeader5G = {
/* 4 idle,t1,t2,b (4 bits per setting) */
@ -1737,56 +1740,56 @@ static const struct ar9300_eeprom ar9300_h112 = {
.ctlPowerData_5G = {
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 0}, {60, 1}, {60, 0}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 1},
CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
}
},
{
{
{60, 0}, {60, 1}, {60, 1}, {60, 0},
{60, 1}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 0},
{60, 0}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 1},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
}
},
{
{
{60, 1}, {60, 1}, {60, 0}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 0}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 0}, {60, 1},
CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
}
},
}
@ -2029,21 +2032,21 @@ static const struct ar9300_eeprom ar9300_x112 = {
}
},
.ctlPowerData_2G = {
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
{ { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
},
.modalHeader5G = {
/* 4 idle,t1,t2,b (4 bits per setting) */
@ -2315,56 +2318,56 @@ static const struct ar9300_eeprom ar9300_x112 = {
.ctlPowerData_5G = {
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 0}, {60, 1}, {60, 0}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 1},
CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
}
},
{
{
{60, 0}, {60, 1}, {60, 1}, {60, 0},
{60, 1}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 0},
{60, 0}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 1},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
}
},
{
{
{60, 1}, {60, 1}, {60, 0}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 0}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 0}, {60, 1},
CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
}
},
}
@ -2606,21 +2609,21 @@ static const struct ar9300_eeprom ar9300_h116 = {
}
},
.ctlPowerData_2G = {
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
{ { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
{ { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
},
.modalHeader5G = {
/* 4 idle,t1,t2,b (4 bits per setting) */
@ -2892,56 +2895,56 @@ static const struct ar9300_eeprom ar9300_h116 = {
.ctlPowerData_5G = {
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 0}, {60, 1}, {60, 0}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 1},
CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
}
},
{
{
{60, 0}, {60, 1}, {60, 1}, {60, 0},
{60, 1}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 0},
{60, 0}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 0}, {60, 0}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 1}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 1},
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
}
},
{
{
{60, 1}, {60, 1}, {60, 0}, {60, 1},
{60, 1}, {60, 1}, {60, 1}, {60, 0},
CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
}
},
{
{
{60, 1}, {60, 0}, {60, 1}, {60, 1},
{60, 1}, {60, 1}, {60, 0}, {60, 1},
CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
}
},
}
@ -4365,9 +4368,9 @@ static u16 ar9003_hw_get_direct_edge_power(struct ar9300_eeprom *eep,
struct cal_ctl_data_5g *ctl_5g = eep->ctlPowerData_5G;
if (is2GHz)
return ctl_2g[idx].ctlEdges[edge].tPower;
return CTL_EDGE_TPOWER(ctl_2g[idx].ctlEdges[edge]);
else
return ctl_5g[idx].ctlEdges[edge].tPower;
return CTL_EDGE_TPOWER(ctl_5g[idx].ctlEdges[edge]);
}
static u16 ar9003_hw_get_indirect_edge_power(struct ar9300_eeprom *eep,
@ -4385,12 +4388,12 @@ static u16 ar9003_hw_get_indirect_edge_power(struct ar9300_eeprom *eep,
if (is2GHz) {
if (ath9k_hw_fbin2freq(ctl_freqbin[edge - 1], 1) < freq &&
ctl_2g[idx].ctlEdges[edge - 1].flag)
return ctl_2g[idx].ctlEdges[edge - 1].tPower;
CTL_EDGE_FLAGS(ctl_2g[idx].ctlEdges[edge - 1]))
return CTL_EDGE_TPOWER(ctl_2g[idx].ctlEdges[edge - 1]);
} else {
if (ath9k_hw_fbin2freq(ctl_freqbin[edge - 1], 0) < freq &&
ctl_5g[idx].ctlEdges[edge - 1].flag)
return ctl_5g[idx].ctlEdges[edge - 1].tPower;
CTL_EDGE_FLAGS(ctl_5g[idx].ctlEdges[edge - 1]))
return CTL_EDGE_TPOWER(ctl_5g[idx].ctlEdges[edge - 1]);
}
return AR9300_MAX_RATE_POWER;

View File

@ -270,17 +270,12 @@ struct cal_tgt_pow_ht {
u8 tPow2x[14];
} __packed;
struct cal_ctl_edge_pwr {
u8 tPower:6,
flag:2;
} __packed;
struct cal_ctl_data_2g {
struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_2G];
u8 ctlEdges[AR9300_NUM_BAND_EDGES_2G];
} __packed;
struct cal_ctl_data_5g {
struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_5G];
u8 ctlEdges[AR9300_NUM_BAND_EDGES_5G];
} __packed;
struct ar9300_BaseExtension_1 {

View File

@ -21,6 +21,7 @@
#include <linux/device.h>
#include <linux/leds.h>
#include <linux/completion.h>
#include <linux/pm_qos_params.h>
#include "debug.h"
#include "common.h"
@ -629,6 +630,8 @@ struct ath_softc {
struct ath_descdma txsdma;
struct ath_ant_comb ant_comb;
struct pm_qos_request_list pm_qos_req;
};
struct ath_wiphy {
@ -658,7 +661,6 @@ static inline void ath_read_cachesize(struct ath_common *common, int *csz)
}
extern struct ieee80211_ops ath9k_ops;
extern struct pm_qos_request_list ath9k_pm_qos_req;
extern int modparam_nohwcrypt;
extern int led_blink;

View File

@ -240,16 +240,16 @@ u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower,
for (i = 0; (i < num_band_edges) &&
(pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) {
twiceMaxEdgePower = pRdEdgesPower[i].tPower;
twiceMaxEdgePower = CTL_EDGE_TPOWER(pRdEdgesPower[i].ctl);
break;
} else if ((i > 0) &&
(freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel,
is2GHz))) {
if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel,
is2GHz) < freq &&
pRdEdgesPower[i - 1].flag) {
CTL_EDGE_FLAGS(pRdEdgesPower[i - 1].ctl)) {
twiceMaxEdgePower =
pRdEdgesPower[i - 1].tPower;
CTL_EDGE_TPOWER(pRdEdgesPower[i - 1].ctl);
}
break;
}

View File

@ -233,6 +233,18 @@
#define AR9287_CHECKSUM_LOCATION (AR9287_EEP_START_LOC + 1)
#define CTL_EDGE_TPOWER(_ctl) ((_ctl) & 0x3f)
#define CTL_EDGE_FLAGS(_ctl) (((_ctl) >> 6) & 0x03)
#define LNA_CTL_BUF_MODE BIT(0)
#define LNA_CTL_ISEL_LO BIT(1)
#define LNA_CTL_ISEL_HI BIT(2)
#define LNA_CTL_BUF_IN BIT(3)
#define LNA_CTL_FEM_BAND BIT(4)
#define LNA_CTL_LOCAL_BIAS BIT(5)
#define LNA_CTL_FORCE_XPA BIT(6)
#define LNA_CTL_USE_ANT1 BIT(7)
enum eeprom_param {
EEP_NFTHRESH_5,
EEP_NFTHRESH_2,
@ -379,10 +391,7 @@ struct modal_eep_header {
u8 xatten2Margin[AR5416_MAX_CHAINS];
u8 ob_ch1;
u8 db_ch1;
u8 useAnt1:1,
force_xpaon:1,
local_bias:1,
femBandSelectUsed:1, xlnabufin:1, xlnaisel:2, xlnabufmode:1;
u8 lna_ctl;
u8 miscBits;
u16 xpaBiasLvlFreq[3];
u8 futureModal[6];
@ -536,18 +545,10 @@ struct cal_target_power_ht {
u8 tPow2x[8];
} __packed;
#ifdef __BIG_ENDIAN_BITFIELD
struct cal_ctl_edges {
u8 bChannel;
u8 flag:2, tPower:6;
u8 ctl;
} __packed;
#else
struct cal_ctl_edges {
u8 bChannel;
u8 tPower:6, flag:2;
} __packed;
#endif
struct cal_data_op_loop_ar9287 {
u8 pwrPdg[2][5];

View File

@ -451,9 +451,10 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
ath9k_hw_analog_shift_rmw(ah, AR_AN_TOP2,
AR_AN_TOP2_LOCALBIAS,
AR_AN_TOP2_LOCALBIAS_S,
pModal->local_bias);
!!(pModal->lna_ctl &
LNA_CTL_LOCAL_BIAS));
REG_RMW_FIELD(ah, AR_PHY_XPA_CFG, AR_PHY_FORCE_XPA_CFG,
pModal->force_xpaon);
!!(pModal->lna_ctl & LNA_CTL_FORCE_XPA));
}
REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH,
@ -1435,8 +1436,8 @@ static u8 ath9k_hw_def_get_num_ant_config(struct ath_hw *ah,
num_ant_config = 1;
if (pBase->version >= 0x0E0D)
if (pModal->useAnt1)
if (pBase->version >= 0x0E0D &&
(pModal->lna_ctl & LNA_CTL_USE_ANT1))
num_ant_config += 1;
return num_ant_config;

View File

@ -2051,7 +2051,8 @@ u32 ath9k_hw_gpio_get(struct ath_hw *ah, u32 gpio)
val = REG_READ(ah, AR7010_GPIO_IN);
return (MS(val, AR7010_GPIO_IN_VAL) & AR_GPIO_BIT(gpio)) == 0;
} else if (AR_SREV_9300_20_OR_LATER(ah))
return MS_REG_READ(AR9300, gpio) != 0;
return (MS(REG_READ(ah, AR_GPIO_IN), AR9300_GPIO_IN_VAL) &
AR_GPIO_BIT(gpio)) != 0;
else if (AR_SREV_9271(ah))
return MS_REG_READ(AR9271, gpio) != 0;
else if (AR_SREV_9287_11_OR_LATER(ah))

View File

@ -15,7 +15,6 @@
*/
#include <linux/slab.h>
#include <linux/pm_qos_params.h>
#include "ath9k.h"
@ -184,8 +183,6 @@ static const struct ath_ops ath9k_common_ops = {
.write = ath9k_iowrite32,
};
struct pm_qos_request_list ath9k_pm_qos_req;
/**************************/
/* Initialization */
/**************************/
@ -653,6 +650,8 @@ void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
hw->flags |= IEEE80211_HW_MFP_CAPABLE;
hw->wiphy->interface_modes =
BIT(NL80211_IFTYPE_P2P_GO) |
BIT(NL80211_IFTYPE_P2P_CLIENT) |
BIT(NL80211_IFTYPE_AP) |
BIT(NL80211_IFTYPE_WDS) |
BIT(NL80211_IFTYPE_STATION) |
@ -759,7 +758,7 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
ath_init_leds(sc);
ath_start_rfkill_poll(sc);
pm_qos_add_request(&ath9k_pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
pm_qos_add_request(&sc->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
PM_QOS_DEFAULT_VALUE);
return 0;
@ -829,7 +828,7 @@ void ath9k_deinit_device(struct ath_softc *sc)
}
ieee80211_unregister_hw(hw);
pm_qos_remove_request(&ath9k_pm_qos_req);
pm_qos_remove_request(&sc->pm_qos_req);
ath_rx_cleanup(sc);
ath_tx_cleanup(sc);
ath9k_deinit_softc(sc);

View File

@ -15,7 +15,6 @@
*/
#include <linux/nl80211.h>
#include <linux/pm_qos_params.h>
#include "ath9k.h"
#include "btcoex.h"
@ -1187,7 +1186,7 @@ static int ath9k_start(struct ieee80211_hw *hw)
ath9k_btcoex_timer_resume(sc);
}
pm_qos_update_request(&ath9k_pm_qos_req, 55);
pm_qos_update_request(&sc->pm_qos_req, 55);
mutex_unlock:
mutex_unlock(&sc->mutex);
@ -1342,7 +1341,7 @@ static void ath9k_stop(struct ieee80211_hw *hw)
sc->sc_flags |= SC_OP_INVALID;
pm_qos_update_request(&ath9k_pm_qos_req, PM_QOS_DEFAULT_VALUE);
pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
mutex_unlock(&sc->mutex);
@ -1439,6 +1438,7 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw,
struct ath_softc *sc = aphy->sc;
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
struct ath_vif *avp = (void *)vif->drv_priv;
bool bs_valid = false;
int i;
ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
@ -1467,7 +1467,15 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw,
"slot\n", __func__);
sc->beacon.bslot[i] = NULL;
sc->beacon.bslot_aphy[i] = NULL;
} else if (sc->beacon.bslot[i])
bs_valid = true;
}
if (!bs_valid && (sc->sc_ah->imask & ATH9K_INT_SWBA)) {
/* Disable SWBA interrupt */
sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
ath9k_ps_wakeup(sc);
ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
ath9k_ps_restore(sc);
}
sc->nvifs--;

View File

@ -976,11 +976,13 @@ enum {
#define AR9287_GPIO_IN_VAL_S 11
#define AR9271_GPIO_IN_VAL 0xFFFF0000
#define AR9271_GPIO_IN_VAL_S 16
#define AR9300_GPIO_IN_VAL 0x0001FFFF
#define AR9300_GPIO_IN_VAL_S 0
#define AR7010_GPIO_IN_VAL 0x0000FFFF
#define AR7010_GPIO_IN_VAL_S 0
#define AR_GPIO_IN 0x404c
#define AR9300_GPIO_IN_VAL 0x0001FFFF
#define AR9300_GPIO_IN_VAL_S 0
#define AR_GPIO_OE_OUT (AR_SREV_9300_20_OR_LATER(ah) ? 0x4050 : 0x404c)
#define AR_GPIO_OE_OUT_DRV 0x3
#define AR_GPIO_OE_OUT_DRV_NO 0x0

View File

@ -291,7 +291,8 @@ static int carl9170_fw(struct ar9170 *ar, const __u8 *data, size_t len)
if (SUPP(CARL9170FW_WLANTX_CAB)) {
ar->hw->wiphy->interface_modes |=
BIT(NL80211_IFTYPE_AP);
BIT(NL80211_IFTYPE_AP) |
BIT(NL80211_IFTYPE_P2P_GO);
}
}

View File

@ -1648,7 +1648,8 @@ void *carl9170_alloc(size_t priv_size)
* supports these modes. The code which will add the
* additional interface_modes is in fw.c.
*/
hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
BIT(NL80211_IFTYPE_P2P_CLIENT);
hw->flags |= IEEE80211_HW_RX_INCLUDES_FCS |
IEEE80211_HW_REPORTS_TX_ACK_STATUS |

View File

@ -867,7 +867,7 @@ static int carl9170_tx_prepare(struct ar9170 *ar, struct sk_buff *skb)
mac_tmp = cpu_to_le16(AR9170_TX_MAC_HW_DURATION |
AR9170_TX_MAC_BACKOFF);
mac_tmp |= cpu_to_le16((hw_queue << AR9170_TX_MAC_QOS_S) &&
mac_tmp |= cpu_to_le16((hw_queue << AR9170_TX_MAC_QOS_S) &
AR9170_TX_MAC_QOS);
no_ack = !!(info->flags & IEEE80211_TX_CTL_NO_ACK);

View File

@ -1170,7 +1170,6 @@ static void if_sdio_remove(struct sdio_func *func)
lbs_deb_sdio("call remove card\n");
lbs_stop_card(card->priv);
lbs_remove_card(card->priv);
card->priv->surpriseremoved = 1;
flush_workqueue(card->workqueue);
destroy_workqueue(card->workqueue);

View File

@ -1055,7 +1055,6 @@ static int __devexit libertas_spi_remove(struct spi_device *spi)
lbs_stop_card(priv);
lbs_remove_card(priv); /* will call free_netdev */
priv->surpriseremoved = 1;
free_irq(spi->irq, card);
if_spi_terminate_spi_thread(card);
if (card->pdata->teardown)

View File

@ -916,8 +916,6 @@ void lbs_remove_card(struct lbs_private *priv)
lbs_free_adapter(priv);
lbs_cfg_free(priv);
priv->dev = NULL;
free_netdev(dev);
lbs_deb_leave(LBS_DEB_MAIN);

View File

@ -1392,10 +1392,9 @@ static void orinoco_process_scan_results(struct work_struct *work)
orinoco_add_hostscan_results(priv, buf, len);
kfree(buf);
} else if (priv->scan_request) {
} else {
/* Either abort or complete the scan */
cfg80211_scan_done(priv->scan_request, (len < 0));
priv->scan_request = NULL;
orinoco_scan_done(priv, (len < 0));
}
spin_lock_irqsave(&priv->scan_lock, flags);
@ -1684,6 +1683,8 @@ static int __orinoco_down(struct orinoco_private *priv)
hermes_write_regn(hw, EVACK, 0xffff);
}
orinoco_scan_done(priv, true);
/* firmware will have to reassociate */
netif_carrier_off(dev);
priv->last_linkstatus = 0xffff;
@ -1762,10 +1763,7 @@ void orinoco_reset(struct work_struct *work)
orinoco_unlock(priv, &flags);
/* Scanning support: Notify scan cancellation */
if (priv->scan_request) {
cfg80211_scan_done(priv->scan_request, 1);
priv->scan_request = NULL;
}
orinoco_scan_done(priv, true);
if (priv->hard_reset) {
err = (*priv->hard_reset)(priv);

View File

@ -229,3 +229,11 @@ void orinoco_add_hostscan_results(struct orinoco_private *priv,
priv->scan_request = NULL;
}
}
void orinoco_scan_done(struct orinoco_private *priv, bool abort)
{
if (priv->scan_request) {
cfg80211_scan_done(priv->scan_request, abort);
priv->scan_request = NULL;
}
}

View File

@ -16,5 +16,6 @@ void orinoco_add_extscan_result(struct orinoco_private *priv,
void orinoco_add_hostscan_results(struct orinoco_private *dev,
unsigned char *buf,
size_t len);
void orinoco_scan_done(struct orinoco_private *priv, bool abort);
#endif /* _ORINOCO_SCAN_H_ */

View File

@ -2254,6 +2254,10 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_data *rx)
break;
case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
if (is_multicast_ether_addr(mgmt->da) &&
!is_broadcast_ether_addr(mgmt->da))
return RX_DROP_MONITOR;
/* process only for station */
if (sdata->vif.type != NL80211_IFTYPE_STATION)
return RX_DROP_MONITOR;
@ -2747,6 +2751,7 @@ static void __ieee80211_rx_handle_packet(struct ieee80211_hw *hw,
if (ieee80211_prepare_and_rx_handle(&rx, skb, true))
return;
goto out;
}
}
@ -2786,6 +2791,7 @@ static void __ieee80211_rx_handle_packet(struct ieee80211_hw *hw,
return;
}
out:
dev_kfree_skb(skb);
}

View File

@ -1595,7 +1595,12 @@ static void ieee80211_xmit(struct ieee80211_sub_if_data *sdata,
list) {
if (!ieee80211_sdata_running(tmp_sdata))
continue;
if (tmp_sdata->vif.type != NL80211_IFTYPE_AP)
if (tmp_sdata->vif.type ==
NL80211_IFTYPE_MONITOR ||
tmp_sdata->vif.type ==
NL80211_IFTYPE_AP_VLAN ||
tmp_sdata->vif.type ==
NL80211_IFTYPE_WDS)
continue;
if (compare_ether_addr(tmp_sdata->vif.addr,
hdr->addr2) == 0) {