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xtensa: use register window specific opcodes only when present

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xtensa core may be configured without register windows support, don't
use register window specific opcodes in that case. Use window register
specific opcodes to initialize hardware or reset core to a known state
regardless of the chosen ABI.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2021-07-26 07:25:28 -07:00
parent 0b5372570b
commit 09af39f649
5 changed files with 10 additions and 2 deletions
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2
arch/xtensa/boot/boot-elf/bootstrap.S
View File

@ -42,12 +42,14 @@ _bootparam:
.align 4
_SetupMMU:
#if XCHAL_HAVE_WINDOWED
movi a0, 0
wsr a0, windowbase
rsync
movi a0, 1
wsr a0, windowstart
rsync
#endif
movi a0, 0x1F
wsr a0, ps
rsync

4
arch/xtensa/boot/boot-redboot/bootstrap.S
View File

@ -56,13 +56,13 @@ _start:
movi a4, 1
wsr a4, ps
rsync
#if XCHAL_HAVE_WINDOWED
rsr a5, windowbase
ssl a5
sll a4, a4
wsr a4, windowstart
rsync
#endif
movi a4, KERNEL_PS_WOE_MASK
wsr a4, ps
rsync

2
arch/xtensa/kernel/align.S
View File

@ -58,7 +58,9 @@
* BE shift left / mask 0 0 X X
*/
#if XCHAL_HAVE_WINDOWED
#define UNALIGNED_USER_EXCEPTION
#endif
#if XCHAL_HAVE_BE

2
arch/xtensa/kernel/entry.S
View File

@ -940,12 +940,14 @@ unrecoverable_text:
ENTRY(unrecoverable_exception)
#if XCHAL_HAVE_WINDOWED
movi a0, 1
movi a1, 0
wsr a0, windowstart
wsr a1, windowbase
rsync
#endif
movi a1, KERNEL_PS_WOE_MASK | LOCKLEVEL
wsr a1, ps

2
arch/xtensa/kernel/head.S
View File

@ -67,11 +67,13 @@ _SetupOCD:
* xt-gdb to single step via DEBUG exceptions received directly
* by ocd.
*/
#if XCHAL_HAVE_WINDOWED
movi a1, 1
movi a0, 0
wsr a1, windowstart
wsr a0, windowbase
rsync
#endif
movi a1, LOCKLEVEL
wsr a1, ps