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MIPS: BCM63XX: enable SPI controller for BCM6362
The SPI controller shares the same register layout as the 6358 one. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5010/ Acked-by: John Crispin <blogic@openwrt.org>
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@ -196,6 +196,8 @@ static void spi_set(struct clk *clk, int enable)
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mask = CKCTL_6348_SPI_EN;
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else if (BCMCPU_IS_6358())
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mask = CKCTL_6358_SPI_EN;
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else if (BCMCPU_IS_6362())
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mask = CKCTL_6362_SPI_EN;
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else
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/* BCMCPU_IS_6368 */
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mask = CKCTL_6368_SPI_EN;
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@ -37,7 +37,7 @@ static __init void bcm63xx_spi_regs_init(void)
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{
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if (BCMCPU_IS_6338() || BCMCPU_IS_6348())
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bcm63xx_regs_spi = bcm6348_regs_spi;
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if (BCMCPU_IS_6358() || BCMCPU_IS_6368())
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if (BCMCPU_IS_6358() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
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bcm63xx_regs_spi = bcm6358_regs_spi;
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}
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#else
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@ -98,7 +98,7 @@ int __init bcm63xx_spi_register(void)
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spi_pdata.msg_ctl_width = SPI_6348_MSG_CTL_WIDTH;
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}
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if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
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if (BCMCPU_IS_6358() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
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spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
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spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
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spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT;
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@ -75,7 +75,8 @@ static inline unsigned long bcm63xx_spireg(enum bcm63xx_regs_spi reg)
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#if defined(CONFIG_BCM63XX_CPU_6338) || defined(CONFIG_BCM63XX_CPU_6348)
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__GEN_SPI_RSET(6348)
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#endif
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#if defined(CONFIG_BCM63XX_CPU_6358) || defined(CONFIG_BCM63XX_CPU_6368)
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#if defined(CONFIG_BCM63XX_CPU_6358) || defined(CONFIG_BCM63XX_CPU_6362) || \
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defined(CONFIG_BCM63XX_CPU_6368)
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__GEN_SPI_RSET(6358)
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#endif
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#endif
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