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x86/apic: Drop apic::delivery_mode

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This field is set to APIC_DELIVERY_MODE_FIXED in all cases, and is read
exactly once.  Fold the constant in uv_program_mmr() and drop the field.

Searching for the origin of the stale HyperV comment reveals commit
a31e58e129 ("x86/apic: Switch all APICs to Fixed delivery mode") which
notes:

  As a consequence of this change, the apic::irq_delivery_mode field is
  now pointless, but this needs to be cleaned up in a separate patch.

6 years is long enough for this technical debt to have survived.

  [ bp: Fold in
    https://lore.kernel.org/r/20231121123034.1442059-1-andrew.cooper3@citrix.com
  ]

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Steve Wahl <steve.wahl@hpe.com>
Link: https://lore.kernel.org/r/20231102-x86-apic-v1-1-bf049a2a0ed6@citrix.com
This commit is contained in:
Andrew Cooper 2023-11-02 12:26:19 +00:00 committed by Borislav Petkov (AMD)
parent 98b1cc82c4
commit 07e8f88568
13 changed files with 4 additions and 23 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/x86/include/asm/apic.h
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@ -272,8 +272,6 @@ struct apic {
void (*send_IPI_all)(int vector); void (*send_IPI_all)(int vector);
void (*send_IPI_self)(int vector); void (*send_IPI_self)(int vector);
enum apic_delivery_modes delivery_mode;
u32 disable_esr : 1, u32 disable_esr : 1,
dest_mode_logical : 1, dest_mode_logical : 1,
x2apic_set_max_apicid : 1, x2apic_set_max_apicid : 1,

2
arch/x86/kernel/apic/apic_flat_64.c
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@ -82,7 +82,6 @@ static struct apic apic_flat __ro_after_init = {
.acpi_madt_oem_check = flat_acpi_madt_oem_check, .acpi_madt_oem_check = flat_acpi_madt_oem_check,
.apic_id_registered = default_apic_id_registered, .apic_id_registered = default_apic_id_registered,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.dest_mode_logical = true, .dest_mode_logical = true,
.disable_esr = 0, .disable_esr = 0,
@ -154,7 +153,6 @@ static struct apic apic_physflat __ro_after_init = {
.acpi_madt_oem_check = physflat_acpi_madt_oem_check, .acpi_madt_oem_check = physflat_acpi_madt_oem_check,
.apic_id_registered = default_apic_id_registered, .apic_id_registered = default_apic_id_registered,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.dest_mode_logical = false, .dest_mode_logical = false,
.disable_esr = 0, .disable_esr = 0,

1
arch/x86/kernel/apic/apic_noop.c
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@ -47,7 +47,6 @@ static void noop_apic_write(u32 reg, u32 val)
struct apic apic_noop __ro_after_init = { struct apic apic_noop __ro_after_init = {
.name = "noop", .name = "noop",
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.dest_mode_logical = true, .dest_mode_logical = true,
.disable_esr = 0, .disable_esr = 0,

2
arch/x86/kernel/apic/apic_numachip.c
View File

@ -222,7 +222,6 @@ static const struct apic apic_numachip1 __refconst = {
.probe = numachip1_probe, .probe = numachip1_probe,
.acpi_madt_oem_check = numachip1_acpi_madt_oem_check, .acpi_madt_oem_check = numachip1_acpi_madt_oem_check,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.dest_mode_logical = false, .dest_mode_logical = false,
.disable_esr = 0, .disable_esr = 0,
@ -259,7 +258,6 @@ static const struct apic apic_numachip2 __refconst = {
.probe = numachip2_probe, .probe = numachip2_probe,
.acpi_madt_oem_check = numachip2_acpi_madt_oem_check, .acpi_madt_oem_check = numachip2_acpi_madt_oem_check,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.dest_mode_logical = false, .dest_mode_logical = false,
.disable_esr = 0, .disable_esr = 0,

1
arch/x86/kernel/apic/bigsmp_32.c
View File

@ -80,7 +80,6 @@ static struct apic apic_bigsmp __ro_after_init = {
.name = "bigsmp", .name = "bigsmp",
.probe = probe_bigsmp, .probe = probe_bigsmp,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.dest_mode_logical = false, .dest_mode_logical = false,
.disable_esr = 1, .disable_esr = 1,

1
arch/x86/kernel/apic/probe_32.c
View File

@ -45,7 +45,6 @@ static struct apic apic_default __ro_after_init = {
.probe = probe_default, .probe = probe_default,
.apic_id_registered = default_apic_id_registered, .apic_id_registered = default_apic_id_registered,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.dest_mode_logical = true, .dest_mode_logical = true,
.disable_esr = 0, .disable_esr = 0,

1
arch/x86/kernel/apic/x2apic_cluster.c
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@ -227,7 +227,6 @@ static struct apic apic_x2apic_cluster __ro_after_init = {
.probe = x2apic_cluster_probe, .probe = x2apic_cluster_probe,
.acpi_madt_oem_check = x2apic_acpi_madt_oem_check, .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.dest_mode_logical = true, .dest_mode_logical = true,
.disable_esr = 0, .disable_esr = 0,

1
arch/x86/kernel/apic/x2apic_phys.c
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@ -145,7 +145,6 @@ static struct apic apic_x2apic_phys __ro_after_init = {
.probe = x2apic_phys_probe, .probe = x2apic_phys_probe,
.acpi_madt_oem_check = x2apic_acpi_madt_oem_check, .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.dest_mode_logical = false, .dest_mode_logical = false,
.disable_esr = 0, .disable_esr = 0,

1
arch/x86/kernel/apic/x2apic_uv_x.c
View File

@ -805,7 +805,6 @@ static struct apic apic_x2apic_uv_x __ro_after_init = {
.probe = uv_probe, .probe = uv_probe,
.acpi_madt_oem_check = uv_acpi_madt_oem_check, .acpi_madt_oem_check = uv_acpi_madt_oem_check,
.delivery_mode = APIC_DELIVERY_MODE_FIXED,
.dest_mode_logical = false, .dest_mode_logical = false,
.disable_esr = 0, .disable_esr = 0,

2
arch/x86/platform/uv/uv_irq.c
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@ -35,7 +35,7 @@ static void uv_program_mmr(struct irq_cfg *cfg, struct uv_irq_2_mmr_pnode *info)
mmr_value = 0; mmr_value = 0;
entry = (struct uv_IO_APIC_route_entry *)&mmr_value; entry = (struct uv_IO_APIC_route_entry *)&mmr_value;
entry->vector = cfg->vector; entry->vector = cfg->vector;
entry->delivery_mode = apic->delivery_mode; entry->delivery_mode = APIC_DELIVERY_MODE_FIXED;
entry->dest_mode = apic->dest_mode_logical; entry->dest_mode = apic->dest_mode_logical;
entry->polarity = 0; entry->polarity = 0;
entry->trigger = 0; entry->trigger = 0;

4
drivers/iommu/amd/iommu.c
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@ -3357,7 +3357,7 @@ static void irq_remapping_prepare_irte(struct amd_ir_data *data,
data->irq_2_irte.devid = devid; data->irq_2_irte.devid = devid;
data->irq_2_irte.index = index + sub_handle; data->irq_2_irte.index = index + sub_handle;
iommu->irte_ops->prepare(data->entry, apic->delivery_mode, iommu->irte_ops->prepare(data->entry, APIC_DELIVERY_MODE_FIXED,
apic->dest_mode_logical, irq_cfg->vector, apic->dest_mode_logical, irq_cfg->vector,
irq_cfg->dest_apicid, devid); irq_cfg->dest_apicid, devid);
@ -3634,7 +3634,7 @@ int amd_iommu_deactivate_guest_mode(void *data)
entry->lo.fields_remap.valid = valid; entry->lo.fields_remap.valid = valid;
entry->lo.fields_remap.dm = apic->dest_mode_logical; entry->lo.fields_remap.dm = apic->dest_mode_logical;
entry->lo.fields_remap.int_type = apic->delivery_mode; entry->lo.fields_remap.int_type = APIC_DELIVERY_MODE_FIXED;
entry->hi.fields.vector = cfg->vector; entry->hi.fields.vector = cfg->vector;
entry->lo.fields_remap.destination = entry->lo.fields_remap.destination =
APICID_TO_IRTE_DEST_LO(cfg->dest_apicid); APICID_TO_IRTE_DEST_LO(cfg->dest_apicid);

2
drivers/iommu/intel/irq_remapping.c
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@ -1112,7 +1112,7 @@ static void prepare_irte(struct irte *irte, int vector, unsigned int dest)
* irq migration in the presence of interrupt-remapping. * irq migration in the presence of interrupt-remapping.
*/ */
irte->trigger_mode = 0; irte->trigger_mode = 0;
irte->dlvry_mode = apic->delivery_mode; irte->dlvry_mode = APIC_DELIVERY_MODE_FIXED;
irte->vector = vector; irte->vector = vector;
irte->dest_id = IRTE_DEST(dest); irte->dest_id = IRTE_DEST(dest);
irte->redir_hint = 1; irte->redir_hint = 1;

7
drivers/pci/controller/pci-hyperv.c
View File

@ -650,13 +650,6 @@ static void hv_arch_irq_unmask(struct irq_data *data)
PCI_FUNC(pdev->devfn); PCI_FUNC(pdev->devfn);
params->int_target.vector = hv_msi_get_int_vector(data); params->int_target.vector = hv_msi_get_int_vector(data);
/*
* Honoring apic->delivery_mode set to APIC_DELIVERY_MODE_FIXED by
* setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a
* spurious interrupt storm. Not doing so does not seem to have a
* negative effect (yet?).
*/
if (hbus->protocol_version >= PCI_PROTOCOL_VERSION_1_2) { if (hbus->protocol_version >= PCI_PROTOCOL_VERSION_1_2) {
/* /*
* PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the