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ath9k: Use static const
Using static const generally increases object text and decreases data size. It also generally decreases overall object size. text data bss dec hex filename 11161 56 2136 13353 3429 drivers/net/wireless/ath/ath9k/ar9003_paprd.o.new 11167 56 2136 13359 342f drivers/net/wireless/ath/ath9k/ar9003_paprd.o.old 15428 56 3056 18540 486c drivers/net/wireless/ath/ath9k/eeprom_4k.o.old 15451 56 3056 18563 4883 drivers/net/wireless/ath/ath9k/eeprom_4k.o.new 14087 56 2560 16703 413f drivers/net/wireless/ath/ath9k/eeprom_9287.o.old 14036 56 2560 16652 410c drivers/net/wireless/ath/ath9k/eeprom_9287.o.new 10041 56 2384 12481 30c1 drivers/net/wireless/ath/ath9k/ani.o.new 10088 56 2384 12528 30f0 drivers/net/wireless/ath/ath9k/ani.o.old 9316 1580 2304 13200 3390 drivers/net/wireless/ath/ath9k/htc_drv_init.o.new 9316 1580 2304 13200 3390 drivers/net/wireless/ath/ath9k/htc_drv_init.o.old 16483 56 3432 19971 4e03 drivers/net/wireless/ath/ath9k/ar9003_phy.o.new 16517 56 3432 20005 4e25 drivers/net/wireless/ath/ath9k/ar9003_phy.o.old 18221 104 2960 21285 5325 drivers/net/wireless/ath/ath9k/rc.o.old 18203 104 2960 21267 5313 drivers/net/wireless/ath/ath9k/rc.o.new 19985 56 4288 24329 5f09 drivers/net/wireless/ath/ath9k/eeprom_def.o.new 20040 56 4288 24384 5f40 drivers/net/wireless/ath/ath9k/eeprom_def.o.old 23997 56 4984 29037 716d drivers/net/wireless/ath/ath9k/ar5008_phy.o.old 23846 56 4984 28886 70d6 drivers/net/wireless/ath/ath9k/ar5008_phy.o.new 24285 56 3184 27525 6b85 drivers/net/wireless/ath/ath9k/ar9003_eeprom.o.old 24101 56 3184 27341 6acd drivers/net/wireless/ath/ath9k/ar9003_eeprom.o.new 6834 56 1032 7922 1ef2 drivers/net/wireless/ath/ath9k/ar9002_phy.o.old 6780 56 1032 7868 1ebc drivers/net/wireless/ath/ath9k/ar9002_phy.o.new 36211 64 8624 44899 af63 drivers/net/wireless/ath/ath9k/hw.o.new 36401 64 8624 45089 b021 drivers/net/wireless/ath/ath9k/hw.o.old 9281 56 1496 10833 2a51 drivers/net/wireless/ath/ath9k/ar9003_calib.o.old 9150 56 1496 10702 29ce drivers/net/wireless/ath/ath9k/ar9003_calib.o.new Use ARRAY_SIZE instead of a magic number. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
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8b22523b04
commit
07b2fa5a23
@ -834,10 +834,10 @@ void ath9k_hw_ani_setup(struct ath_hw *ah)
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{
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int i;
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const int totalSizeDesired[] = { -55, -55, -55, -55, -62 };
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const int coarseHigh[] = { -14, -14, -14, -14, -12 };
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const int coarseLow[] = { -64, -64, -64, -64, -70 };
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const int firpwr[] = { -78, -78, -78, -78, -80 };
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static const int totalSizeDesired[] = { -55, -55, -55, -55, -62 };
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static const int coarseHigh[] = { -14, -14, -14, -14, -12 };
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static const int coarseLow[] = { -64, -64, -64, -64, -70 };
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static const int firpwr[] = { -78, -78, -78, -78, -80 };
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for (i = 0; i < 5; i++) {
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ah->totalSizeDesired[i] = totalSizeDesired[i];
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@ -244,13 +244,15 @@ static void ar5008_hw_spur_mitigate(struct ath_hw *ah,
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int upper, lower, cur_vit_mask;
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int tmp, new;
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int i;
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int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
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AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
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static int pilot_mask_reg[4] = {
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AR_PHY_TIMING7, AR_PHY_TIMING8,
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AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
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};
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int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10,
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AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
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static int chan_mask_reg[4] = {
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AR_PHY_TIMING9, AR_PHY_TIMING10,
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AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
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};
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int inc[4] = { 0, 100, 0, 0 };
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static int inc[4] = { 0, 100, 0, 0 };
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int8_t mask_m[123];
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int8_t mask_p[123];
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@ -1084,12 +1086,12 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
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break;
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}
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case ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION:{
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const int m1ThreshLow[] = { 127, 50 };
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const int m2ThreshLow[] = { 127, 40 };
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const int m1Thresh[] = { 127, 0x4d };
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const int m2Thresh[] = { 127, 0x40 };
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const int m2CountThr[] = { 31, 16 };
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const int m2CountThrLow[] = { 63, 48 };
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static const int m1ThreshLow[] = { 127, 50 };
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static const int m2ThreshLow[] = { 127, 40 };
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static const int m1Thresh[] = { 127, 0x4d };
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static const int m2Thresh[] = { 127, 0x40 };
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static const int m2CountThr[] = { 31, 16 };
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static const int m2CountThrLow[] = { 63, 48 };
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u32 on = param ? 1 : 0;
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REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
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@ -1141,7 +1143,7 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
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break;
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}
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case ATH9K_ANI_CCK_WEAK_SIGNAL_THR:{
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const int weakSigThrCck[] = { 8, 6 };
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static const int weakSigThrCck[] = { 8, 6 };
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u32 high = param ? 1 : 0;
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REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
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@ -1157,7 +1159,7 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
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break;
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}
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case ATH9K_ANI_FIRSTEP_LEVEL:{
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const int firstep[] = { 0, 4, 8 };
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static const int firstep[] = { 0, 4, 8 };
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u32 level = param;
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if (level >= ARRAY_SIZE(firstep)) {
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@ -1178,7 +1180,7 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
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break;
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}
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case ATH9K_ANI_SPUR_IMMUNITY_LEVEL:{
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const int cycpwrThr1[] = { 2, 4, 6, 8, 10, 12, 14, 16 };
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static const int cycpwrThr1[] = { 2, 4, 6, 8, 10, 12, 14, 16 };
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u32 level = param;
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if (level >= ARRAY_SIZE(cycpwrThr1)) {
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@ -1627,7 +1629,7 @@ static void ar5008_hw_set_radar_conf(struct ath_hw *ah)
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void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
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{
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struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
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const u32 ar5416_cca_regs[6] = {
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static const u32 ar5416_cca_regs[6] = {
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AR_PHY_CCA,
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AR_PHY_CH1_CCA,
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AR_PHY_CH2_CCA,
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@ -175,13 +175,15 @@ static void ar9002_hw_spur_mitigate(struct ath_hw *ah,
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int upper, lower, cur_vit_mask;
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int tmp, newVal;
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int i;
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int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
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AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
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static const int pilot_mask_reg[4] = {
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AR_PHY_TIMING7, AR_PHY_TIMING8,
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AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
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};
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int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10,
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AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
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static const int chan_mask_reg[4] = {
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AR_PHY_TIMING9, AR_PHY_TIMING10,
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AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
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};
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int inc[4] = { 0, 100, 0, 0 };
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static const int inc[4] = { 0, 100, 0, 0 };
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struct chan_centers centers;
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int8_t mask_m[123];
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@ -196,7 +196,7 @@ static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
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u32 qCoffDenom, iCoffDenom;
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int32_t qCoff, iCoff;
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int iqCorrNeg, i;
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const u_int32_t offset_array[3] = {
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static const u_int32_t offset_array[3] = {
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AR_PHY_RX_IQCAL_CORR_B0,
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AR_PHY_RX_IQCAL_CORR_B1,
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AR_PHY_RX_IQCAL_CORR_B2,
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@ -603,22 +603,22 @@ static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
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static void ar9003_hw_tx_iq_cal(struct ath_hw *ah)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
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static const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
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AR_PHY_TX_IQCAL_STATUS_B0,
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AR_PHY_TX_IQCAL_STATUS_B1,
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AR_PHY_TX_IQCAL_STATUS_B2,
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};
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const u32 tx_corr_coeff[AR9300_MAX_CHAINS] = {
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static const u32 tx_corr_coeff[AR9300_MAX_CHAINS] = {
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AR_PHY_TX_IQCAL_CORR_COEFF_01_B0,
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AR_PHY_TX_IQCAL_CORR_COEFF_01_B1,
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AR_PHY_TX_IQCAL_CORR_COEFF_01_B2,
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};
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const u32 rx_corr[AR9300_MAX_CHAINS] = {
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static const u32 rx_corr[AR9300_MAX_CHAINS] = {
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AR_PHY_RX_IQCAL_CORR_B0,
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AR_PHY_RX_IQCAL_CORR_B1,
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AR_PHY_RX_IQCAL_CORR_B2,
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};
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const u_int32_t chan_info_tab[] = {
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static const u_int32_t chan_info_tab[] = {
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AR_PHY_CHAN_INFO_TAB_0,
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AR_PHY_CHAN_INFO_TAB_1,
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AR_PHY_CHAN_INFO_TAB_2,
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@ -4455,14 +4455,16 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,
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int i;
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int16_t twiceLargestAntenna;
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u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
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u16 ctlModesFor11a[] = {
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static const u16 ctlModesFor11a[] = {
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CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40
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};
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u16 ctlModesFor11g[] = {
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static const u16 ctlModesFor11g[] = {
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CTL_11B, CTL_11G, CTL_2GHT20, CTL_11B_EXT,
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CTL_11G_EXT, CTL_2GHT40
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};
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u16 numCtlModes, *pCtlMode, ctlMode, freq;
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u16 numCtlModes;
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const u16 *pCtlMode;
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u16 ctlMode, freq;
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struct chan_centers centers;
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u8 *ctlIndex;
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u8 ctlNum;
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@ -32,12 +32,12 @@ static void ar9003_paprd_setup_single_table(struct ath_hw *ah)
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{
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struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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struct ar9300_modal_eep_header *hdr;
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const u32 ctrl0[3] = {
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static const u32 ctrl0[3] = {
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AR_PHY_PAPRD_CTRL0_B0,
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AR_PHY_PAPRD_CTRL0_B1,
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AR_PHY_PAPRD_CTRL0_B2
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};
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const u32 ctrl1[3] = {
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static const u32 ctrl1[3] = {
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AR_PHY_PAPRD_CTRL1_B0,
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AR_PHY_PAPRD_CTRL1_B1,
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AR_PHY_PAPRD_CTRL1_B2
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@ -128,7 +128,7 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
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static void ar9003_hw_spur_mitigate_mrc_cck(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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u32 spur_freq[4] = { 2420, 2440, 2464, 2480 };
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static const u32 spur_freq[4] = { 2420, 2440, 2464, 2480 };
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int cur_bb_spur, negative = 0, cck_spur_freq;
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int i;
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@ -1161,7 +1161,7 @@ static void ar9003_hw_set_radar_conf(struct ath_hw *ah)
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void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
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{
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struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
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const u32 ar9300_cca_regs[6] = {
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static const u32 ar9300_cca_regs[6] = {
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AR_PHY_CCA_0,
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AR_PHY_CCA_1,
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AR_PHY_CCA_2,
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@ -534,7 +534,9 @@ static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
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u16 twiceMinEdgePower;
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u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
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u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
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u16 numCtlModes, *pCtlMode, ctlMode, freq;
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u16 numCtlModes;
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const u16 *pCtlMode;
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u16 ctlMode, freq;
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struct chan_centers centers;
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struct cal_ctl_data_4k *rep;
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struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k;
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@ -550,10 +552,10 @@ static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
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struct cal_target_power_ht targetPowerHt20, targetPowerHt40 = {
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0, {0, 0, 0, 0}
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};
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u16 ctlModesFor11g[] =
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{ CTL_11B, CTL_11G, CTL_2GHT20, CTL_11B_EXT, CTL_11G_EXT,
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CTL_2GHT40
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};
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static const u16 ctlModesFor11g[] = {
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CTL_11B, CTL_11G, CTL_2GHT20,
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CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40
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};
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ath9k_hw_get_channel_centers(ah, chan, ¢ers);
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@ -626,13 +626,13 @@ static void ath9k_hw_set_ar9287_power_per_rate_table(struct ath_hw *ah,
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struct cal_target_power_ht targetPowerHt20,
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targetPowerHt40 = {0, {0, 0, 0, 0} };
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u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
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u16 ctlModesFor11g[] = {CTL_11B,
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CTL_11G,
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CTL_2GHT20,
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CTL_11B_EXT,
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CTL_11G_EXT,
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CTL_2GHT40};
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u16 numCtlModes = 0, *pCtlMode = NULL, ctlMode, freq;
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static const u16 ctlModesFor11g[] = {
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CTL_11B, CTL_11G, CTL_2GHT20,
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CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40
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};
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u16 numCtlModes = 0;
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const u16 *pCtlMode = NULL;
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u16 ctlMode, freq;
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struct chan_centers centers;
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int tx_chainmask;
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u16 twiceMinEdgePower;
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@ -1021,13 +1021,16 @@ static void ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,
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0, {0, 0, 0, 0}
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};
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u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
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u16 ctlModesFor11a[] =
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{ CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40 };
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u16 ctlModesFor11g[] =
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{ CTL_11B, CTL_11G, CTL_2GHT20, CTL_11B_EXT, CTL_11G_EXT,
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CTL_2GHT40
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};
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u16 numCtlModes, *pCtlMode, ctlMode, freq;
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static const u16 ctlModesFor11a[] = {
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CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40
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};
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static const u16 ctlModesFor11g[] = {
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CTL_11B, CTL_11G, CTL_2GHT20,
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CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40
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};
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u16 numCtlModes;
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const u16 *pCtlMode;
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u16 ctlMode, freq;
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struct chan_centers centers;
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int tx_chainmask;
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u16 twiceMinEdgePower;
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@ -306,7 +306,7 @@ static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
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struct ath_hw *ah = (struct ath_hw *) hw_priv;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
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__be32 buf[2] = {
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const __be32 buf[2] = {
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cpu_to_be32(reg_offset),
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cpu_to_be32(val),
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};
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@ -310,10 +310,9 @@ static bool ath9k_hw_chip_test(struct ath_hw *ah)
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struct ath_common *common = ath9k_hw_common(ah);
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u32 regAddr[2] = { AR_STA_ID0 };
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u32 regHold[2];
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u32 patternData[4] = { 0x55555555,
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0xaaaaaaaa,
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0x66666666,
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0x99999999 };
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static const u32 patternData[4] = {
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0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999
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};
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int i, j, loop_max;
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if (!AR_SREV_9300_20_OR_LATER(ah)) {
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@ -436,7 +435,7 @@ static int ath9k_hw_init_macaddr(struct ath_hw *ah)
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u32 sum;
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int i;
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u16 eeval;
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u32 EEP_MAC[] = { EEP_MAC_LSW, EEP_MAC_MID, EEP_MAC_MSW };
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static const u32 EEP_MAC[] = { EEP_MAC_LSW, EEP_MAC_MID, EEP_MAC_MSW };
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sum = 0;
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for (i = 0; i < 3; i++) {
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@ -864,7 +864,7 @@ static bool ath_rc_update_per(struct ath_softc *sc,
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bool state_change = false;
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int count, n_bad_frames;
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u8 last_per;
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static u32 nretry_to_per_lookup[10] = {
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static const u32 nretry_to_per_lookup[10] = {
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100 * 0 / 1,
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100 * 1 / 4,
|
||||
100 * 1 / 2,
|
||||
@ -1087,13 +1087,13 @@ static int ath_rc_get_rateindex(const struct ath_rate_table *rate_table,
|
||||
struct ieee80211_tx_rate *rate)
|
||||
{
|
||||
int rix = 0, i = 0;
|
||||
int mcs_rix_off[] = { 7, 15, 20, 21, 22, 23 };
|
||||
static const int mcs_rix_off[] = { 7, 15, 20, 21, 22, 23 };
|
||||
|
||||
if (!(rate->flags & IEEE80211_TX_RC_MCS))
|
||||
return rate->idx;
|
||||
|
||||
while (rate->idx > mcs_rix_off[i] &&
|
||||
i < sizeof(mcs_rix_off)/sizeof(int)) {
|
||||
i < ARRAY_SIZE(mcs_rix_off)) {
|
||||
rix++; i++;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user