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xhci-pci: Allow host runtime PM as default also for Intel Ice Lake xHCI
Intel Ice Lake has two xHCI controllers one on PCH and the other as part of the CPU itself. The latter is also part of the so called Type C Subsystem (TCSS) sharing ACPI power resources with the PCIe root ports and the Thunderbolt controllers. In order to put the whole TCSS block into D3cold the xHCI needs to be runtime suspended as well when idle. For this reason allow runtime PM as default for Ice Lake TCSS xHCI controller. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Link: https://lore.kernel.org/r/1573836603-10871-5-git-send-email-mathias.nyman@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -48,6 +48,7 @@
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#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_XHCI 0x15e9
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#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_XHCI 0x15ec
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#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI 0x15f0
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#define PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI 0x8a13
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#define PCI_DEVICE_ID_AMD_PROMONTORYA_4 0x43b9
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#define PCI_DEVICE_ID_AMD_PROMONTORYA_3 0x43ba
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@ -212,7 +213,8 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
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pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_XHCI ||
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pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_XHCI ||
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pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_XHCI ||
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pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI))
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pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI ||
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pdev->device == PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI))
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xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW;
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if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
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