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drm/tegra: dp: Add DisplayPort link training helper
Add a helper that will perform link training as described in the DisplayPort specification. Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding
parent
6a127160c4
commit
078c445733
@ -334,6 +334,14 @@ int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
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u8 values[2], value;
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int err;
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if (link->ops && link->ops->configure) {
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err = link->ops->configure(link);
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if (err < 0) {
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DRM_ERROR("failed to configure DP link: %d\n", err);
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return err;
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}
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}
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values[0] = drm_dp_link_rate_to_bw_code(link->rate);
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values[1] = link->lanes;
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@ -416,3 +424,451 @@ int drm_dp_link_choose(struct drm_dp_link *link,
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return -ERANGE;
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}
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/**
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* DOC: Link training
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*
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* These functions contain common logic and helpers to implement DisplayPort
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* link training.
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*/
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/**
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* drm_dp_link_train_init() - initialize DisplayPort link training state
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* @train: DisplayPort link training state
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*/
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void drm_dp_link_train_init(struct drm_dp_link_train *train)
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{
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struct drm_dp_link_train_set *request = &train->request;
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struct drm_dp_link_train_set *adjust = &train->adjust;
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unsigned int i;
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for (i = 0; i < 4; i++) {
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request->voltage_swing[i] = 0;
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adjust->voltage_swing[i] = 0;
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request->pre_emphasis[i] = 0;
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adjust->pre_emphasis[i] = 0;
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request->post_cursor[i] = 0;
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adjust->post_cursor[i] = 0;
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}
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train->pattern = DP_TRAINING_PATTERN_DISABLE;
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train->clock_recovered = false;
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train->channel_equalized = false;
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}
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static bool drm_dp_link_train_valid(const struct drm_dp_link_train *train)
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{
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return train->clock_recovered && train->channel_equalized;
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}
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static int drm_dp_link_apply_training(struct drm_dp_link *link)
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{
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struct drm_dp_link_train_set *request = &link->train.request;
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unsigned int lanes = link->lanes, *vs, *pe, *pc, i;
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struct drm_dp_aux *aux = link->aux;
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u8 values[4], pattern = 0;
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int err;
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err = link->ops->apply_training(link);
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if (err < 0) {
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DRM_ERROR("failed to apply link training: %d\n", err);
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return err;
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}
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vs = request->voltage_swing;
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pe = request->pre_emphasis;
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pc = request->post_cursor;
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/* write currently selected voltage-swing and pre-emphasis levels */
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for (i = 0; i < lanes; i++)
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values[i] = DP_TRAIN_VOLTAGE_SWING_LEVEL(vs[i]) |
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DP_TRAIN_PRE_EMPHASIS_LEVEL(pe[i]);
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err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, values, lanes);
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if (err < 0) {
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DRM_ERROR("failed to set training parameters: %d\n", err);
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return err;
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}
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/* write currently selected post-cursor level (if supported) */
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if (link->revision >= 0x12 && link->rate == 540000) {
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values[0] = values[1] = 0;
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for (i = 0; i < lanes; i++)
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values[i / 2] |= DP_LANE_POST_CURSOR(i, pc[i]);
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err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_1_SET2, values,
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DIV_ROUND_UP(lanes, 2));
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if (err < 0) {
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DRM_ERROR("failed to set post-cursor: %d\n", err);
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return err;
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}
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}
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/* write link pattern */
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if (link->train.pattern != DP_TRAINING_PATTERN_DISABLE)
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pattern |= DP_LINK_SCRAMBLING_DISABLE;
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pattern |= link->train.pattern;
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err = drm_dp_dpcd_writeb(aux, DP_TRAINING_PATTERN_SET, pattern);
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if (err < 0) {
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DRM_ERROR("failed to set training pattern: %d\n", err);
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return err;
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}
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return 0;
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}
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static void drm_dp_link_train_wait(struct drm_dp_link *link)
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{
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unsigned long min = 0;
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switch (link->train.pattern) {
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case DP_TRAINING_PATTERN_1:
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min = link->aux_rd_interval.cr;
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break;
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case DP_TRAINING_PATTERN_2:
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case DP_TRAINING_PATTERN_3:
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min = link->aux_rd_interval.ce;
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break;
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default:
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break;
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}
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if (min > 0)
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usleep_range(min, 2 * min);
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}
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static void drm_dp_link_get_adjustments(struct drm_dp_link *link,
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u8 status[DP_LINK_STATUS_SIZE])
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{
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struct drm_dp_link_train_set *adjust = &link->train.adjust;
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unsigned int i;
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for (i = 0; i < link->lanes; i++) {
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adjust->voltage_swing[i] =
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drm_dp_get_adjust_request_voltage(status, i) >>
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DP_TRAIN_VOLTAGE_SWING_SHIFT;
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adjust->pre_emphasis[i] =
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drm_dp_get_adjust_request_pre_emphasis(status, i) >>
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DP_TRAIN_PRE_EMPHASIS_SHIFT;
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adjust->post_cursor[i] =
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drm_dp_get_adjust_request_post_cursor(status, i);
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}
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}
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static void drm_dp_link_train_adjust(struct drm_dp_link_train *train)
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{
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struct drm_dp_link_train_set *request = &train->request;
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struct drm_dp_link_train_set *adjust = &train->adjust;
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unsigned int i;
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for (i = 0; i < 4; i++)
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if (request->voltage_swing[i] != adjust->voltage_swing[i])
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request->voltage_swing[i] = adjust->voltage_swing[i];
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for (i = 0; i < 4; i++)
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if (request->pre_emphasis[i] != adjust->pre_emphasis[i])
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request->pre_emphasis[i] = adjust->pre_emphasis[i];
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for (i = 0; i < 4; i++)
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if (request->post_cursor[i] != adjust->post_cursor[i])
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request->post_cursor[i] = adjust->post_cursor[i];
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}
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static int drm_dp_link_recover_clock(struct drm_dp_link *link)
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{
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u8 status[DP_LINK_STATUS_SIZE];
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int err;
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err = drm_dp_link_apply_training(link);
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if (err < 0)
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return err;
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drm_dp_link_train_wait(link);
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err = drm_dp_dpcd_read_link_status(link->aux, status);
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if (err < 0) {
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DRM_ERROR("failed to read link status: %d\n", err);
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return err;
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}
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if (!drm_dp_clock_recovery_ok(status, link->lanes))
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drm_dp_link_get_adjustments(link, status);
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else
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link->train.clock_recovered = true;
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return 0;
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}
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static int drm_dp_link_clock_recovery(struct drm_dp_link *link)
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{
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unsigned int repeat;
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int err;
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/* start clock recovery using training pattern 1 */
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link->train.pattern = DP_TRAINING_PATTERN_1;
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for (repeat = 1; repeat < 5; repeat++) {
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err = drm_dp_link_recover_clock(link);
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if (err < 0) {
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DRM_ERROR("failed to recover clock: %d\n", err);
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return err;
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}
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drm_dp_link_train_adjust(&link->train);
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if (link->train.clock_recovered)
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break;
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}
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return 0;
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}
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static int drm_dp_link_equalize_channel(struct drm_dp_link *link)
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{
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struct drm_dp_aux *aux = link->aux;
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u8 status[DP_LINK_STATUS_SIZE];
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int err;
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err = drm_dp_link_apply_training(link);
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if (err < 0)
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return err;
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drm_dp_link_train_wait(link);
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err = drm_dp_dpcd_read_link_status(aux, status);
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if (err < 0) {
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DRM_ERROR("failed to read link status: %d\n", err);
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return err;
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}
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if (!drm_dp_clock_recovery_ok(status, link->lanes)) {
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DRM_ERROR("clock recovery lost while equalizing channel\n");
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link->train.clock_recovered = false;
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return 0;
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}
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if (!drm_dp_channel_eq_ok(status, link->lanes))
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drm_dp_link_get_adjustments(link, status);
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else
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link->train.channel_equalized = true;
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return 0;
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}
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static int drm_dp_link_channel_equalization(struct drm_dp_link *link)
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{
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unsigned int repeat;
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int err;
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/* start channel equalization using pattern 2 or 3 */
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if (link->caps.tps3_supported)
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link->train.pattern = DP_TRAINING_PATTERN_3;
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else
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link->train.pattern = DP_TRAINING_PATTERN_2;
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for (repeat = 1; repeat < 5; repeat++) {
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err = drm_dp_link_equalize_channel(link);
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if (err < 0) {
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DRM_ERROR("failed to equalize channel: %d\n", err);
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return err;
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}
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drm_dp_link_train_adjust(&link->train);
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if (link->train.channel_equalized)
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break;
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}
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return 0;
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}
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static int drm_dp_link_downgrade(struct drm_dp_link *link)
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{
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switch (link->rate) {
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case 162000:
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return -EINVAL;
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case 270000:
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link->rate = 162000;
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break;
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case 540000:
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link->rate = 270000;
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return 0;
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}
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return 0;
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}
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static void drm_dp_link_train_disable(struct drm_dp_link *link)
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{
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int err;
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link->train.pattern = DP_TRAINING_PATTERN_DISABLE;
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err = drm_dp_link_apply_training(link);
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if (err < 0)
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DRM_ERROR("failed to disable link training: %d\n", err);
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}
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static int drm_dp_link_train_full(struct drm_dp_link *link)
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{
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int err;
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retry:
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DRM_DEBUG_KMS("full-training link: %u lane%s at %u MHz\n",
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link->lanes, (link->lanes > 1) ? "s" : "",
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link->rate / 100);
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err = drm_dp_link_configure(link->aux, link);
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if (err < 0) {
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DRM_ERROR("failed to configure DP link: %d\n", err);
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return err;
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}
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err = drm_dp_link_clock_recovery(link);
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if (err < 0) {
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DRM_ERROR("clock recovery failed: %d\n", err);
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goto out;
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}
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if (!link->train.clock_recovered) {
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DRM_ERROR("clock recovery failed, downgrading link\n");
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err = drm_dp_link_downgrade(link);
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if (err < 0)
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goto out;
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goto retry;
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}
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DRM_DEBUG_KMS("clock recovery succeeded\n");
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err = drm_dp_link_channel_equalization(link);
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if (err < 0) {
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DRM_ERROR("channel equalization failed: %d\n", err);
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goto out;
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}
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if (!link->train.channel_equalized) {
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DRM_ERROR("channel equalization failed, downgrading link\n");
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err = drm_dp_link_downgrade(link);
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if (err < 0)
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goto out;
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goto retry;
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}
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DRM_DEBUG_KMS("channel equalization succeeded\n");
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out:
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drm_dp_link_train_disable(link);
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return err;
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}
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static int drm_dp_link_train_fast(struct drm_dp_link *link)
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{
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u8 status[DP_LINK_STATUS_SIZE];
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int err;
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DRM_DEBUG_KMS("fast-training link: %u lane%s at %u MHz\n",
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link->lanes, (link->lanes > 1) ? "s" : "",
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link->rate / 100);
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err = drm_dp_link_configure(link->aux, link);
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if (err < 0) {
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DRM_ERROR("failed to configure DP link: %d\n", err);
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return err;
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}
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/* transmit training pattern 1 for 500 microseconds */
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link->train.pattern = DP_TRAINING_PATTERN_1;
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err = drm_dp_link_apply_training(link);
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if (err < 0)
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goto out;
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usleep_range(500, 1000);
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/* transmit training pattern 2 or 3 for 500 microseconds */
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if (link->caps.tps3_supported)
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link->train.pattern = DP_TRAINING_PATTERN_3;
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else
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link->train.pattern = DP_TRAINING_PATTERN_2;
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err = drm_dp_link_apply_training(link);
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if (err < 0)
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goto out;
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usleep_range(500, 1000);
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err = drm_dp_dpcd_read_link_status(link->aux, status);
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if (err < 0) {
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DRM_ERROR("failed to read link status: %d\n", err);
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goto out;
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}
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if (!drm_dp_clock_recovery_ok(status, link->lanes)) {
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DRM_ERROR("clock recovery failed\n");
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err = -EIO;
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}
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if (!drm_dp_channel_eq_ok(status, link->lanes)) {
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DRM_ERROR("channel equalization failed\n");
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err = -EIO;
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}
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out:
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drm_dp_link_train_disable(link);
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return err;
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}
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/**
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* drm_dp_link_train() - perform DisplayPort link training
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* @link: a DP link object
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*
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* Uses the context stored in the DP link object to perform link training. It
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* is expected that drivers will call drm_dp_link_probe() to obtain the link
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* capabilities before performing link training.
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*
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* If the sink supports fast link training (no AUX CH handshake) and valid
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* training settings are available, this function will try to perform fast
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* link training and fall back to full link training on failure.
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*
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* Returns: 0 on success or a negative error code on failure.
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*/
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int drm_dp_link_train(struct drm_dp_link *link)
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{
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int err;
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if (link->caps.fast_training) {
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if (drm_dp_link_train_valid(&link->train)) {
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err = drm_dp_link_train_fast(link);
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if (err < 0)
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DRM_ERROR("fast link training failed: %d\n",
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err);
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else
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return 0;
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} else {
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DRM_DEBUG_KMS("training parameters not available\n");
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}
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} else {
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DRM_DEBUG_KMS("fast link training not supported\n");
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}
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err = drm_dp_link_train_full(link);
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if (err < 0)
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DRM_ERROR("full link training failed: %d\n", err);
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return err;
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}
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@ -12,6 +12,7 @@
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struct drm_display_info;
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struct drm_display_mode;
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struct drm_dp_aux;
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struct drm_dp_link;
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/**
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* struct drm_dp_link_caps - DP link capabilities
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@ -56,6 +57,55 @@ struct drm_dp_link_caps {
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void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest,
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const struct drm_dp_link_caps *src);
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/**
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* struct drm_dp_link_ops - DP link operations
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*/
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struct drm_dp_link_ops {
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/**
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* @apply_training:
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*/
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int (*apply_training)(struct drm_dp_link *link);
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/**
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* @configure:
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*/
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int (*configure)(struct drm_dp_link *link);
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};
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#define DP_TRAIN_VOLTAGE_SWING_LEVEL(x) ((x) << 0)
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#define DP_TRAIN_PRE_EMPHASIS_LEVEL(x) ((x) << 3)
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#define DP_LANE_POST_CURSOR(i, x) (((x) & 0x3) << (((i) & 1) << 2))
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/**
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* struct drm_dp_link_train_set - link training settings
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* @voltage_swing: per-lane voltage swing
|
||||
* @pre_emphasis: per-lane pre-emphasis
|
||||
* @post_cursor: per-lane post-cursor
|
||||
*/
|
||||
struct drm_dp_link_train_set {
|
||||
unsigned int voltage_swing[4];
|
||||
unsigned int pre_emphasis[4];
|
||||
unsigned int post_cursor[4];
|
||||
};
|
||||
|
||||
/**
|
||||
* struct drm_dp_link_train - link training state information
|
||||
* @request: currently requested settings
|
||||
* @adjust: adjustments requested by sink
|
||||
* @pattern: currently requested training pattern
|
||||
* @clock_recovered: flag to track if clock recovery has completed
|
||||
* @channel_equalized: flag to track if channel equalization has completed
|
||||
*/
|
||||
struct drm_dp_link_train {
|
||||
struct drm_dp_link_train_set request;
|
||||
struct drm_dp_link_train_set adjust;
|
||||
|
||||
unsigned int pattern;
|
||||
|
||||
bool clock_recovered;
|
||||
bool channel_equalized;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct drm_dp_link - DP link capabilities and configuration
|
||||
* @revision: DP specification revision supported on the link
|
||||
@ -92,6 +142,21 @@ struct drm_dp_link {
|
||||
|
||||
unsigned long rates[DP_MAX_SUPPORTED_RATES];
|
||||
unsigned int num_rates;
|
||||
|
||||
/**
|
||||
* @ops: DP link operations
|
||||
*/
|
||||
const struct drm_dp_link_ops *ops;
|
||||
|
||||
/**
|
||||
* @aux: DP AUX channel
|
||||
*/
|
||||
struct drm_dp_aux *aux;
|
||||
|
||||
/**
|
||||
* @train: DP link training state
|
||||
*/
|
||||
struct drm_dp_link_train train;
|
||||
};
|
||||
|
||||
int drm_dp_link_add_rate(struct drm_dp_link *link, unsigned long rate);
|
||||
@ -106,4 +171,7 @@ int drm_dp_link_choose(struct drm_dp_link *link,
|
||||
const struct drm_display_mode *mode,
|
||||
const struct drm_display_info *info);
|
||||
|
||||
void drm_dp_link_train_init(struct drm_dp_link_train *train);
|
||||
int drm_dp_link_train(struct drm_dp_link *link);
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user