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ARM: OMAP2+: Drop unused PRM defines for am4
These are unused and should be handled by drivers/soc/ti/omap_prm.c driver nowadays. Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -32,20 +32,8 @@
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/* Other PRM offsets */
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#define AM43XX_PRM_IO_PMCTRL_OFFSET 0x0024
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/* RM RSTCTRL offsets */
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#define AM43XX_RM_PER_RSTCTRL_OFFSET 0x0010
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#define AM43XX_RM_GFX_RSTCTRL_OFFSET 0x0010
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#define AM43XX_RM_WKUP_RSTCTRL_OFFSET 0x0010
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/* RM RSTST offsets */
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#define AM43XX_RM_GFX_RSTST_OFFSET 0x0014
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#define AM43XX_RM_PER_RSTST_OFFSET 0x0014
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#define AM43XX_RM_WKUP_RSTST_OFFSET 0x0014
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/* CM instances */
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#define AM43XX_CM_WKUP_INST 0x2800
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#define AM43XX_CM_DEVICE_INST 0x4100
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#define AM43XX_CM_DPLL_INST 0x4200
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#define AM43XX_CM_MPU_INST 0x8300
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#define AM43XX_CM_GFX_INST 0x8400
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#define AM43XX_CM_RTC_INST 0x8500
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@ -74,89 +62,7 @@
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#define AM43XX_CM_PER_OCPWP_L3_CDOFFS 0x0c00
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/* CLK CTRL offsets */
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#define AM43XX_CM_PER_UART1_CLKCTRL_OFFSET 0x0580
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#define AM43XX_CM_PER_UART2_CLKCTRL_OFFSET 0x0588
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#define AM43XX_CM_PER_UART3_CLKCTRL_OFFSET 0x0590
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#define AM43XX_CM_PER_UART4_CLKCTRL_OFFSET 0x0598
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#define AM43XX_CM_PER_UART5_CLKCTRL_OFFSET 0x05a0
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#define AM43XX_CM_PER_DCAN0_CLKCTRL_OFFSET 0x0428
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#define AM43XX_CM_PER_DCAN1_CLKCTRL_OFFSET 0x0430
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#define AM43XX_CM_PER_ELM_CLKCTRL_OFFSET 0x0468
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#define AM43XX_CM_PER_EPWMSS0_CLKCTRL_OFFSET 0x0438
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#define AM43XX_CM_PER_EPWMSS1_CLKCTRL_OFFSET 0x0440
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#define AM43XX_CM_PER_EPWMSS2_CLKCTRL_OFFSET 0x0448
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#define AM43XX_CM_PER_GPIO1_CLKCTRL_OFFSET 0x0478
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#define AM43XX_CM_PER_GPIO2_CLKCTRL_OFFSET 0x0480
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#define AM43XX_CM_PER_GPIO3_CLKCTRL_OFFSET 0x0488
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#define AM43XX_CM_PER_I2C1_CLKCTRL_OFFSET 0x04a8
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#define AM43XX_CM_PER_I2C2_CLKCTRL_OFFSET 0x04b0
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#define AM43XX_CM_PER_MAILBOX0_CLKCTRL_OFFSET 0x04b8
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#define AM43XX_CM_PER_MMC0_CLKCTRL_OFFSET 0x04c0
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#define AM43XX_CM_PER_MMC1_CLKCTRL_OFFSET 0x04c8
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#define AM43XX_CM_PER_RNG_CLKCTRL_OFFSET 0x04e0
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#define AM43XX_CM_PER_SPI0_CLKCTRL_OFFSET 0x0500
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#define AM43XX_CM_PER_SPI1_CLKCTRL_OFFSET 0x0508
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#define AM43XX_CM_PER_SPINLOCK_CLKCTRL_OFFSET 0x0528
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#define AM43XX_CM_PER_TIMER2_CLKCTRL_OFFSET 0x0530
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#define AM43XX_CM_PER_TIMER3_CLKCTRL_OFFSET 0x0538
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#define AM43XX_CM_PER_TIMER4_CLKCTRL_OFFSET 0x0540
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#define AM43XX_CM_PER_TIMER5_CLKCTRL_OFFSET 0x0548
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#define AM43XX_CM_PER_TIMER6_CLKCTRL_OFFSET 0x0550
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#define AM43XX_CM_PER_TIMER7_CLKCTRL_OFFSET 0x0558
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#define AM43XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET 0x0228
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#define AM43XX_CM_WKUP_CONTROL_CLKCTRL_OFFSET 0x0360
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#define AM43XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET 0x0350
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#define AM43XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET 0x0358
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#define AM43XX_CM_WKUP_UART0_CLKCTRL_OFFSET 0x0348
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#define AM43XX_CM_WKUP_TIMER1_CLKCTRL_OFFSET 0x0328
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#define AM43XX_CM_WKUP_I2C0_CLKCTRL_OFFSET 0x0340
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#define AM43XX_CM_WKUP_GPIO0_CLKCTRL_OFFSET 0x0368
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#define AM43XX_CM_WKUP_ADC_TSC_CLKCTRL_OFFSET 0x0120
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#define AM43XX_CM_WKUP_WDT1_CLKCTRL_OFFSET 0x0338
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#define AM43XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET 0x0220
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#define AM43XX_CM_RTC_RTC_CLKCTRL_OFFSET 0x0020
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#define AM43XX_CM_PER_MMC2_CLKCTRL_OFFSET 0x0248
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#define AM43XX_CM_PER_QSPI_CLKCTRL_OFFSET 0x0258
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#define AM43XX_CM_PER_GPMC_CLKCTRL_OFFSET 0x0220
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#define AM43XX_CM_PER_MCASP0_CLKCTRL_OFFSET 0x0238
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#define AM43XX_CM_PER_MCASP1_CLKCTRL_OFFSET 0x0240
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#define AM43XX_CM_PER_L4LS_CLKCTRL_OFFSET 0x0420
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#define AM43XX_CM_PER_L3_CLKCTRL_OFFSET 0x0020
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#define AM43XX_CM_PER_TPCC_CLKCTRL_OFFSET 0x0078
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#define AM43XX_CM_PER_TPTC0_CLKCTRL_OFFSET 0x0080
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#define AM43XX_CM_PER_TPTC1_CLKCTRL_OFFSET 0x0088
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#define AM43XX_CM_PER_TPTC2_CLKCTRL_OFFSET 0x0090
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#define AM43XX_CM_PER_CPGMAC0_CLKCTRL_OFFSET 0x0b20
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#define AM43XX_CM_PER_PRUSS_CLKCTRL_OFFSET 0x0320
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#define AM43XX_CM_GFX_GFX_CLKCTRL_OFFSET 0x0020
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#define AM43XX_CM_PER_L4HS_CLKCTRL_OFFSET 0x00a0
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#define AM43XX_CM_MPU_MPU_CLKCTRL_OFFSET 0x0020
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#define AM43XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET 0x0040
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#define AM43XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET 0x0050
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#define AM43XX_CM_PER_SHA0_CLKCTRL_OFFSET 0x0058
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#define AM43XX_CM_PER_AES0_CLKCTRL_OFFSET 0x0028
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#define AM43XX_CM_PER_DES_CLKCTRL_OFFSET 0x0030
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#define AM43XX_CM_PER_TIMER8_CLKCTRL_OFFSET 0x0560
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#define AM43XX_CM_PER_TIMER9_CLKCTRL_OFFSET 0x0568
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#define AM43XX_CM_PER_TIMER10_CLKCTRL_OFFSET 0x0570
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#define AM43XX_CM_PER_TIMER11_CLKCTRL_OFFSET 0x0578
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#define AM43XX_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET 0x0230
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#define AM43XX_CM_PER_EPWMSS3_CLKCTRL_OFFSET 0x0450
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#define AM43XX_CM_PER_EPWMSS4_CLKCTRL_OFFSET 0x0458
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#define AM43XX_CM_PER_EPWMSS5_CLKCTRL_OFFSET 0x0460
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#define AM43XX_CM_PER_SPI2_CLKCTRL_OFFSET 0x0510
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#define AM43XX_CM_PER_SPI3_CLKCTRL_OFFSET 0x0518
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#define AM43XX_CM_PER_SPI4_CLKCTRL_OFFSET 0x0520
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#define AM43XX_CM_PER_GPIO4_CLKCTRL_OFFSET 0x0490
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#define AM43XX_CM_PER_GPIO5_CLKCTRL_OFFSET 0x0498
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#define AM43XX_CM_PER_USB_OTG_SS0_CLKCTRL_OFFSET 0x0260
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#define AM43XX_CM_PER_USBPHYOCP2SCP0_CLKCTRL_OFFSET 0x05B8
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#define AM43XX_CM_PER_USB_OTG_SS1_CLKCTRL_OFFSET 0x0268
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#define AM43XX_CM_PER_USBPHYOCP2SCP1_CLKCTRL_OFFSET 0x05C0
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#define AM43XX_CM_PER_DSS_CLKCTRL_OFFSET 0x0a20
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#define AM43XX_CM_PER_HDQ1W_CLKCTRL_OFFSET 0x04a0
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#define AM43XX_CM_PER_VPFE0_CLKCTRL_OFFSET 0x0068
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#define AM43XX_CM_PER_VPFE1_CLKCTRL_OFFSET 0x0070
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#define AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET 0x0720
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#endif
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