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ARM: dts: mt8127: enable basic SMP bringup for mt8127
Add arch timer node to enable arch-timer support. MT8127 firmware doesn't correctly setup arch-timer frequency and CNTVOFF, add properties to workaround this. This also set cpu enable-method to enable SMP. Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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@ -23,6 +23,7 @@
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cpus {
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cpus {
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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enable-method = "mediatek,mt81xx-tz-smp";
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cpu@0 {
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cpu@0 {
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device_type = "cpu";
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device_type = "cpu";
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@ -47,6 +48,17 @@
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};
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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trustzone-bootinfo@80002000 {
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compatible = "mediatek,trustzone-bootinfo";
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reg = <0 0x80002000 0 0x1000>;
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};
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};
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clocks {
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clocks {
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#address-cells = <2>;
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#address-cells = <2>;
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#size-cells = <2>;
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#size-cells = <2>;
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@ -72,6 +84,21 @@
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};
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};
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};
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupt-parent = <&gic>;
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
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IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
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IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
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IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
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IRQ_TYPE_LEVEL_LOW)>;
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clock-frequency = <13000000>;
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arm,cpu-registers-not-fw-configured;
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};
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soc {
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soc {
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#address-cells = <2>;
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#address-cells = <2>;
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#size-cells = <2>;
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#size-cells = <2>;
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