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clk: mediatek: mt7622: Convert to platform driver and simple probe

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Convert the MT7622 topckgen and pericfg clock drivers to platform
drivers and use the simple probe mechanism. This also allows to
build these clocks as modules.

Thanks to the conversion, more error handling was added to the clocks
registration.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230306140543.1813621-28-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
AngeloGioacchino Del Regno 2023-03-06 15:05:16 +01:00 committed by Stephen Boyd
parent 838b86331c
commit 054a47fc47
1 changed files with 30 additions and 93 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

123
drivers/clk/mediatek/clk-mt7622.c
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@ -490,107 +490,44 @@ static const struct mtk_clk_rst_desc clk_rst_desc = {
.rst_bank_nr = ARRAY_SIZE(pericfg_rst_ofs),
};
static int mtk_topckgen_init(struct platform_device *pdev)
{
struct clk_hw_onecell_data *clk_data;
void __iomem *base;
struct device_node *node = pdev->dev.of_node;
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return PTR_ERR(base);
clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK);
mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs),
clk_data);
mtk_clk_register_composites(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt7622_clk_lock, clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt7622_clk_lock, clk_data);
mtk_clk_register_gates(&pdev->dev, node, top_clks,
ARRAY_SIZE(top_clks), clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
}
static int mtk_pericfg_init(struct platform_device *pdev)
{
struct clk_hw_onecell_data *clk_data;
void __iomem *base;
int r;
struct device_node *node = pdev->dev.of_node;
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return PTR_ERR(base);
clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK);
mtk_clk_register_gates(&pdev->dev, node, peri_clks,
ARRAY_SIZE(peri_clks), clk_data);
mtk_clk_register_composites(&pdev->dev, peri_muxes,
ARRAY_SIZE(peri_muxes), base,
&mt7622_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
return r;
mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
return 0;
}
static const struct of_device_id of_match_clk_mt7622[] = {
{
.compatible = "mediatek,mt7622-topckgen",
.data = mtk_topckgen_init,
}, {
.compatible = "mediatek,mt7622-pericfg",
.data = mtk_pericfg_init,
}, {
/* sentinel */
}
static const struct mtk_clk_desc topck_desc = {
.clks = top_clks,
.num_clks = ARRAY_SIZE(top_clks),
.fixed_clks = top_fixed_clks,
.num_fixed_clks = ARRAY_SIZE(top_fixed_clks),
.factor_clks = top_divs,
.num_factor_clks = ARRAY_SIZE(top_divs),
.composite_clks = top_muxes,
.num_composite_clks = ARRAY_SIZE(top_muxes),
.divider_clks = top_adj_divs,
.num_divider_clks = ARRAY_SIZE(top_adj_divs),
.clk_lock = &mt7622_clk_lock,
};
static int clk_mt7622_probe(struct platform_device *pdev)
{
int (*clk_init)(struct platform_device *);
int r;
static const struct mtk_clk_desc peri_desc = {
.clks = peri_clks,
.num_clks = ARRAY_SIZE(peri_clks),
.composite_clks = peri_muxes,
.num_composite_clks = ARRAY_SIZE(peri_muxes),
.rst_desc = &clk_rst_desc,
.clk_lock = &mt7622_clk_lock,
};
clk_init = of_device_get_match_data(&pdev->dev);
if (!clk_init)
return -EINVAL;
r = clk_init(pdev);
if (r)
dev_err(&pdev->dev,
"could not register clock provider: %s: %d\n",
pdev->name, r);
return r;
}
static const struct of_device_id of_match_clk_mt7622[] = {
{ .compatible = "mediatek,mt7622-topckgen", .data = &topck_desc },
{ .compatible = "mediatek,mt7622-pericfg", .data = &peri_desc },
{ /* sentinel */ }
};
static struct platform_driver clk_mt7622_drv = {
.probe = clk_mt7622_probe,
.driver = {
.name = "clk-mt7622",
.of_match_table = of_match_clk_mt7622,
},
.probe = mtk_clk_simple_probe,
.remove = mtk_clk_simple_remove,
};
module_platform_driver(clk_mt7622_drv)
static int clk_mt7622_init(void)
{
return platform_driver_register(&clk_mt7622_drv);
}
arch_initcall(clk_mt7622_init);
MODULE_DESCRIPTION("MediaTek MT7622 clocks driver");
MODULE_LICENSE("GPL");