drm/amd/powerplay: sort the call flow on temperature ranges retrieving

This can help to maintain clear code layer.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2020-07-02 15:38:53 +08:00 committed by Alex Deucher
parent e02e4d513e
commit 0540ecedcb
7 changed files with 41 additions and 20 deletions

View File

@ -991,6 +991,33 @@ static int smu_sw_fini(void *handle)
return 0;
}
static int smu_get_thermal_temperature_range(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
struct smu_temperature_range *range =
&smu->thermal_range;
int ret = 0;
if (!smu->ppt_funcs->get_thermal_temperature_range)
return 0;
ret = smu->ppt_funcs->get_thermal_temperature_range(smu, range);
if (ret)
return ret;
adev->pm.dpm.thermal.min_temp = range->min;
adev->pm.dpm.thermal.max_temp = range->max;
adev->pm.dpm.thermal.max_edge_emergency_temp = range->edge_emergency_max;
adev->pm.dpm.thermal.min_hotspot_temp = range->hotspot_min;
adev->pm.dpm.thermal.max_hotspot_crit_temp = range->hotspot_crit_max;
adev->pm.dpm.thermal.max_hotspot_emergency_temp = range->hotspot_emergency_max;
adev->pm.dpm.thermal.min_mem_temp = range->mem_min;
adev->pm.dpm.thermal.max_mem_crit_temp = range->mem_crit_max;
adev->pm.dpm.thermal.max_mem_emergency_temp = range->mem_emergency_max;
return ret;
}
static int smu_smc_hw_setup(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
@ -1095,6 +1122,12 @@ static int smu_smc_hw_setup(struct smu_context *smu)
return ret;
}
ret = smu_get_thermal_temperature_range(smu);
if (ret) {
dev_err(adev->dev, "Failed to get thermal temperature ranges!\n");
return ret;
}
ret = smu_enable_thermal_alert(smu);
if (ret) {
dev_err(adev->dev, "Failed to enable thermal alert!\n");

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@ -1037,6 +1037,8 @@ static int arcturus_get_thermal_temperature_range(struct smu_context *smu,
if (!range)
return -EINVAL;
memcpy(range, &smu11_thermal_policy[0], sizeof(struct smu_temperature_range));
range->max = pptable->TedgeLimit *
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
range->edge_emergency_max = (pptable->TedgeLimit + CTF_OFFSET_EDGE) *

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@ -146,7 +146,6 @@ struct smu_power_state {
struct smu_state_pcie_block pcie;
struct smu_state_display_block display;
struct smu_state_memroy_block memory;
struct smu_temperature_range temperatures;
struct smu_state_software_algorithm_block software;
struct smu_uvd_clocks uvd_clocks;
struct smu_hw_power_state hardware;
@ -386,6 +385,7 @@ struct smu_context
struct smu_feature smu_feature;
struct amd_pp_display_configuration *display_config;
struct smu_baco_context smu_baco;
struct smu_temperature_range thermal_range;
void *od_settings;
#if defined(CONFIG_DEBUG_FS)
struct dentry *debugfs_sclk;

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@ -1864,6 +1864,8 @@ static int navi10_get_thermal_temperature_range(struct smu_context *smu,
if (!range)
return -EINVAL;
memcpy(range, &smu11_thermal_policy[0], sizeof(struct smu_temperature_range));
range->max = pptable->TedgeLimit *
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
range->edge_emergency_max = (pptable->TedgeLimit + CTF_OFFSET_EDGE) *

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@ -1653,6 +1653,8 @@ static int sienna_cichlid_get_thermal_temperature_range(struct smu_context *smu,
if (!range)
return -EINVAL;
memcpy(range, &smu11_thermal_policy[0], sizeof(struct smu_temperature_range));
range->max = pptable->TemperatureLimit[TEMP_EDGE] *
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
range->edge_emergency_max = (pptable->TemperatureLimit[TEMP_EDGE] + CTF_OFFSET_EDGE) *

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@ -85,7 +85,6 @@
#define smu_dpm_set_jpeg_enable(smu, enable) smu_ppt_funcs(dpm_set_jpeg_enable, 0, smu, enable)
#define smu_set_watermarks_table(smu, tab, clock_ranges) smu_ppt_funcs(set_watermarks_table, 0, smu, tab, clock_ranges)
#define smu_thermal_temperature_range_update(smu, range, rw) smu_ppt_funcs(thermal_temperature_range_update, 0, smu, range, rw)
#define smu_get_thermal_temperature_range(smu, range) smu_ppt_funcs(get_thermal_temperature_range, 0, smu, range)
#define smu_register_irq_handler(smu) smu_ppt_funcs(register_irq_handler, 0, smu)
#define smu_get_dpm_ultimate_freq(smu, param, min, max) smu_ppt_funcs(get_dpm_ultimate_freq, 0, smu, param, min, max)
#define smu_asic_set_performance_level(smu, level) smu_ppt_funcs(set_performance_level, -EINVAL, smu, level)

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@ -1088,17 +1088,10 @@ int smu_v11_0_set_power_limit(struct smu_context *smu, uint32_t n)
int smu_v11_0_enable_thermal_alert(struct smu_context *smu)
{
int ret = 0;
struct smu_temperature_range range;
struct amdgpu_device *adev = smu->adev;
memcpy(&range, &smu11_thermal_policy[0], sizeof(struct smu_temperature_range));
ret = smu_get_thermal_temperature_range(smu, &range);
if (ret)
return ret;
if (smu->smu_table.thermal_controller_type) {
ret = smu_set_thermal_range(smu, range);
ret = smu_set_thermal_range(smu, smu->thermal_range);
if (ret)
return ret;
@ -1111,16 +1104,6 @@ int smu_v11_0_enable_thermal_alert(struct smu_context *smu)
return ret;
}
adev->pm.dpm.thermal.min_temp = range.min;
adev->pm.dpm.thermal.max_temp = range.max;
adev->pm.dpm.thermal.max_edge_emergency_temp = range.edge_emergency_max;
adev->pm.dpm.thermal.min_hotspot_temp = range.hotspot_min;
adev->pm.dpm.thermal.max_hotspot_crit_temp = range.hotspot_crit_max;
adev->pm.dpm.thermal.max_hotspot_emergency_temp = range.hotspot_emergency_max;
adev->pm.dpm.thermal.min_mem_temp = range.mem_min;
adev->pm.dpm.thermal.max_mem_crit_temp = range.mem_crit_max;
adev->pm.dpm.thermal.max_mem_emergency_temp = range.mem_emergency_max;
return ret;
}