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arc: convert to dma_map_ops
[vgupta@synopsys.com: ARC: dma mapping fixes #2] Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: Joerg Roedel <jroedel@suse.de> Cc: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Carlos Palminha <CARLOS.PALMINHA@synopsys.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Christoph Hellwig
Linus Torvalds
parent
0d4a619b64
commit
052c96dbe3
@ -38,6 +38,7 @@ config ARC
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select OF_EARLY_FLATTREE
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select PERF_USE_VMALLOC
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select HAVE_DEBUG_STACKOVERFLOW
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select HAVE_DMA_ATTRS
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config TRACE_IRQFLAGS_SUPPORT
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def_bool y
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@ -11,192 +11,13 @@
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#ifndef ASM_ARC_DMA_MAPPING_H
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#define ASM_ARC_DMA_MAPPING_H
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#include <asm-generic/dma-coherent.h>
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#include <asm/cacheflush.h>
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extern struct dma_map_ops arc_dma_ops;
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void *dma_alloc_noncoherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp);
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void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle);
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void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp);
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void dma_free_coherent(struct device *dev, size_t size, void *kvaddr,
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dma_addr_t dma_handle);
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/* drivers/base/dma-mapping.c */
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extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size);
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extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr,
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size_t size);
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#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
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#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
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/*
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* streaming DMA Mapping API...
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* CPU accesses page via normal paddr, thus needs to explicitly made
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* consistent before each use
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*/
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static inline void __inline_dma_cache_sync(unsigned long paddr, size_t size,
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enum dma_data_direction dir)
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static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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switch (dir) {
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case DMA_FROM_DEVICE:
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dma_cache_inv(paddr, size);
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break;
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case DMA_TO_DEVICE:
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dma_cache_wback(paddr, size);
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break;
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case DMA_BIDIRECTIONAL:
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dma_cache_wback_inv(paddr, size);
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break;
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default:
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pr_err("Invalid DMA dir [%d] for OP @ %lx\n", dir, paddr);
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}
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return &arc_dma_ops;
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}
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void __arc_dma_cache_sync(unsigned long paddr, size_t size,
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enum dma_data_direction dir);
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#define _dma_cache_sync(addr, sz, dir) \
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do { \
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if (__builtin_constant_p(dir)) \
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__inline_dma_cache_sync(addr, sz, dir); \
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else \
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__arc_dma_cache_sync(addr, sz, dir); \
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} \
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while (0);
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static inline dma_addr_t
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dma_map_single(struct device *dev, void *cpu_addr, size_t size,
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enum dma_data_direction dir)
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{
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_dma_cache_sync((unsigned long)cpu_addr, size, dir);
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return (dma_addr_t)cpu_addr;
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}
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static inline void
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dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
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size_t size, enum dma_data_direction dir)
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{
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}
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static inline dma_addr_t
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dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir)
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{
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unsigned long paddr = page_to_phys(page) + offset;
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return dma_map_single(dev, (void *)paddr, size, dir);
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}
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static inline void
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dma_unmap_page(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir)
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{
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}
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static inline int
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dma_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i)
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s->dma_address = dma_map_page(dev, sg_page(s), s->offset,
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s->length, dir);
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return nents;
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}
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static inline void
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dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i)
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dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
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}
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static inline void
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dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir)
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{
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_dma_cache_sync(dma_handle, size, DMA_FROM_DEVICE);
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}
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static inline void
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dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir)
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{
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_dma_cache_sync(dma_handle, size, DMA_TO_DEVICE);
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}
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static inline void
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dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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_dma_cache_sync(dma_handle + offset, size, DMA_FROM_DEVICE);
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}
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static inline void
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dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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_dma_cache_sync(dma_handle + offset, size, DMA_TO_DEVICE);
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}
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static inline void
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dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sglist, int nelems,
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enum dma_data_direction dir)
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{
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int i;
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struct scatterlist *sg;
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for_each_sg(sglist, sg, nelems, i)
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_dma_cache_sync((unsigned int)sg_virt(sg), sg->length, dir);
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}
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static inline void
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dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist,
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int nelems, enum dma_data_direction dir)
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{
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int i;
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struct scatterlist *sg;
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for_each_sg(sglist, sg, nelems, i)
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_dma_cache_sync((unsigned int)sg_virt(sg), sg->length, dir);
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}
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static inline int dma_supported(struct device *dev, u64 dma_mask)
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{
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/* Support 32 bit DMA mask exclusively */
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return dma_mask == DMA_BIT_MASK(32);
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}
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static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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return 0;
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}
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static inline int dma_set_mask(struct device *dev, u64 dma_mask)
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{
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if (!dev->dma_mask || !dma_supported(dev, dma_mask))
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return -EIO;
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*dev->dma_mask = dma_mask;
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return 0;
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}
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#include <asm-generic/dma-mapping-common.h>
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#endif
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@ -17,18 +17,14 @@
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*/
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#include <linux/dma-mapping.h>
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#include <linux/dma-debug.h>
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#include <linux/export.h>
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#include <asm/cache.h>
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#include <asm/cacheflush.h>
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/*
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* Helpers for Coherent DMA API.
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*/
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void *dma_alloc_noncoherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp)
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static void *arc_dma_alloc(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp, struct dma_attrs *attrs)
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{
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void *paddr;
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void *paddr, *kvaddr;
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/* This is linear addr (0x8000_0000 based) */
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paddr = alloc_pages_exact(size, gfp);
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@ -38,22 +34,6 @@ void *dma_alloc_noncoherent(struct device *dev, size_t size,
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/* This is bus address, platform dependent */
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*dma_handle = (dma_addr_t)paddr;
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return paddr;
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}
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EXPORT_SYMBOL(dma_alloc_noncoherent);
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void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle)
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{
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free_pages_exact((void *)dma_handle, size);
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}
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EXPORT_SYMBOL(dma_free_noncoherent);
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void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp)
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{
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void *paddr, *kvaddr;
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/*
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* IOC relies on all data (even coherent DMA data) being in cache
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* Thus allocate normal cached memory
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@ -65,22 +45,15 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
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* -For coherent data, Read/Write to buffers terminate early in cache
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* (vs. always going to memory - thus are faster)
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*/
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if (is_isa_arcv2() && ioc_exists)
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return dma_alloc_noncoherent(dev, size, dma_handle, gfp);
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/* This is linear addr (0x8000_0000 based) */
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paddr = alloc_pages_exact(size, gfp);
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if (!paddr)
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return NULL;
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if ((is_isa_arcv2() && ioc_exists) ||
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dma_get_attr(DMA_ATTR_NON_CONSISTENT, attrs))
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return paddr;
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/* This is kernel Virtual address (0x7000_0000 based) */
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kvaddr = ioremap_nocache((unsigned long)paddr, size);
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if (kvaddr == NULL)
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return NULL;
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/* This is bus address, platform dependent */
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*dma_handle = (dma_addr_t)paddr;
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/*
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* Evict any existing L1 and/or L2 lines for the backing page
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* in case it was used earlier as a normal "cached" page.
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@ -95,26 +68,111 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
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return kvaddr;
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}
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EXPORT_SYMBOL(dma_alloc_coherent);
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void dma_free_coherent(struct device *dev, size_t size, void *kvaddr,
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dma_addr_t dma_handle)
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static void arc_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, struct dma_attrs *attrs)
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{
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if (is_isa_arcv2() && ioc_exists)
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return dma_free_noncoherent(dev, size, kvaddr, dma_handle);
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iounmap((void __force __iomem *)kvaddr);
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if (!dma_get_attr(DMA_ATTR_NON_CONSISTENT, attrs) &&
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!(is_isa_arcv2() && ioc_exists))
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iounmap((void __force __iomem *)vaddr);
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free_pages_exact((void *)dma_handle, size);
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}
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EXPORT_SYMBOL(dma_free_coherent);
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/*
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* Helper for streaming DMA...
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* streaming DMA Mapping API...
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* CPU accesses page via normal paddr, thus needs to explicitly made
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* consistent before each use
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*/
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void __arc_dma_cache_sync(unsigned long paddr, size_t size,
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enum dma_data_direction dir)
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static void _dma_cache_sync(unsigned long paddr, size_t size,
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enum dma_data_direction dir)
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{
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__inline_dma_cache_sync(paddr, size, dir);
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switch (dir) {
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case DMA_FROM_DEVICE:
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dma_cache_inv(paddr, size);
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break;
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case DMA_TO_DEVICE:
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dma_cache_wback(paddr, size);
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break;
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case DMA_BIDIRECTIONAL:
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dma_cache_wback_inv(paddr, size);
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break;
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default:
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pr_err("Invalid DMA dir [%d] for OP @ %lx\n", dir, paddr);
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}
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}
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EXPORT_SYMBOL(__arc_dma_cache_sync);
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static dma_addr_t arc_dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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unsigned long paddr = page_to_phys(page) + offset;
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_dma_cache_sync(paddr, size, dir);
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return (dma_addr_t)paddr;
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}
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static int arc_dma_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i)
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s->dma_address = dma_map_page(dev, sg_page(s), s->offset,
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s->length, dir);
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return nents;
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}
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static void arc_dma_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size, enum dma_data_direction dir)
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{
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_dma_cache_sync(dma_handle, size, DMA_FROM_DEVICE);
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}
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static void arc_dma_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size, enum dma_data_direction dir)
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{
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_dma_cache_sync(dma_handle, size, DMA_TO_DEVICE);
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}
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static void arc_dma_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sglist, int nelems,
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enum dma_data_direction dir)
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{
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int i;
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struct scatterlist *sg;
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for_each_sg(sglist, sg, nelems, i)
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_dma_cache_sync((unsigned int)sg_virt(sg), sg->length, dir);
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}
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static void arc_dma_sync_sg_for_device(struct device *dev,
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struct scatterlist *sglist, int nelems,
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enum dma_data_direction dir)
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{
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int i;
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struct scatterlist *sg;
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for_each_sg(sglist, sg, nelems, i)
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_dma_cache_sync((unsigned int)sg_virt(sg), sg->length, dir);
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}
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static int arc_dma_supported(struct device *dev, u64 dma_mask)
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{
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/* Support 32 bit DMA mask exclusively */
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return dma_mask == DMA_BIT_MASK(32);
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}
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struct dma_map_ops arc_dma_ops = {
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.alloc = arc_dma_alloc,
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.free = arc_dma_free,
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.map_page = arc_dma_map_page,
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.map_sg = arc_dma_map_sg,
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.sync_single_for_device = arc_dma_sync_single_for_device,
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.sync_single_for_cpu = arc_dma_sync_single_for_cpu,
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.sync_sg_for_cpu = arc_dma_sync_sg_for_cpu,
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.sync_sg_for_device = arc_dma_sync_sg_for_device,
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.dma_supported = arc_dma_supported,
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};
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EXPORT_SYMBOL(arc_dma_ops);
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