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PCI: read-modify-write the pcie device control register when initiating pcie flr
The pcie_flr routine writes the device control register with the FLR bit set clearing all other fields for the FLR duration. Among other fields, the Max_Payload_Size is also cleared which can cause errors if there are transactions lurking in the HW pipeline. The patch replaces the blank write with read-modify-write of the control register keeping the other fields intact. Signed-off-by: Shmulik Ravid <shmulikr@broadcom.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -2140,7 +2140,7 @@ static int pcie_flr(struct pci_dev *dev, int probe)
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int i;
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int pos;
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u32 cap;
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u16 status;
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u16 status, control;
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pos = pci_pcie_cap(dev);
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if (!pos)
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@ -2167,8 +2167,10 @@ static int pcie_flr(struct pci_dev *dev, int probe)
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"proceeding with reset anyway\n");
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clear:
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pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
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PCI_EXP_DEVCTL_BCR_FLR);
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pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &control);
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control |= PCI_EXP_DEVCTL_BCR_FLR;
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pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, control);
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msleep(100);
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return 0;
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