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https://github.com/torvalds/linux.git
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score: update files according to review comments
modified: arch/score/include/asm/cacheflush.h modified: arch/score/include/asm/delay.h modified: arch/score/include/asm/errno.h modified: arch/score/include/asm/pgtable-bits.h modified: arch/score/include/asm/pgtable.h modified: arch/score/include/asm/ptrace.h modified: arch/score/include/asm/unistd.h modified: arch/score/kernel/entry.S modified: arch/score/kernel/process.c modified: arch/score/kernel/ptrace.c modified: arch/score/kernel/signal.c modified: arch/score/kernel/sys_score.c modified: arch/score/kernel/traps.c modified: arch/score/mm/cache.c Signed-off-by: Chen Liqin <liqin.chen@sunplusct.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
parent
6bcf673741
commit
0402c91af9
@ -4,18 +4,16 @@
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/* Keep includes the same across arches. */
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#include <linux/mm.h>
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extern void (*flush_cache_all)(void);
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extern void (*flush_cache_mm)(struct mm_struct *mm);
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extern void (*flush_cache_range)(struct vm_area_struct *vma,
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extern void flush_cache_all(void);
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extern void flush_cache_mm(struct mm_struct *mm);
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extern void flush_cache_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end);
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extern void (*flush_cache_page)(struct vm_area_struct *vma,
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extern void flush_cache_page(struct vm_area_struct *vma,
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unsigned long page, unsigned long pfn);
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extern void (*flush_cache_sigtramp)(unsigned long addr);
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extern void (*flush_icache_all)(void);
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extern void (*flush_icache_range)(unsigned long start, unsigned long end);
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extern void (*flush_data_cache_page)(unsigned long addr);
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extern void s7_flush_cache_all(void);
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extern void flush_cache_sigtramp(unsigned long addr);
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extern void flush_icache_all(void);
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extern void flush_icache_range(unsigned long start, unsigned long end);
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extern void flush_dcache_range(unsigned long start, unsigned long end);
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#define flush_cache_dup_mm(mm) do {} while (0)
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#define flush_dcache_page(page) do {} while (0)
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@ -3,17 +3,22 @@
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static inline void __delay(unsigned long loops)
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{
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/* 3 cycles per loop. */
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__asm__ __volatile__ (
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"1:\tsubi\t%0,1\n\t"
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"1:\tsubi\t%0, 3\n\t"
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"cmpz.c\t%0\n\t"
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"bne\t1b\n\t"
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"ble\t1b\n\t"
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: "=r" (loops)
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: "0" (loops));
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}
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static inline void __udelay(unsigned long usecs)
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{
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__delay(usecs);
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unsigned long loops_per_usec;
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loops_per_usec = (loops_per_jiffy * HZ) / 1000000;
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__delay(usecs * loops_per_usec);
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}
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#define udelay(usecs) __udelay(usecs)
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@ -2,6 +2,5 @@
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#define _ASM_SCORE_ERRNO_H
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#include <asm-generic/errno.h>
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#define EMAXERRNO 1024
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#endif /* _ASM_SCORE_ERRNO_H */
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@ -17,6 +17,8 @@
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#define _CACHE_MASK (1<<3)
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#define _PAGE_BUFFERABLE (1<<4) /*Fallow Spec. */
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#define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED)
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#define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
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#define _PAGE_CHG_MASK \
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(PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_CACHE)
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@ -106,24 +106,6 @@ static inline void pmd_clear(pmd_t *pmdp)
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((swp_entry_t) { pte_val(pte)})
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#define __swp_entry_to_pte(x) ((pte_t) {(x).val})
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#define __P000 __pgprot(0)
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#define __P001 __pgprot(0)
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#define __P010 __pgprot(0)
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#define __P011 __pgprot(0)
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#define __P100 __pgprot(0)
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#define __P101 __pgprot(0)
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#define __P110 __pgprot(0)
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#define __P111 __pgprot(0)
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#define __S000 __pgprot(0)
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#define __S001 __pgprot(0)
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#define __S010 __pgprot(0)
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#define __S011 __pgprot(0)
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#define __S100 __pgprot(0)
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#define __S101 __pgprot(0)
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#define __S110 __pgprot(0)
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#define __S111 __pgprot(0)
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#define pmd_page(pmd) virt_to_page(__va(pmd_val(pmd)))
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#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
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static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
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@ -136,10 +118,15 @@ static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
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#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
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remap_pfn_range(vma, vaddr, pfn, size, prot)
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#define pgd_present(pgd) (1) /* pages are always present on non MMU */
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/*
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* The "pgd_xxx()" functions here are trivial for a folded two-level
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* setup: the pgd is never bad, and a pmd always exists (as it's folded
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* into the pgd entry)
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*/
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#define pgd_present(pgd) (1)
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#define pgd_none(pgd) (0)
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#define pgd_bad(pgd) (0)
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#define pgd_clear(pgdp)
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#define pgd_clear(pgdp) do { } while (0)
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#define kern_addr_valid(addr) (1)
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#define pmd_offset(a, b) ((void *) 0)
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@ -150,11 +137,33 @@ static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
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#define pud_offset(pgd, address) ((pud_t *) pgd)
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#define PAGE_NONE __pgprot(0) /* these mean nothing to non MMU */
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#define PAGE_SHARED __pgprot(0) /* these mean nothing to non MMU */
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#define PAGE_COPY __pgprot(0) /* these mean nothing to non MMU */
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#define PAGE_READONLY __pgprot(0) /* these mean nothing to non MMU */
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#define PAGE_KERNEL __pgprot(0) /* these mean nothing to non MMU */
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#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_CACHE)
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#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
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_PAGE_CACHE)
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#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_CACHE)
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#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_CACHE)
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#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
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_PAGE_GLOBAL | _PAGE_CACHE)
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#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
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__WRITEABLE | _PAGE_GLOBAL & ~_PAGE_CACHE)
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#define __P000 PAGE_NONE
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#define __P001 PAGE_READONLY
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#define __P010 PAGE_COPY
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#define __P011 PAGE_COPY
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#define __P100 PAGE_READONLY
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#define __P101 PAGE_READONLY
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#define __P110 PAGE_COPY
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#define __P111 PAGE_COPY
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#define __S000 PAGE_NONE
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#define __S001 PAGE_READONLY
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#define __S010 PAGE_SHARED
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#define __S011 PAGE_SHARED
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#define __S100 PAGE_READONLY
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#define __S101 PAGE_READONLY
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#define __S110 PAGE_SHARED
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#define __S111 PAGE_SHARED
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#define pgprot_noncached(x) (x)
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@ -1,6 +1,9 @@
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#ifndef _ASM_SCORE_PTRACE_H
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#define _ASM_SCORE_PTRACE_H
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#define PTRACE_GETREGS 12
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#define PTRACE_SETREGS 13
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#define PC 32
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#define CONDITION 33
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#define ECR 34
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@ -76,12 +79,17 @@ struct pt_regs {
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*/
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#define user_mode(regs) ((regs->cp0_psr & 8) == 8)
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#define instruction_pointer(regs) (0)
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#define profile_pc(regs) instruction_pointer(regs)
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#define instruction_pointer(regs) ((unsigned long)(regs)->cp0_epc)
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#define profile_pc(regs) instruction_pointer(regs)
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extern asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit);
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extern void do_syscall_trace(struct pt_regs *regs, int entryexit);
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extern int read_tsk_long(struct task_struct *, unsigned long, unsigned long *);
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extern void clear_single_step(struct task_struct *);
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#endif
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extern int read_tsk_short(struct task_struct *, unsigned long,
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unsigned short *);
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#define arch_has_single_step() (1)
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extern void user_enable_single_step(struct task_struct *);
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extern void user_disable_single_step(struct task_struct *);
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#endif /* __KERNEL__ */
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#endif /* _ASM_SCORE_PTRACE_H */
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@ -1,7 +1,8 @@
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#ifndef _ASM_SCORE_UNISTD_H
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#if !defined(_ASM_SCORE_UNISTD_H) || defined(__SYSCALL)
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#define _ASM_SCORE_UNISTD_H
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#define __ARCH_HAVE_MMU
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#define __ARCH_WANT_IPC_PARSE_VERSION
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#include <asm-generic/unistd.h>
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@ -23,7 +23,7 @@
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/linkage.h>
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@ -434,7 +434,7 @@ stack_done:
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sw r8, [r0, PT_R7]
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b 2f
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1:
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cmpi.c r4, -EMAXERRNO-1 # -EMAXERRNO - 1=-1134
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cmpi.c r4, -MAX_ERRNO - 1
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ble 2f
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ldi r8, 0x1;
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sw r8, [r0, PT_R7]
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@ -466,7 +466,7 @@ syscall_trace_entry:
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lw r7, [r0, PT_R7]
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brl r8
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li r8, -EMAXERRNO - 1 # error?
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li r8, -MAX_ERRNO - 1
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sw r8, [r0, PT_R7] # set error flag
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neg r4, r4 # error
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@ -56,7 +56,7 @@ void __noreturn cpu_idle(void)
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}
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}
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asmlinkage void ret_from_fork(void);
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void ret_from_fork(void);
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void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp)
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{
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@ -80,7 +80,35 @@ write_tsk_long(struct task_struct *child,
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return copied != sizeof(val) ? -EIO : 0;
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}
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void set_single_step(struct task_struct *child)
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/*
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* Get all user integer registers.
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*/
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static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
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{
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struct pt_regs *regs = task_pt_regs(tsk);
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return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
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}
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/*
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* Set all user integer registers.
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*/
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static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
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{
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struct pt_regs newregs;
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int ret;
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ret = -EFAULT;
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if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
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struct pt_regs *regs = task_pt_regs(tsk);
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*regs = newregs;
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ret = 0;
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}
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return ret;
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}
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void user_enable_single_step(struct task_struct *child)
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{
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/* far_epc is the target of branch */
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unsigned int epc, far_epc = 0;
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@ -201,7 +229,7 @@ void set_single_step(struct task_struct *child)
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}
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}
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void clear_single_step(struct task_struct *child)
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void user_disable_single_step(struct task_struct *child)
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{
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if (child->thread.insn1_type == 0)
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write_tsk_short(child, child->thread.addr1,
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@ -230,54 +258,17 @@ void clear_single_step(struct task_struct *child)
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child->thread.ss_nextcnt = 0;
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}
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void ptrace_disable(struct task_struct *child) {}
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void ptrace_disable(struct task_struct *child)
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{
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user_disable_single_step(child);
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}
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long
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arch_ptrace(struct task_struct *child, long request, long addr, long data)
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{
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int ret;
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if (request == PTRACE_TRACEME) {
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/* are we already being traced? */
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if (current->ptrace & PT_PTRACED)
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return -EPERM;
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/* set the ptrace bit in the process flags. */
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current->ptrace |= PT_PTRACED;
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return 0;
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}
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ret = -ESRCH;
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if (!child)
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return ret;
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ret = -EPERM;
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if (request == PTRACE_ATTACH) {
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ret = ptrace_attach(child);
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return ret;
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}
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ret = ptrace_check_attach(child, request == PTRACE_KILL);
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if (ret < 0)
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return ret;
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switch (request) {
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case PTRACE_PEEKTEXT: /* read word at location addr. */
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case PTRACE_PEEKDATA: {
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unsigned long tmp;
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int copied;
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copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
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ret = -EIO;
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if (copied != sizeof(tmp))
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break;
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ret = put_user(tmp, (unsigned long *) data);
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return ret;
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}
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/* Read the word at location addr in the USER area. */
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case PTRACE_PEEKUSR: {
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struct pt_regs *regs;
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@ -329,15 +320,6 @@ arch_ptrace(struct task_struct *child, long request, long addr, long data)
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return ret;
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}
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case PTRACE_POKETEXT: /* write the word at location addr. */
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case PTRACE_POKEDATA:
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ret = 0;
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if (access_process_vm(child, addr, &data, sizeof(data), 1)
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== sizeof(data))
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break;
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ret = -EIO;
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return ret;
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case PTRACE_POKEUSR: {
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struct pt_regs *regs;
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ret = 0;
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@ -372,64 +354,16 @@ arch_ptrace(struct task_struct *child, long request, long addr, long data)
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break;
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}
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case PTRACE_SYSCALL: /* continue and stop at next
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(return from) syscall. */
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case PTRACE_CONT: { /* restart after signal. */
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ret = -EIO;
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if (!valid_signal(data))
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break;
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if (request == PTRACE_SYSCALL)
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set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
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else
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clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
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child->exit_code = data;
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wake_up_process(child);
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ret = 0;
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break;
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}
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/*
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* make the child exit. Best I can do is send it a sigkill.
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* perhaps it should be put in the status that it wants to
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* exit.
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*/
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case PTRACE_KILL:
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ret = 0;
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if (child->state == EXIT_ZOMBIE) /* already dead. */
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break;
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child->exit_code = SIGKILL;
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clear_single_step(child);
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wake_up_process(child);
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case PTRACE_GETREGS:
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ret = ptrace_getregs(child, (void __user *)data);
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break;
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case PTRACE_SINGLESTEP: { /* set the trap flag. */
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ret = -EIO;
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if ((unsigned long) data > _NSIG)
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break;
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clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
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set_single_step(child);
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child->exit_code = data;
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/* give it a chance to run. */
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wake_up_process(child);
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ret = 0;
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break;
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}
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case PTRACE_DETACH: /* detach a process that was attached. */
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ret = ptrace_detach(child, data);
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break;
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case PTRACE_SETOPTIONS:
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if (data & PTRACE_O_TRACESYSGOOD)
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child->ptrace |= PT_TRACESYSGOOD;
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else
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child->ptrace &= ~PT_TRACESYSGOOD;
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ret = 0;
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case PTRACE_SETREGS:
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ret = ptrace_setregs(child, (void __user *)data);
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break;
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default:
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ret = -EIO;
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ret = ptrace_request(child, request, addr, data);
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break;
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}
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|
@ -132,7 +132,7 @@ void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
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return (void *)((sp - frame_size) & ~7);
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}
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asmlinkage int score_sigaltstack(struct pt_regs *regs)
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int score_sigaltstack(struct pt_regs *regs)
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{
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const stack_t *uss = (const stack_t *) regs->regs[4];
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stack_t *uoss = (stack_t *) regs->regs[5];
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@ -141,7 +141,7 @@ asmlinkage int score_sigaltstack(struct pt_regs *regs)
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return do_sigaltstack(uss, uoss, usp);
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}
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asmlinkage void score_rt_sigreturn(struct pt_regs *regs)
|
||||
void score_rt_sigreturn(struct pt_regs *regs)
|
||||
{
|
||||
struct rt_sigframe __user *frame;
|
||||
sigset_t set;
|
||||
@ -276,7 +276,7 @@ int handle_signal(unsigned long sig, siginfo_t *info,
|
||||
return ret;
|
||||
}
|
||||
|
||||
asmlinkage void do_signal(struct pt_regs *regs)
|
||||
void do_signal(struct pt_regs *regs)
|
||||
{
|
||||
struct k_sigaction ka;
|
||||
sigset_t *oldset;
|
||||
|
@ -64,8 +64,7 @@ sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
|
||||
* Clone a task - this clones the calling program thread.
|
||||
* This is called indirectly via a small wrapper
|
||||
*/
|
||||
asmlinkage int
|
||||
score_clone(struct pt_regs *regs)
|
||||
int score_clone(struct pt_regs *regs)
|
||||
{
|
||||
unsigned long clone_flags;
|
||||
unsigned long newsp;
|
||||
@ -93,7 +92,7 @@ score_clone(struct pt_regs *regs)
|
||||
* sys_execve() executes a new program.
|
||||
* This is called indirectly via a small wrapper
|
||||
*/
|
||||
asmlinkage int score_execve(struct pt_regs *regs)
|
||||
int score_execve(struct pt_regs *regs)
|
||||
{
|
||||
int error;
|
||||
char *filename;
|
||||
@ -114,7 +113,7 @@ asmlinkage int score_execve(struct pt_regs *regs)
|
||||
* If we ever come here the user sp is bad. Zap the process right away.
|
||||
* Due to the bad stack signaling wouldn't work.
|
||||
*/
|
||||
asmlinkage void bad_stack(void)
|
||||
void bad_stack(void)
|
||||
{
|
||||
do_exit(SIGSEGV);
|
||||
}
|
||||
|
@ -252,7 +252,7 @@ asmlinkage void do_ri(struct pt_regs *regs)
|
||||
if (current->thread.single_step == 1) {
|
||||
if ((epc == current->thread.addr1) ||
|
||||
(epc == current->thread.addr2)) {
|
||||
clear_single_step(current);
|
||||
user_disable_single_step(current);
|
||||
force_sig(SIGTRAP, current);
|
||||
return;
|
||||
} else
|
||||
|
@ -32,34 +32,26 @@
|
||||
|
||||
#include <asm/mmu_context.h>
|
||||
|
||||
/* Cache operations. */
|
||||
void (*flush_cache_all)(void);
|
||||
void (*__flush_cache_all)(void);
|
||||
void (*flush_cache_mm)(struct mm_struct *mm);
|
||||
void (*flush_cache_range)(struct vm_area_struct *vma,
|
||||
unsigned long start, unsigned long end);
|
||||
void (*flush_cache_page)(struct vm_area_struct *vma,
|
||||
unsigned long page, unsigned long pfn);
|
||||
void (*flush_icache_range)(unsigned long start, unsigned long end);
|
||||
void (*__flush_cache_vmap)(void);
|
||||
void (*__flush_cache_vunmap)(void);
|
||||
void (*flush_cache_sigtramp)(unsigned long addr);
|
||||
void (*flush_data_cache_page)(unsigned long addr);
|
||||
EXPORT_SYMBOL(flush_data_cache_page);
|
||||
void (*flush_icache_all)(void);
|
||||
|
||||
/*Score 7 cache operations*/
|
||||
static inline void s7___flush_cache_all(void);
|
||||
static void s7_flush_cache_mm(struct mm_struct *mm);
|
||||
static void s7_flush_cache_range(struct vm_area_struct *vma,
|
||||
unsigned long start, unsigned long end);
|
||||
static void s7_flush_cache_page(struct vm_area_struct *vma,
|
||||
unsigned long page, unsigned long pfn);
|
||||
static void s7_flush_icache_range(unsigned long start, unsigned long end);
|
||||
static void s7_flush_cache_sigtramp(unsigned long addr);
|
||||
static void s7_flush_data_cache_page(unsigned long addr);
|
||||
static void s7_flush_dcache_range(unsigned long start, unsigned long end);
|
||||
/*
|
||||
Just flush entire Dcache!!
|
||||
You must ensure the page doesn't include instructions, because
|
||||
the function will not flush the Icache.
|
||||
The addr must be cache aligned.
|
||||
*/
|
||||
static void flush_data_cache_page(unsigned long addr)
|
||||
{
|
||||
unsigned int i;
|
||||
for (i = 0; i < (PAGE_SIZE / L1_CACHE_BYTES); i += L1_CACHE_BYTES) {
|
||||
__asm__ __volatile__(
|
||||
"cache 0x0e, [%0, 0]\n"
|
||||
"cache 0x1a, [%0, 0]\n"
|
||||
"nop\n"
|
||||
: : "r" (addr));
|
||||
addr += L1_CACHE_BYTES;
|
||||
}
|
||||
}
|
||||
|
||||
/* called by update_mmu_cache. */
|
||||
void __update_cache(struct vm_area_struct *vma, unsigned long address,
|
||||
pte_t pte)
|
||||
{
|
||||
@ -74,7 +66,7 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address,
|
||||
if (page_mapping(page) && test_bit(PG_arch_1, &page->flags)) {
|
||||
addr = (unsigned long) page_address(page);
|
||||
if (exec)
|
||||
s7_flush_data_cache_page(addr);
|
||||
flush_data_cache_page(addr);
|
||||
clear_bit(PG_arch_1, &page->flags);
|
||||
}
|
||||
}
|
||||
@ -101,31 +93,22 @@ static inline void setup_protection_map(void)
|
||||
|
||||
void __devinit cpu_cache_init(void)
|
||||
{
|
||||
flush_cache_all = s7_flush_cache_all;
|
||||
__flush_cache_all = s7___flush_cache_all;
|
||||
flush_cache_mm = s7_flush_cache_mm;
|
||||
flush_cache_range = s7_flush_cache_range;
|
||||
flush_cache_page = s7_flush_cache_page;
|
||||
flush_icache_range = s7_flush_icache_range;
|
||||
flush_cache_sigtramp = s7_flush_cache_sigtramp;
|
||||
flush_data_cache_page = s7_flush_data_cache_page;
|
||||
|
||||
setup_protection_map();
|
||||
}
|
||||
|
||||
void s7_flush_icache_all(void)
|
||||
void flush_icache_all(void)
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
"la r8, s7_flush_icache_all\n"
|
||||
"la r8, flush_icache_all\n"
|
||||
"cache 0x10, [r8, 0]\n"
|
||||
"nop\nnop\nnop\nnop\nnop\nnop\n"
|
||||
: : : "r8");
|
||||
}
|
||||
|
||||
void s7_flush_dcache_all(void)
|
||||
void flush_dcache_all(void)
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
"la r8, s7_flush_dcache_all\n"
|
||||
"la r8, flush_dcache_all\n"
|
||||
"cache 0x1f, [r8, 0]\n"
|
||||
"nop\nnop\nnop\nnop\nnop\nnop\n"
|
||||
"cache 0x1a, [r8, 0]\n"
|
||||
@ -133,10 +116,10 @@ void s7_flush_dcache_all(void)
|
||||
: : : "r8");
|
||||
}
|
||||
|
||||
void s7_flush_cache_all(void)
|
||||
void flush_cache_all(void)
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
"la r8, s7_flush_cache_all\n"
|
||||
"la r8, flush_cache_all\n"
|
||||
"cache 0x10, [r8, 0]\n"
|
||||
"nop\nnop\nnop\nnop\nnop\nnop\n"
|
||||
"cache 0x1f, [r8, 0]\n"
|
||||
@ -146,24 +129,11 @@ void s7_flush_cache_all(void)
|
||||
: : : "r8");
|
||||
}
|
||||
|
||||
void s7___flush_cache_all(void)
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
"la r8, s7_flush_cache_all\n"
|
||||
"cache 0x10, [r8, 0]\n"
|
||||
"nop\nnop\nnop\nnop\nnop\nnop\n"
|
||||
"cache 0x1f, [r8, 0]\n"
|
||||
"nop\nnop\nnop\nnop\nnop\nnop\n"
|
||||
"cache 0x1a, [r8, 0]\n"
|
||||
"nop\nnop\nnop\nnop\nnop\nnop\n"
|
||||
: : : "r8");
|
||||
}
|
||||
|
||||
static void s7_flush_cache_mm(struct mm_struct *mm)
|
||||
void flush_cache_mm(struct mm_struct *mm)
|
||||
{
|
||||
if (!(mm->context))
|
||||
return;
|
||||
s7_flush_cache_all();
|
||||
flush_cache_all();
|
||||
}
|
||||
|
||||
/*if we flush a range precisely , the processing may be very long.
|
||||
@ -176,8 +146,7 @@ The interface is provided in hopes that the port can find
|
||||
a suitably efficient method for removing multiple page
|
||||
sized regions from the cache.
|
||||
*/
|
||||
static void
|
||||
s7_flush_cache_range(struct vm_area_struct *vma,
|
||||
void flush_cache_range(struct vm_area_struct *vma,
|
||||
unsigned long start, unsigned long end)
|
||||
{
|
||||
struct mm_struct *mm = vma->vm_mm;
|
||||
@ -209,27 +178,26 @@ s7_flush_cache_range(struct vm_area_struct *vma,
|
||||
tmpend = (start | (PAGE_SIZE-1)) > end ?
|
||||
end : (start | (PAGE_SIZE-1));
|
||||
|
||||
s7_flush_dcache_range(start, tmpend);
|
||||
flush_dcache_range(start, tmpend);
|
||||
if (exec)
|
||||
s7_flush_icache_range(start, tmpend);
|
||||
flush_icache_range(start, tmpend);
|
||||
start = (start + PAGE_SIZE) & ~(PAGE_SIZE - 1);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
s7_flush_cache_page(struct vm_area_struct *vma,
|
||||
void flush_cache_page(struct vm_area_struct *vma,
|
||||
unsigned long addr, unsigned long pfn)
|
||||
{
|
||||
int exec = vma->vm_flags & VM_EXEC;
|
||||
unsigned long kaddr = 0xa0000000 | (pfn << PAGE_SHIFT);
|
||||
|
||||
s7_flush_dcache_range(kaddr, kaddr + PAGE_SIZE);
|
||||
flush_dcache_range(kaddr, kaddr + PAGE_SIZE);
|
||||
|
||||
if (exec)
|
||||
s7_flush_icache_range(kaddr, kaddr + PAGE_SIZE);
|
||||
flush_icache_range(kaddr, kaddr + PAGE_SIZE);
|
||||
}
|
||||
|
||||
static void s7_flush_cache_sigtramp(unsigned long addr)
|
||||
void flush_cache_sigtramp(unsigned long addr)
|
||||
{
|
||||
__asm__ __volatile__(
|
||||
"cache 0x02, [%0, 0]\n"
|
||||
@ -247,31 +215,12 @@ static void s7_flush_cache_sigtramp(unsigned long addr)
|
||||
: : "r" (addr));
|
||||
}
|
||||
|
||||
/*
|
||||
Just flush entire Dcache!!
|
||||
You must ensure the page doesn't include instructions, because
|
||||
the function will not flush the Icache.
|
||||
The addr must be cache aligned.
|
||||
*/
|
||||
static void s7_flush_data_cache_page(unsigned long addr)
|
||||
{
|
||||
unsigned int i;
|
||||
for (i = 0; i < (PAGE_SIZE / L1_CACHE_BYTES); i += L1_CACHE_BYTES) {
|
||||
__asm__ __volatile__(
|
||||
"cache 0x0e, [%0, 0]\n"
|
||||
"cache 0x1a, [%0, 0]\n"
|
||||
"nop\n"
|
||||
: : "r" (addr));
|
||||
addr += L1_CACHE_BYTES;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
1. WB and invalid a cache line of Dcache
|
||||
2. Drain Write Buffer
|
||||
the range must be smaller than PAGE_SIZE
|
||||
*/
|
||||
static void s7_flush_dcache_range(unsigned long start, unsigned long end)
|
||||
void flush_dcache_range(unsigned long start, unsigned long end)
|
||||
{
|
||||
int size, i;
|
||||
|
||||
@ -290,7 +239,7 @@ static void s7_flush_dcache_range(unsigned long start, unsigned long end)
|
||||
}
|
||||
}
|
||||
|
||||
static void s7_flush_icache_range(unsigned long start, unsigned long end)
|
||||
void flush_icache_range(unsigned long start, unsigned long end)
|
||||
{
|
||||
int size, i;
|
||||
start = start & ~(L1_CACHE_BYTES - 1);
|
||||
|
Loading…
Reference in New Issue
Block a user