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dts: vt8500: Fix errors in SDHC node for WM8505

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According to datasheet, the registers space of SDHC controller is 1Kb,
not '0x1000', the correct value should be '0x400'. Bracket interrupt
numbers individually per recommendations.

Signed-off-by: Roman Volkov <rvolkov@v1ros.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Roman Volkov 2016-01-01 16:38:12 +03:00 committed by Arnd Bergmann
parent 9962b3d4f0
commit 03b9ee45bc
1 changed files with 2 additions and 2 deletions
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4
arch/arm/boot/dts/wm8505.dtsi
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@ -281,8 +281,8 @@
sdhc@d800a000 { sdhc@d800a000 {
compatible = "wm,wm8505-sdhc"; compatible = "wm,wm8505-sdhc";
reg = <0xd800a000 0x1000>; reg = <0xd800a000 0x400>;
interrupts = <20 21>; interrupts = <20>, <21>;
clocks = <&clksdhc>; clocks = <&clksdhc>;
bus-width = <4>; bus-width = <4>;
}; };