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ARM: OMAP5: hwmod data: Add mailbox data
Add the hwmod data for the mailbox IP in OMAP5 SoC. This is needed to be able to enable the OMAP mailbox support for OMAP5. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -740,6 +740,39 @@ static struct omap_hwmod omap54xx_kbd_hwmod = {
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},
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};
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/*
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* 'mailbox' class
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* mailbox module allowing communication between the on-chip processors using a
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* queued mailbox-interrupt mechanism.
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*/
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static struct omap_hwmod_class_sysconfig omap54xx_mailbox_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.sysc_flags = (SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE |
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SYSC_HAS_SOFTRESET),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type2,
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};
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static struct omap_hwmod_class omap54xx_mailbox_hwmod_class = {
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.name = "mailbox",
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.sysc = &omap54xx_mailbox_sysc,
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};
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/* mailbox */
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static struct omap_hwmod omap54xx_mailbox_hwmod = {
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.name = "mailbox",
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.class = &omap54xx_mailbox_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP54XX_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET,
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.context_offs = OMAP54XX_RM_L4CFG_MAILBOX_CONTEXT_OFFSET,
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},
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},
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};
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/*
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* 'mcbsp' class
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* multi channel buffered serial port controller
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@ -1808,6 +1841,14 @@ static struct omap_hwmod_ocp_if omap54xx_l4_wkup__kbd = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> mailbox */
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static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mailbox = {
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.master = &omap54xx_l4_cfg_hwmod,
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.slave = &omap54xx_mailbox_hwmod,
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.clk = "l4_root_clk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_abe -> mcbsp1 */
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static struct omap_hwmod_ocp_if omap54xx_l4_abe__mcbsp1 = {
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.master = &omap54xx_l4_abe_hwmod,
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@ -2108,6 +2149,7 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
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&omap54xx_l4_per__i2c4,
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&omap54xx_l4_per__i2c5,
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&omap54xx_l4_wkup__kbd,
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&omap54xx_l4_cfg__mailbox,
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&omap54xx_l4_abe__mcbsp1,
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&omap54xx_l4_abe__mcbsp2,
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&omap54xx_l4_abe__mcbsp3,
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