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mt76: move mt76x02_phy_set_bw in mt76x02-lib module
Move mt76x02_phy_set_bw routine in mt76x02_phy.c since it is shared between mt76x0 and mt76x2 drivers and remove duplicated code Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
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7859c543b6
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032c08f4c6
@ -214,33 +214,6 @@ int mt76x0_wait_bbp_ready(struct mt76x02_dev *dev)
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return 0;
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}
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static void
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mt76x0_bbp_set_ctrlch(struct mt76x02_dev *dev, enum nl80211_chan_width width,
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u8 ctrl)
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{
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int core_val, agc_val;
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switch (width) {
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case NL80211_CHAN_WIDTH_80:
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core_val = 3;
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agc_val = 7;
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break;
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case NL80211_CHAN_WIDTH_40:
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core_val = 2;
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agc_val = 3;
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break;
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default:
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core_val = 0;
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agc_val = 1;
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break;
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}
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mt76_rmw_field(dev, MT_BBP(CORE, 1), MT_BBP_CORE_R1_BW, core_val);
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mt76_rmw_field(dev, MT_BBP(AGC, 0), MT_BBP_AGC_R0_BW, agc_val);
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mt76_rmw_field(dev, MT_BBP(AGC, 0), MT_BBP_AGC_R0_CTRL_CHAN, ctrl);
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mt76_rmw_field(dev, MT_BBP(TXBE, 0), MT_BBP_TXBE_R0_CTRL_CHAN, ctrl);
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}
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static void mt76x0_vco_cal(struct mt76x02_dev *dev, u8 channel)
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{
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u8 val;
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@ -681,7 +654,7 @@ int mt76x0_phy_set_channel(struct mt76x02_dev *dev,
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}
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mt76x0_bbp_set_bw(dev, chandef->width);
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mt76x0_bbp_set_ctrlch(dev, chandef->width, ch_group_index);
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mt76x02_phy_set_bw(dev, chandef->width, ch_group_index);
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mt76x0_mac_set_ctrlch(dev, ch_group_index & 1);
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mt76x0_ant_select(dev);
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@ -178,3 +178,29 @@ int mt76x02_phy_get_min_avg_rssi(struct mt76x02_dev *dev)
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return min_rssi;
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}
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EXPORT_SYMBOL_GPL(mt76x02_phy_get_min_avg_rssi);
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void mt76x02_phy_set_bw(struct mt76x02_dev *dev, int width, u8 ctrl)
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{
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int core_val, agc_val;
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switch (width) {
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case NL80211_CHAN_WIDTH_80:
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core_val = 3;
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agc_val = 7;
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break;
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case NL80211_CHAN_WIDTH_40:
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core_val = 2;
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agc_val = 3;
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break;
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default:
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core_val = 0;
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agc_val = 1;
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break;
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}
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mt76_rmw_field(dev, MT_BBP(CORE, 1), MT_BBP_CORE_R1_BW, core_val);
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mt76_rmw_field(dev, MT_BBP(AGC, 0), MT_BBP_AGC_R0_BW, agc_val);
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mt76_rmw_field(dev, MT_BBP(AGC, 0), MT_BBP_AGC_R0_CTRL_CHAN, ctrl);
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mt76_rmw_field(dev, MT_BBP(TXBE, 0), MT_BBP_TXBE_R0_CTRL_CHAN, ctrl);
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}
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EXPORT_SYMBOL_GPL(mt76x02_phy_set_bw);
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@ -26,5 +26,6 @@ int mt76x02_get_max_rate_power(struct mt76_rate_power *r);
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void mt76x02_phy_set_rxpath(struct mt76x02_dev *dev);
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void mt76x02_phy_set_txdac(struct mt76x02_dev *dev);
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int mt76x02_phy_get_min_avg_rssi(struct mt76x02_dev *dev);
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void mt76x02_phy_set_bw(struct mt76x02_dev *dev, int width, u8 ctrl);
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#endif /* __MT76x02_PHY_H */
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@ -100,7 +100,6 @@ void mt76x2_phy_set_txpower_regs(struct mt76x02_dev *dev,
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enum nl80211_band band);
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void mt76x2_configure_tx_delay(struct mt76x02_dev *dev,
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enum nl80211_band band, u8 bw);
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void mt76x2_phy_set_bw(struct mt76x02_dev *dev, int width, u8 ctrl);
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void mt76x2_phy_set_band(struct mt76x02_dev *dev, int band, bool primary_upper);
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void mt76x2_apply_gain_adj(struct mt76x02_dev *dev);
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@ -338,7 +338,7 @@ int mt76x2_phy_set_channel(struct mt76x02_dev *dev,
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mt76x2_phy_set_txpower(dev);
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mt76x2_phy_set_band(dev, chan->band, ch_group_index & 1);
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mt76x2_phy_set_bw(dev, chandef->width, ch_group_index);
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mt76x02_phy_set_bw(dev, chandef->width, ch_group_index);
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mt76_rmw(dev, MT_EXT_CCA_CFG,
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(MT_EXT_CCA_CFG_CCA0 |
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@ -210,32 +210,6 @@ void mt76x2_configure_tx_delay(struct mt76x02_dev *dev,
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}
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EXPORT_SYMBOL_GPL(mt76x2_configure_tx_delay);
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void mt76x2_phy_set_bw(struct mt76x02_dev *dev, int width, u8 ctrl)
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{
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int core_val, agc_val;
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switch (width) {
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case NL80211_CHAN_WIDTH_80:
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core_val = 3;
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agc_val = 7;
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break;
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case NL80211_CHAN_WIDTH_40:
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core_val = 2;
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agc_val = 3;
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break;
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default:
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core_val = 0;
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agc_val = 1;
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break;
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}
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mt76_rmw_field(dev, MT_BBP(CORE, 1), MT_BBP_CORE_R1_BW, core_val);
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mt76_rmw_field(dev, MT_BBP(AGC, 0), MT_BBP_AGC_R0_BW, agc_val);
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mt76_rmw_field(dev, MT_BBP(AGC, 0), MT_BBP_AGC_R0_CTRL_CHAN, ctrl);
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mt76_rmw_field(dev, MT_BBP(TXBE, 0), MT_BBP_TXBE_R0_CTRL_CHAN, ctrl);
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}
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EXPORT_SYMBOL_GPL(mt76x2_phy_set_bw);
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void mt76x2_phy_set_band(struct mt76x02_dev *dev, int band, bool primary_upper)
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{
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switch (band) {
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@ -156,7 +156,7 @@ int mt76x2u_phy_set_channel(struct mt76x02_dev *dev,
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mt76x2_phy_set_txpower(dev);
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mt76x2_phy_set_band(dev, chan->band, ch_group_index & 1);
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mt76x2_phy_set_bw(dev, chandef->width, ch_group_index);
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mt76x02_phy_set_bw(dev, chandef->width, ch_group_index);
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mt76_rmw(dev, MT_EXT_CCA_CFG,
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(MT_EXT_CCA_CFG_CCA0 |
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