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drm/i915: Move ring_begin to signal()

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Add_request has always contained both the semaphore mailbox updates as
well as the breadcrumb writes. Since the semaphore signal is the one
which actually knows about the number of dwords it needs to emit to the
ring, we move the ring_begin to that function. This allows us to remove
the hideously shared #define

On a related not, gen8 will use a different number of dwords for
semaphores, but not for add request.

v2: Make number of dwords an explicit part of signalling (via function
argument). (Chris)

v3: very slight comment change

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Ben Widawsky 2014-04-29 14:52:30 -07:00 committed by Daniel Vetter
parent 78325f2d27
commit 024a43e12c
2 changed files with 25 additions and 18 deletions
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39
drivers/gpu/drm/i915/intel_ringbuffer.c
View File

@ -663,18 +663,28 @@ static void render_ring_cleanup(struct intel_ring_buffer *ring)
ring->scratch.obj = NULL;
}
static void gen6_signal(struct intel_ring_buffer *signaller)
static int gen6_signal(struct intel_ring_buffer *signaller,
unsigned int num_dwords)
{
struct drm_i915_private *dev_priv = signaller->dev->dev_private;
struct drm_device *dev = signaller->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_ring_buffer *useless;
int i;
int i, ret;
/* NB: In order to be able to do semaphore MBOX updates for varying number
* of rings, it's easiest if we round up each individual update to a
* multiple of 2 (since ring updates must always be a multiple of 2)
* even though the actual update only requires 3 dwords.
*/
/* NB: In order to be able to do semaphore MBOX updates for varying
* number of rings, it's easiest if we round up each individual update
* to a multiple of 2 (since ring updates must always be a multiple of
* 2) even though the actual update only requires 3 dwords.
*/
#define MBOX_UPDATE_DWORDS 4
if (i915_semaphore_is_enabled(dev))
num_dwords += ((I915_NUM_RINGS-1) * MBOX_UPDATE_DWORDS);
ret = intel_ring_begin(signaller, num_dwords);
if (ret)
return ret;
#undef MBOX_UPDATE_DWORDS
for_each_ring(useless, dev_priv, i) {
u32 mbox_reg = signaller->semaphore.mbox.signal[i];
if (mbox_reg != GEN6_NOSYNC) {
@ -689,6 +699,8 @@ static void gen6_signal(struct intel_ring_buffer *signaller)
intel_ring_emit(signaller, MI_NOOP);
}
}
return 0;
}
/**
@ -703,19 +715,12 @@ static void gen6_signal(struct intel_ring_buffer *signaller)
static int
gen6_add_request(struct intel_ring_buffer *ring)
{
struct drm_device *dev = ring->dev;
int ret, num_dwords = 4;
int ret;
if (i915_semaphore_is_enabled(dev))
num_dwords += ((I915_NUM_RINGS-1) * MBOX_UPDATE_DWORDS);
#undef MBOX_UPDATE_DWORDS
ret = intel_ring_begin(ring, num_dwords);
ret = ring->semaphore.signal(ring, 4);
if (ret)
return ret;
ring->semaphore.signal(ring);
intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
intel_ring_emit(ring, ring->outstanding_lazy_seqno);

4
drivers/gpu/drm/i915/intel_ringbuffer.h
View File

@ -132,7 +132,9 @@ struct intel_ring_buffer {
int (*sync_to)(struct intel_ring_buffer *ring,
struct intel_ring_buffer *to,
u32 seqno);
void (*signal)(struct intel_ring_buffer *signaller);
int (*signal)(struct intel_ring_buffer *signaller,
/* num_dwords needed by caller */
unsigned int num_dwords);
} semaphore;
/**