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iio: imu: adis_trigger: Allow level interrupts for FIFO readings
Currently, adis library allows configuration only for edge interrupts, needed for data ready sampling. This patch removes the restriction for level interrupts for devices which have FIFO support. Furthermore, in case of devices which have FIFO support, devm_request_threaded_irq is used for interrupt allocation, to avoid flooding the processor with the FIFO watermark level interrupt, which is active until enough data has been read from the FIFO. Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: Ramona Gradinariu <ramona.bolboaca13@gmail.com> Link: https://lore.kernel.org/r/20240527142618.275897-7-ramona.bolboaca13@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -34,17 +34,24 @@ static int adis_validate_irq_flag(struct adis *adis)
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if (adis->data->unmasked_drdy)
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if (adis->data->unmasked_drdy)
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adis->irq_flag |= IRQF_NO_AUTOEN;
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adis->irq_flag |= IRQF_NO_AUTOEN;
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/*
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/*
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* Typically this devices have data ready either on the rising edge or
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* Typically adis devices without FIFO have data ready either on the
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* on the falling edge of the data ready pin. This checks enforces that
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* rising edge or on the falling edge of the data ready pin.
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* one of those is set in the drivers... It defaults to
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* IMU devices with FIFO support have the watermark pin level driven
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* IRQF_TRIGGER_RISING for backward compatibility with devices that
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* either high or low when the FIFO is filled with the desired number
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* don't support changing the pin polarity.
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* of samples.
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* It defaults to IRQF_TRIGGER_RISING for backward compatibility with
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* devices that don't support changing the pin polarity.
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*/
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*/
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if (direction == IRQF_TRIGGER_NONE) {
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if (direction == IRQF_TRIGGER_NONE) {
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adis->irq_flag |= IRQF_TRIGGER_RISING;
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adis->irq_flag |= IRQF_TRIGGER_RISING;
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return 0;
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return 0;
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} else if (direction != IRQF_TRIGGER_RISING &&
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} else if (direction != IRQF_TRIGGER_RISING &&
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direction != IRQF_TRIGGER_FALLING) {
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direction != IRQF_TRIGGER_FALLING && !adis->data->has_fifo) {
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dev_err(&adis->spi->dev, "Invalid IRQ mask: %08lx\n",
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adis->irq_flag);
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return -EINVAL;
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} else if (direction != IRQF_TRIGGER_HIGH &&
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direction != IRQF_TRIGGER_LOW && adis->data->has_fifo) {
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dev_err(&adis->spi->dev, "Invalid IRQ mask: %08lx\n",
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dev_err(&adis->spi->dev, "Invalid IRQ mask: %08lx\n",
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adis->irq_flag);
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adis->irq_flag);
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return -EINVAL;
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return -EINVAL;
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@ -77,11 +84,19 @@ int devm_adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev)
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if (ret)
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if (ret)
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return ret;
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return ret;
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ret = devm_request_irq(&adis->spi->dev, adis->spi->irq,
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if (adis->data->has_fifo)
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&iio_trigger_generic_data_rdy_poll,
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ret = devm_request_threaded_irq(&adis->spi->dev, adis->spi->irq,
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adis->irq_flag,
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NULL,
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indio_dev->name,
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&iio_trigger_generic_data_rdy_poll,
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adis->trig);
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adis->irq_flag | IRQF_ONESHOT,
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indio_dev->name,
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adis->trig);
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else
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ret = devm_request_irq(&adis->spi->dev, adis->spi->irq,
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&iio_trigger_generic_data_rdy_poll,
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adis->irq_flag,
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indio_dev->name,
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adis->trig);
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if (ret)
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if (ret)
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return ret;
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return ret;
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@ -85,6 +85,7 @@ struct adis_data {
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bool unmasked_drdy;
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bool unmasked_drdy;
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bool has_paging;
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bool has_paging;
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bool has_fifo;
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unsigned int burst_reg_cmd;
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unsigned int burst_reg_cmd;
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unsigned int burst_len;
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unsigned int burst_len;
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