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serial: mxs-auart: fix the wrong RTS hardware flow control
Without checking if the auart supports the hardware flow control or not, the old mxs_auart_set_mctrl() asserted the RTS pin blindly. This will causes the auart receives wrong data in the following case: The far-end has already started the write operation, and wait for the auart asserts the RTS pin. Then the auart starts the read operation, but mxs_auart_set_mctrl() may be called before we set the RTSCTS in the mxs_auart_settermios(). So the RTS pin is asserted in a wrong situation, and we get the wrong data in the end. This bug has been catched when I connect the mx23(DTE) to the mx53(DCE). This patch also replaces the AUART_CTRL2_RTS with AUART_CTRL2_RTSEN. We should use the real the hardware flow control, not the software-controled hardware flow control. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -73,6 +73,7 @@
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#define AUART_CTRL0_CLKGATE (1 << 30)
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#define AUART_CTRL2_CTSEN (1 << 15)
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#define AUART_CTRL2_RTSEN (1 << 14)
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#define AUART_CTRL2_RTS (1 << 11)
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#define AUART_CTRL2_RXE (1 << 9)
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#define AUART_CTRL2_TXE (1 << 8)
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@ -259,9 +260,12 @@ static void mxs_auart_set_mctrl(struct uart_port *u, unsigned mctrl)
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u32 ctrl = readl(u->membase + AUART_CTRL2);
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ctrl &= ~AUART_CTRL2_RTS;
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if (mctrl & TIOCM_RTS)
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ctrl |= AUART_CTRL2_RTS;
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ctrl &= ~AUART_CTRL2_RTSEN;
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if (mctrl & TIOCM_RTS) {
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if (u->state->port.flags & ASYNC_CTS_FLOW)
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ctrl |= AUART_CTRL2_RTSEN;
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}
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s->ctrl = mctrl;
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writel(ctrl, u->membase + AUART_CTRL2);
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}
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@ -359,9 +363,9 @@ static void mxs_auart_settermios(struct uart_port *u,
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/* figure out the hardware flow control settings */
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if (cflag & CRTSCTS)
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ctrl2 |= AUART_CTRL2_CTSEN;
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ctrl2 |= AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN;
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else
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ctrl2 &= ~AUART_CTRL2_CTSEN;
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ctrl2 &= ~(AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN);
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/* set baud rate */
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baud = uart_get_baud_rate(u, termios, old, 0, u->uartclk);
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