linux/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright 2017 Icenowy Zheng <icenowy@aosc.xyz>
 */

#ifndef _CCU_SUN50I_H6_R_H
#define _CCU_SUN50I_H6_R_H

#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
#include <dt-bindings/reset/sun50i-h6-r-ccu.h>

/* AHB/APB bus clocks are not exported except APB1 for R_PIO */
#define CLK_R_AHB	1

#define CLK_R_APB2	3

#define CLK_NUMBER	(CLK_R_APB1_RTC + 1)

#endif /* _CCU_SUN50I_H6_R_H */
clk: sunxi-ng: add support for H6 PRCM CCU The H6 has clock/reset controls in PRCM part, like old SoCs such as H3 and A64. However, the PRCM CCU is rearranged; the register arragement is now similar to the main CCU of H6, and the PRCM now has two APB buses to control -- one is clocked from AHB clock derivde from AR100 clock, the other is clocked from the same mux with AR100 clock. Therefore a new driver is written for it. As there's no official document about the PRCM in H6, all the information are indirectly collected from BSP and parts of the document, and the information source is noted as comments in the driver's source code. If reliable information is provided furtherly, the driver needs to be rechecked. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> 2018-05-03 18:38:41 +00:00			`/* SPDX-License-Identifier: GPL-2.0 */`
			`/*`
			`* Copyright 2017 Icenowy Zheng <icenowy@aosc.xyz>`
			`*/`

			`#ifndef _CCU_SUN50I_H6_R_H`
			`#define _CCU_SUN50I_H6_R_H`

			`#include <dt-bindings/clock/sun50i-h6-r-ccu.h>`
			`#include <dt-bindings/reset/sun50i-h6-r-ccu.h>`

			`/* AHB/APB bus clocks are not exported except APB1 for R_PIO */`
			`#define CLK_R_AHB 1`

			`#define CLK_R_APB2 3`

clk: sunxi-ng: h6-r: Add RTC gate clock The H6 and H616 feature an (undocumented) bus clock gate for accessing the RTC registers. This seems to be enabled at reset (or by the BootROM), so we got away without it so far, but exists regardless. Since the new RTC clock binding for the H616 requires this "bus" clock to be specified in the DT, add this to R_CCU clock driver and expose it on the DT side with a new number. We do this for both the H6 and H616, but mark it as IGNORE_UNUSED, as we cannot reference it in any H6 DTs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220428230933.15262-2-andre.przywara@arm.com 2022-04-28 23:09:28 +00:00			`#define CLK_NUMBER (CLK_R_APB1_RTC + 1)`
clk: sunxi-ng: add support for H6 PRCM CCU The H6 has clock/reset controls in PRCM part, like old SoCs such as H3 and A64. However, the PRCM CCU is rearranged; the register arragement is now similar to the main CCU of H6, and the PRCM now has two APB buses to control -- one is clocked from AHB clock derivde from AR100 clock, the other is clocked from the same mux with AR100 clock. Therefore a new driver is written for it. As there's no official document about the PRCM in H6, all the information are indirectly collected from BSP and parts of the document, and the information source is noted as comments in the driver's source code. If reliable information is provided furtherly, the driver needs to be rechecked. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> 2018-05-03 18:38:41 +00:00
			`#endif /* _CCU_SUN50I_H6_R_H */`