2009-05-16 11:14:21 +00:00
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#ifndef __ASMARM_SMP_TWD_H
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#define __ASMARM_SMP_TWD_H
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2010-05-12 04:52:18 +00:00
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#define TWD_TIMER_LOAD 0x00
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#define TWD_TIMER_COUNTER 0x04
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#define TWD_TIMER_CONTROL 0x08
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#define TWD_TIMER_INTSTAT 0x0C
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#define TWD_WDOG_LOAD 0x20
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#define TWD_WDOG_COUNTER 0x24
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#define TWD_WDOG_CONTROL 0x28
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#define TWD_WDOG_INTSTAT 0x2C
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#define TWD_WDOG_RESETSTAT 0x30
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#define TWD_WDOG_DISABLE 0x34
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#define TWD_TIMER_CONTROL_ENABLE (1 << 0)
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#define TWD_TIMER_CONTROL_ONESHOT (0 << 1)
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#define TWD_TIMER_CONTROL_PERIODIC (1 << 1)
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#define TWD_TIMER_CONTROL_IT_ENABLE (1 << 2)
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2009-05-16 11:14:21 +00:00
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struct clock_event_device;
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extern void __iomem *twd_base;
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void twd_timer_setup(struct clock_event_device *);
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2011-07-22 11:52:37 +00:00
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void twd_timer_stop(struct clock_event_device *);
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2009-05-16 11:14:21 +00:00
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#endif
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