2019-05-29 23:57:55 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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2021-03-31 08:12:02 +00:00
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/*
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2012-07-16 13:31:08 +00:00
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* omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
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*
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2020-07-22 19:24:54 +00:00
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* Copyright (C) 2012-2013 Texas Instruments Incorporated - https://www.ti.com
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2012-07-16 13:31:08 +00:00
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* Author: Keshava Munegowda <keshava_mgowda@ti.com>
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2013-01-29 13:00:03 +00:00
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* Author: Roger Quadros <rogerq@ti.com>
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2012-07-16 13:31:08 +00:00
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/pm_runtime.h>
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2012-10-24 21:26:19 +00:00
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#include <linux/platform_data/usb-omap.h>
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2013-01-29 13:20:55 +00:00
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#include <linux/of.h>
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2012-07-16 13:31:08 +00:00
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2016-06-08 18:06:20 +00:00
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#include "omap-usb.h"
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2012-07-16 13:31:08 +00:00
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#define USBTLL_DRIVER_NAME "usbhs_tll"
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/* TLL Register Set */
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#define OMAP_USBTLL_REVISION (0x00)
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#define OMAP_USBTLL_SYSCONFIG (0x10)
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#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
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#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
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#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
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#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
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#define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0)
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#define OMAP_USBTLL_SYSSTATUS (0x14)
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#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
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#define OMAP_USBTLL_IRQSTATUS (0x18)
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#define OMAP_USBTLL_IRQENABLE (0x1C)
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#define OMAP_TLL_SHARED_CONF (0x30)
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#define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6)
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#define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5)
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#define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2)
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#define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1)
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#define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0)
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#define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num)
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#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24
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2012-11-08 14:10:41 +00:00
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#define OMAP_TLL_CHANNEL_CONF_DRVVBUS (1 << 16)
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#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS (1 << 15)
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2012-07-16 13:31:08 +00:00
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#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
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#define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10)
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#define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9)
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#define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8)
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2012-11-08 14:10:41 +00:00
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#define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI (2 << 1)
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2012-07-16 13:31:08 +00:00
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#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1)
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#define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0)
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#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0
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#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1
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#define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2
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#define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3
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#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4
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#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5
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#define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6
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#define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7
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#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA
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#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB
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#define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num)
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#define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num)
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#define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num)
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#define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num)
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#define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num)
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#define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num)
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#define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num)
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#define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num)
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#define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num)
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#define OMAP_REV2_TLL_CHANNEL_COUNT 2
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#define OMAP_TLL_CHANNEL_COUNT 3
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#define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0)
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#define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1)
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#define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2)
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/* Values of USBTLL_REVISION - Note: these are not given in the TRM */
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#define OMAP_USBTLL_REV1 0x00000015 /* OMAP3 */
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#define OMAP_USBTLL_REV2 0x00000018 /* OMAP 3630 */
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#define OMAP_USBTLL_REV3 0x00000004 /* OMAP4 */
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2012-11-08 14:10:41 +00:00
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#define OMAP_USBTLL_REV4 0x00000006 /* OMAP5 */
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2012-07-16 13:31:08 +00:00
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#define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
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2012-11-08 12:40:45 +00:00
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/* only PHY and UNUSED modes don't need TLL */
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#define omap_usb_mode_needs_tll(x) ((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\
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(x) != OMAP_EHCI_PORT_MODE_PHY)
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2012-07-16 13:31:08 +00:00
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struct usbtll_omap {
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2018-01-15 20:25:05 +00:00
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void __iomem *base;
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int nch; /* num. of channels */
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2020-02-12 23:56:42 +00:00
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struct clk *ch_clk[]; /* must be the last member */
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2012-07-16 13:31:08 +00:00
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};
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/*-------------------------------------------------------------------------*/
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2012-11-26 13:26:28 +00:00
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static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
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static struct device *tll_dev;
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2012-11-26 14:56:26 +00:00
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static DEFINE_SPINLOCK(tll_lock); /* serialize access to tll_dev */
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2012-07-16 13:31:08 +00:00
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/*-------------------------------------------------------------------------*/
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static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
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{
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2013-11-16 00:01:15 +00:00
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writel_relaxed(val, base + reg);
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2012-07-16 13:31:08 +00:00
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}
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static inline u32 usbtll_read(void __iomem *base, u32 reg)
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{
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2013-11-16 00:01:15 +00:00
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return readl_relaxed(base + reg);
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2012-07-16 13:31:08 +00:00
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}
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2017-08-23 14:44:51 +00:00
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static inline void usbtll_writeb(void __iomem *base, u32 reg, u8 val)
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2012-07-16 13:31:08 +00:00
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{
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2013-11-16 00:01:15 +00:00
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writeb_relaxed(val, base + reg);
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2012-07-16 13:31:08 +00:00
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}
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2017-08-23 14:44:51 +00:00
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static inline u8 usbtll_readb(void __iomem *base, u32 reg)
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2012-07-16 13:31:08 +00:00
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{
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2013-11-16 00:01:15 +00:00
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return readb_relaxed(base + reg);
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2012-07-16 13:31:08 +00:00
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}
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/*-------------------------------------------------------------------------*/
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static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
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{
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switch (pmode) {
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
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case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
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case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
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case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
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case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
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return true;
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default:
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return false;
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}
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}
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/*
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* convert the port-mode enum to a value we can use in the FSLSMODE
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* field of USBTLL_CHANNEL_CONF
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*/
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static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
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{
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switch (mode) {
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case OMAP_USBHS_PORT_MODE_UNUSED:
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
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return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
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case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_3PIN_PHY;
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case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
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return OMAP_TLL_FSLSMODE_4PIN_PHY;
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
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return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
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case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_3PIN_TLL;
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case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
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return OMAP_TLL_FSLSMODE_4PIN_TLL;
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
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return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
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default:
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pr_warn("Invalid port mode, using default\n");
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return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
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}
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}
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/**
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* usbtll_omap_probe - initialize TI-based HCDs
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*
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* Allocates basic resources for this USB host controller.
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2020-06-24 08:48:17 +00:00
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*
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* @pdev: Pointer to this device's platform device structure
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2012-07-16 13:31:08 +00:00
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*/
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2012-11-19 18:23:04 +00:00
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static int usbtll_omap_probe(struct platform_device *pdev)
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2012-07-16 13:31:08 +00:00
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{
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struct device *dev = &pdev->dev;
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struct resource *res;
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struct usbtll_omap *tll;
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2018-01-15 20:25:05 +00:00
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void __iomem *base;
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int i, nch, ver;
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2012-07-16 13:31:08 +00:00
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dev_dbg(dev, "starting TI HSUSB TLL Controller\n");
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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2018-01-15 20:25:05 +00:00
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base = devm_ioremap_resource(dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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2012-07-16 13:31:08 +00:00
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pm_runtime_enable(dev);
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pm_runtime_get_sync(dev);
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2018-01-15 20:25:05 +00:00
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ver = usbtll_read(base, OMAP_USBTLL_REVISION);
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2012-07-16 13:31:08 +00:00
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switch (ver) {
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case OMAP_USBTLL_REV1:
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2012-11-08 14:10:41 +00:00
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case OMAP_USBTLL_REV4:
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2018-01-15 20:25:05 +00:00
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nch = OMAP_TLL_CHANNEL_COUNT;
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2012-07-16 13:31:08 +00:00
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break;
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2012-11-26 10:28:44 +00:00
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case OMAP_USBTLL_REV2:
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2012-07-16 13:31:08 +00:00
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case OMAP_USBTLL_REV3:
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2018-01-15 20:25:05 +00:00
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nch = OMAP_REV2_TLL_CHANNEL_COUNT;
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2012-07-16 13:31:08 +00:00
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break;
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default:
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2018-01-15 20:25:05 +00:00
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nch = OMAP_TLL_CHANNEL_COUNT;
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dev_dbg(dev, "rev 0x%x not recognized, assuming %d channels\n",
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ver, nch);
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2012-11-26 10:28:44 +00:00
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break;
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2012-07-16 13:31:08 +00:00
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}
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2018-01-15 20:25:05 +00:00
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tll = devm_kzalloc(dev, sizeof(*tll) + sizeof(tll->ch_clk[nch]),
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GFP_KERNEL);
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if (!tll) {
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pm_runtime_put_sync(dev);
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pm_runtime_disable(dev);
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return -ENOMEM;
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2012-11-08 11:07:09 +00:00
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}
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2018-01-15 20:25:05 +00:00
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tll->base = base;
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tll->nch = nch;
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platform_set_drvdata(pdev, tll);
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for (i = 0; i < nch; i++) {
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2012-11-08 11:07:09 +00:00
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char clkname[] = "usb_tll_hs_usb_chx_clk";
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snprintf(clkname, sizeof(clkname),
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"usb_tll_hs_usb_ch%d_clk", i);
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tll->ch_clk[i] = clk_get(dev, clkname);
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if (IS_ERR(tll->ch_clk[i]))
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dev_dbg(dev, "can't get clock : %s\n", clkname);
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2016-05-09 08:28:37 +00:00
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else
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clk_prepare(tll->ch_clk[i]);
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2012-11-08 11:07:09 +00:00
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}
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2013-01-29 13:00:03 +00:00
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pm_runtime_put_sync(dev);
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/* only after this can omap_tll_enable/disable work */
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spin_lock(&tll_lock);
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tll_dev = dev;
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spin_unlock(&tll_lock);
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return 0;
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}
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/**
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* usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
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* @pdev: USB Host Controller being removed
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*
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* Reverses the effect of usbtll_omap_probe().
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|
*/
|
|
|
|
static int usbtll_omap_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct usbtll_omap *tll = platform_get_drvdata(pdev);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
spin_lock(&tll_lock);
|
|
|
|
tll_dev = NULL;
|
|
|
|
spin_unlock(&tll_lock);
|
|
|
|
|
2016-05-09 08:28:37 +00:00
|
|
|
for (i = 0; i < tll->nch; i++) {
|
|
|
|
if (!IS_ERR(tll->ch_clk[i])) {
|
|
|
|
clk_unprepare(tll->ch_clk[i]);
|
2013-01-29 13:00:03 +00:00
|
|
|
clk_put(tll->ch_clk[i]);
|
2016-05-09 08:28:37 +00:00
|
|
|
}
|
|
|
|
}
|
2013-01-29 13:00:03 +00:00
|
|
|
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-01-29 13:20:55 +00:00
|
|
|
static const struct of_device_id usbtll_omap_dt_ids[] = {
|
|
|
|
{ .compatible = "ti,usbhs-tll" },
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
|
|
|
|
MODULE_DEVICE_TABLE(of, usbtll_omap_dt_ids);
|
|
|
|
|
2013-01-29 13:00:03 +00:00
|
|
|
static struct platform_driver usbtll_omap_driver = {
|
|
|
|
.driver = {
|
2020-02-18 20:09:01 +00:00
|
|
|
.name = usbtll_driver_name,
|
2013-10-15 03:48:50 +00:00
|
|
|
.of_match_table = usbtll_omap_dt_ids,
|
2013-01-29 13:00:03 +00:00
|
|
|
},
|
|
|
|
.probe = usbtll_omap_probe,
|
|
|
|
.remove = usbtll_omap_remove,
|
|
|
|
};
|
|
|
|
|
|
|
|
int omap_tll_init(struct usbhs_omap_platform_data *pdata)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
bool needs_tll;
|
|
|
|
unsigned reg;
|
|
|
|
struct usbtll_omap *tll;
|
|
|
|
|
2014-01-08 07:15:33 +00:00
|
|
|
if (!tll_dev)
|
2013-01-29 13:00:03 +00:00
|
|
|
return -ENODEV;
|
|
|
|
|
2014-01-08 07:15:33 +00:00
|
|
|
pm_runtime_get_sync(tll_dev);
|
2013-01-29 13:00:03 +00:00
|
|
|
|
2014-01-08 07:15:33 +00:00
|
|
|
spin_lock(&tll_lock);
|
|
|
|
tll = dev_get_drvdata(tll_dev);
|
2012-11-08 12:40:45 +00:00
|
|
|
needs_tll = false;
|
|
|
|
for (i = 0; i < tll->nch; i++)
|
|
|
|
needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]);
|
|
|
|
|
|
|
|
if (needs_tll) {
|
2013-01-29 13:00:03 +00:00
|
|
|
void __iomem *base = tll->base;
|
2012-07-16 13:31:08 +00:00
|
|
|
|
|
|
|
/* Program Common TLL register */
|
|
|
|
reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
|
|
|
|
reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
|
|
|
|
| OMAP_TLL_SHARED_CONF_USB_DIVRATION);
|
|
|
|
reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
|
|
|
|
reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
|
|
|
|
|
|
|
|
usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);
|
|
|
|
|
|
|
|
/* Enable channels now */
|
2012-11-26 10:28:44 +00:00
|
|
|
for (i = 0; i < tll->nch; i++) {
|
2012-07-16 13:31:08 +00:00
|
|
|
reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i));
|
|
|
|
|
|
|
|
if (is_ohci_port(pdata->port_mode[i])) {
|
|
|
|
reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
|
|
|
|
<< OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
|
|
|
|
reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
|
|
|
|
} else if (pdata->port_mode[i] ==
|
|
|
|
OMAP_EHCI_PORT_MODE_TLL) {
|
|
|
|
/*
|
2017-04-15 17:05:09 +00:00
|
|
|
* Disable UTMI AutoIdle, BitStuffing
|
|
|
|
* and use SDR Mode. Enable ULPI AutoIdle.
|
2012-07-16 13:31:08 +00:00
|
|
|
*/
|
|
|
|
reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
|
|
|
|
| OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
|
2017-04-15 17:05:08 +00:00
|
|
|
reg |= OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;
|
2017-04-15 17:05:09 +00:00
|
|
|
reg |= OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE;
|
2012-11-08 14:10:41 +00:00
|
|
|
} else if (pdata->port_mode[i] ==
|
|
|
|
OMAP_EHCI_PORT_MODE_HSIC) {
|
|
|
|
/*
|
|
|
|
* HSIC Mode requires UTMI port configurations
|
|
|
|
*/
|
|
|
|
reg |= OMAP_TLL_CHANNEL_CONF_DRVVBUS
|
|
|
|
| OMAP_TLL_CHANNEL_CONF_CHRGVBUS
|
|
|
|
| OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI
|
|
|
|
| OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;
|
2012-07-16 13:31:08 +00:00
|
|
|
} else {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
|
|
|
|
usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);
|
|
|
|
|
|
|
|
usbtll_writeb(base,
|
|
|
|
OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
|
|
|
|
0xbe);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-11-26 14:56:26 +00:00
|
|
|
spin_unlock(&tll_lock);
|
2014-01-08 07:15:33 +00:00
|
|
|
pm_runtime_put_sync(tll_dev);
|
2012-07-16 13:31:08 +00:00
|
|
|
|
2012-11-26 10:56:37 +00:00
|
|
|
return 0;
|
2012-07-16 13:31:08 +00:00
|
|
|
}
|
2013-01-29 13:00:03 +00:00
|
|
|
EXPORT_SYMBOL_GPL(omap_tll_init);
|
2012-07-16 13:31:08 +00:00
|
|
|
|
2013-01-29 13:00:03 +00:00
|
|
|
int omap_tll_enable(struct usbhs_omap_platform_data *pdata)
|
2012-07-16 13:31:08 +00:00
|
|
|
{
|
2012-11-08 11:07:09 +00:00
|
|
|
int i;
|
2013-01-29 13:00:03 +00:00
|
|
|
struct usbtll_omap *tll;
|
2012-11-08 11:07:09 +00:00
|
|
|
|
2014-01-08 07:15:33 +00:00
|
|
|
if (!tll_dev)
|
2013-01-29 13:00:03 +00:00
|
|
|
return -ENODEV;
|
2012-07-16 13:31:08 +00:00
|
|
|
|
2013-01-29 13:00:03 +00:00
|
|
|
pm_runtime_get_sync(tll_dev);
|
2012-07-16 13:31:08 +00:00
|
|
|
|
2014-01-08 07:15:33 +00:00
|
|
|
spin_lock(&tll_lock);
|
|
|
|
tll = dev_get_drvdata(tll_dev);
|
|
|
|
|
2012-11-08 11:07:09 +00:00
|
|
|
for (i = 0; i < tll->nch; i++) {
|
2012-11-08 12:40:45 +00:00
|
|
|
if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
|
2012-11-08 11:07:09 +00:00
|
|
|
int r;
|
2012-07-16 13:31:08 +00:00
|
|
|
|
2012-11-08 11:07:09 +00:00
|
|
|
if (IS_ERR(tll->ch_clk[i]))
|
|
|
|
continue;
|
|
|
|
|
2016-05-09 08:28:37 +00:00
|
|
|
r = clk_enable(tll->ch_clk[i]);
|
2012-11-08 11:07:09 +00:00
|
|
|
if (r) {
|
2013-01-29 13:00:03 +00:00
|
|
|
dev_err(tll_dev,
|
2012-11-08 11:07:09 +00:00
|
|
|
"Error enabling ch %d clock: %d\n", i, r);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2012-07-16 13:31:08 +00:00
|
|
|
|
2013-01-29 13:00:03 +00:00
|
|
|
spin_unlock(&tll_lock);
|
|
|
|
|
2012-07-16 13:31:08 +00:00
|
|
|
return 0;
|
|
|
|
}
|
2013-01-29 13:00:03 +00:00
|
|
|
EXPORT_SYMBOL_GPL(omap_tll_enable);
|
2012-07-16 13:31:08 +00:00
|
|
|
|
2013-01-29 13:00:03 +00:00
|
|
|
int omap_tll_disable(struct usbhs_omap_platform_data *pdata)
|
2012-07-16 13:31:08 +00:00
|
|
|
{
|
2012-11-08 11:07:09 +00:00
|
|
|
int i;
|
2013-01-29 13:00:03 +00:00
|
|
|
struct usbtll_omap *tll;
|
|
|
|
|
2014-01-08 07:15:33 +00:00
|
|
|
if (!tll_dev)
|
2013-01-29 13:00:03 +00:00
|
|
|
return -ENODEV;
|
2012-07-16 13:31:08 +00:00
|
|
|
|
2014-01-08 07:15:33 +00:00
|
|
|
spin_lock(&tll_lock);
|
2013-01-29 13:00:03 +00:00
|
|
|
tll = dev_get_drvdata(tll_dev);
|
2012-07-16 13:31:08 +00:00
|
|
|
|
2012-11-08 11:07:09 +00:00
|
|
|
for (i = 0; i < tll->nch; i++) {
|
2012-11-08 12:40:45 +00:00
|
|
|
if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
|
2012-11-08 11:07:09 +00:00
|
|
|
if (!IS_ERR(tll->ch_clk[i]))
|
2016-05-09 08:28:37 +00:00
|
|
|
clk_disable(tll->ch_clk[i]);
|
2012-11-08 11:07:09 +00:00
|
|
|
}
|
|
|
|
}
|
2012-07-16 13:31:08 +00:00
|
|
|
|
2012-11-26 14:56:26 +00:00
|
|
|
spin_unlock(&tll_lock);
|
2014-01-08 07:15:33 +00:00
|
|
|
pm_runtime_put_sync(tll_dev);
|
2012-11-26 14:56:26 +00:00
|
|
|
|
2013-01-29 13:00:03 +00:00
|
|
|
return 0;
|
2012-07-16 13:31:08 +00:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(omap_tll_disable);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
|
2013-01-29 13:20:55 +00:00
|
|
|
MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
|
2012-07-16 13:31:08 +00:00
|
|
|
MODULE_LICENSE("GPL v2");
|
|
|
|
MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");
|
|
|
|
|
|
|
|
static int __init omap_usbtll_drvinit(void)
|
|
|
|
{
|
|
|
|
return platform_driver_register(&usbtll_omap_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* init before usbhs core driver;
|
|
|
|
* The usbtll driver should be initialized before
|
|
|
|
* the usbhs core driver probe function is called.
|
|
|
|
*/
|
|
|
|
fs_initcall(omap_usbtll_drvinit);
|
|
|
|
|
|
|
|
static void __exit omap_usbtll_drvexit(void)
|
|
|
|
{
|
|
|
|
platform_driver_unregister(&usbtll_omap_driver);
|
|
|
|
}
|
|
|
|
module_exit(omap_usbtll_drvexit);
|