2013-05-15 09:51:48 +00:00
|
|
|
Ux500 MUSB
|
|
|
|
|
|
|
|
Required properties:
|
|
|
|
- compatible : Should be "stericsson,db8500-musb"
|
|
|
|
- reg : Offset and length of registers
|
|
|
|
- interrupts : Interrupt; mode, number and trigger
|
|
|
|
- dr_mode : Dual-role; either host mode "host", peripheral mode "peripheral"
|
|
|
|
or both "otg"
|
|
|
|
|
|
|
|
Optional properties:
|
|
|
|
- dmas : A list of dma channels;
|
|
|
|
dma-controller, event-line, fixed-channel, flags
|
|
|
|
- dma-names : An ordered list of channel names affiliated to the above
|
|
|
|
|
|
|
|
Example:
|
|
|
|
|
|
|
|
usb_per5@a03e0000 {
|
2013-08-20 16:40:27 +00:00
|
|
|
compatible = "stericsson,db8500-musb";
|
2013-05-15 09:51:48 +00:00
|
|
|
reg = <0xa03e0000 0x10000>;
|
|
|
|
interrupts = <0 23 0x4>;
|
|
|
|
interrupt-names = "mc";
|
|
|
|
|
|
|
|
dr_mode = "otg";
|
|
|
|
|
|
|
|
dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */
|
|
|
|
<&dma 38 0 0x0>, /* Logical - MemToDev */
|
|
|
|
<&dma 37 0 0x2>, /* Logical - DevToMem */
|
|
|
|
<&dma 37 0 0x0>, /* Logical - MemToDev */
|
|
|
|
<&dma 36 0 0x2>, /* Logical - DevToMem */
|
|
|
|
<&dma 36 0 0x0>, /* Logical - MemToDev */
|
|
|
|
<&dma 19 0 0x2>, /* Logical - DevToMem */
|
|
|
|
<&dma 19 0 0x0>, /* Logical - MemToDev */
|
|
|
|
<&dma 18 0 0x2>, /* Logical - DevToMem */
|
|
|
|
<&dma 18 0 0x0>, /* Logical - MemToDev */
|
|
|
|
<&dma 17 0 0x2>, /* Logical - DevToMem */
|
|
|
|
<&dma 17 0 0x0>, /* Logical - MemToDev */
|
|
|
|
<&dma 16 0 0x2>, /* Logical - DevToMem */
|
|
|
|
<&dma 16 0 0x0>, /* Logical - MemToDev */
|
|
|
|
<&dma 39 0 0x2>, /* Logical - DevToMem */
|
|
|
|
<&dma 39 0 0x0>; /* Logical - MemToDev */
|
|
|
|
|
|
|
|
dma-names = "iep_1_9", "oep_1_9",
|
|
|
|
"iep_2_10", "oep_2_10",
|
|
|
|
"iep_3_11", "oep_3_11",
|
|
|
|
"iep_4_12", "oep_4_12",
|
|
|
|
"iep_5_13", "oep_5_13",
|
|
|
|
"iep_6_14", "oep_6_14",
|
|
|
|
"iep_7_15", "oep_7_15",
|
|
|
|
"iep_8", "oep_8";
|
|
|
|
};
|