[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:02 +00:00
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/*
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2008-08-05 15:14:15 +00:00
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* arch/arm/mach-loki/include/mach/uncompress.h
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[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:02 +00:00
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/serial_reg.h>
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2008-08-05 15:14:15 +00:00
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#include <mach/loki.h>
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[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 20:45:02 +00:00
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#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE)
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static void putc(const char c)
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{
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unsigned char *base = SERIAL_BASE;
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int i;
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for (i = 0; i < 0x1000; i++) {
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if (base[UART_LSR << 2] & UART_LSR_THRE)
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break;
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barrier();
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}
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base[UART_TX << 2] = c;
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}
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static void flush(void)
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{
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unsigned char *base = SERIAL_BASE;
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unsigned char mask;
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int i;
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mask = UART_LSR_TEMT | UART_LSR_THRE;
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for (i = 0; i < 0x1000; i++) {
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if ((base[UART_LSR << 2] & mask) == mask)
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break;
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barrier();
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}
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}
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/*
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* nothing to do
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*/
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#define arch_decomp_setup()
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#define arch_decomp_wdog()
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