2011-01-20 17:50:14 +00:00
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/*
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* NVM Express device driver
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2014-03-24 14:11:22 +00:00
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* Copyright (c) 2011-2014, Intel Corporation.
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2011-01-20 17:50:14 +00:00
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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2015-12-07 22:30:31 +00:00
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#include <linux/aer.h>
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2011-05-12 17:50:28 +00:00
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#include <linux/bitops.h>
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2011-01-20 17:50:14 +00:00
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#include <linux/blkdev.h>
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2014-11-04 15:20:14 +00:00
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#include <linux/blk-mq.h>
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2016-09-14 14:18:57 +00:00
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#include <linux/blk-mq-pci.h>
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2014-03-24 16:46:25 +00:00
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#include <linux/cpu.h>
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2011-05-06 12:37:54 +00:00
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#include <linux/delay.h>
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2011-01-20 17:50:14 +00:00
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#include <linux/errno.h>
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#include <linux/fs.h>
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#include <linux/genhd.h>
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2014-04-02 21:45:37 +00:00
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#include <linux/hdreg.h>
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2011-05-06 12:45:47 +00:00
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#include <linux/idr.h>
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2011-01-20 17:50:14 +00:00
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kdev_t.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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2015-11-26 11:21:29 +00:00
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#include <linux/mutex.h>
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2011-01-20 17:50:14 +00:00
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#include <linux/pci.h>
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2011-02-06 12:53:23 +00:00
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#include <linux/poison.h>
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2013-07-08 21:26:25 +00:00
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#include <linux/ptrace.h>
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2011-01-20 17:50:14 +00:00
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#include <linux/sched.h>
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#include <linux/slab.h>
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NVMe: Metadata format support
Adds support for NVMe metadata formats and exposes block devices for
all namespaces regardless of their format. Namespace formats that are
unusable will have disk capacity set to 0, but a handle to the block
device is created to simplify device management. A namespace is not
usable when the format requires host interleave block and metadata in
single buffer, has no provisioned storage, or has better data but failed
to register with blk integrity.
The namespace has to be scanned in two phases to support separate
metadata formats. The first establishes the sector size and capacity
prior to invoking add_disk. If metadata is required, the capacity will
be temporarilly set to 0 until it can be revalidated and registered with
the integrity extenstions after add_disk completes.
The driver relies on the integrity extensions to provide the metadata
buffer. NVMe requires this be a single physically contiguous region,
so only one integrity segment is allowed per command. If the metadata
is used for T10 PI, the driver provides mappings to save and restore
the reftag physical block translation. The driver provides no-op
functions for generate and verify if metadata is not used for protection
information. This way the setup is always provided by the block layer.
If a request does not supply a required metadata buffer, the command
is failed with bad address. This could only happen if a user manually
disables verify/generate on such a disk. The only exception to where
this is okay is if the controller is capable of stripping/generating
the metadata, which is possible on some types of formats.
The metadata scatter gather list now occupies the spot in the nvme_iod
that used to be used to link retryable IOD's, but we don't do that
anymore, so the field was unused.
Signed-off-by: Keith Busch <keith.busch@intel.com>
2015-02-19 20:39:03 +00:00
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#include <linux/t10-pi.h>
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2016-02-29 14:59:46 +00:00
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#include <linux/timer.h>
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2011-01-20 17:50:14 +00:00
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#include <linux/types.h>
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2015-08-28 07:27:14 +00:00
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#include <linux/io-64-nonatomic-lo-hi.h>
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2015-10-15 12:10:52 +00:00
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#include <asm/unaligned.h>
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2012-02-07 02:45:33 +00:00
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2015-10-03 13:46:41 +00:00
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#include "nvme.h"
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2014-05-13 17:42:02 +00:00
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#define NVME_Q_DEPTH 1024
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2015-03-06 19:56:13 +00:00
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#define NVME_AQ_DEPTH 256
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2011-01-20 17:50:14 +00:00
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#define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
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#define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
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2015-11-28 14:42:28 +00:00
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/*
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* We handle AEN commands ourselves and don't even let the
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* block layer know about them.
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*/
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2016-04-26 11:52:00 +00:00
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#define NVME_AQ_BLKMQ_DEPTH (NVME_AQ_DEPTH - NVME_NR_AERS)
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2014-05-13 17:42:02 +00:00
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2011-02-06 12:28:06 +00:00
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static int use_threaded_interrupts;
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module_param(use_threaded_interrupts, int, 0);
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2015-07-20 16:14:09 +00:00
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static bool use_cmb_sqes = true;
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module_param(use_cmb_sqes, bool, 0644);
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MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
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2013-12-10 20:10:36 +00:00
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static struct workqueue_struct *nvme_workq;
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2011-03-02 23:37:18 +00:00
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2015-11-26 09:06:56 +00:00
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struct nvme_dev;
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struct nvme_queue;
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2015-02-03 18:21:42 +00:00
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2015-06-05 16:30:08 +00:00
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static int nvme_reset(struct nvme_dev *dev);
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2015-11-04 03:37:26 +00:00
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static void nvme_process_cq(struct nvme_queue *nvmeq);
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2016-01-12 21:41:18 +00:00
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static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown);
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2013-12-10 20:10:37 +00:00
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2015-11-26 09:06:56 +00:00
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/*
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* Represents an NVM Express device. Each nvme_dev is a PCI function.
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*/
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struct nvme_dev {
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struct nvme_queue **queues;
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struct blk_mq_tag_set tagset;
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struct blk_mq_tag_set admin_tagset;
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u32 __iomem *dbs;
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struct device *dev;
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struct dma_pool *prp_page_pool;
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struct dma_pool *prp_small_pool;
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unsigned queue_count;
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unsigned online_queues;
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unsigned max_qid;
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int q_depth;
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u32 db_stride;
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void __iomem *bar;
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struct work_struct reset_work;
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2015-11-26 11:35:49 +00:00
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struct work_struct remove_work;
|
2016-02-29 14:59:46 +00:00
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struct timer_list watchdog_timer;
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2015-11-26 11:21:29 +00:00
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struct mutex shutdown_lock;
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2015-11-26 09:06:56 +00:00
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bool subsystem;
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void __iomem *cmb;
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dma_addr_t cmb_dma_addr;
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u64 cmb_size;
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u32 cmbsz;
|
2016-10-06 02:01:12 +00:00
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u32 cmbloc;
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2015-11-26 09:06:56 +00:00
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struct nvme_ctrl ctrl;
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2016-01-12 21:41:17 +00:00
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struct completion ioq_wait;
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2013-12-10 20:10:40 +00:00
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};
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2011-03-02 23:37:18 +00:00
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2015-11-26 09:06:56 +00:00
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static inline struct nvme_dev *to_nvme_dev(struct nvme_ctrl *ctrl)
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{
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return container_of(ctrl, struct nvme_dev, ctrl);
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}
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2011-01-20 17:50:14 +00:00
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/*
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* An NVM Express queue. Each device has at least two (one for admin
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* commands and one for I/O commands).
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*/
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struct nvme_queue {
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struct device *q_dmadev;
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2011-02-10 14:56:01 +00:00
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struct nvme_dev *dev;
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2014-01-27 20:57:22 +00:00
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char irqname[24]; /* nvme4294967295-65535\0 */
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2011-01-20 17:50:14 +00:00
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spinlock_t q_lock;
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struct nvme_command *sq_cmds;
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2015-07-20 16:14:09 +00:00
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struct nvme_command __iomem *sq_cmds_io;
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2011-01-20 17:50:14 +00:00
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volatile struct nvme_completion *cqes;
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2015-06-01 15:29:54 +00:00
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struct blk_mq_tags **tags;
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2011-01-20 17:50:14 +00:00
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dma_addr_t sq_dma_addr;
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dma_addr_t cq_dma_addr;
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u32 __iomem *q_db;
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u16 q_depth;
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2015-01-15 22:19:10 +00:00
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s16 cq_vector;
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2011-01-20 17:50:14 +00:00
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u16 sq_tail;
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u16 cq_head;
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2013-12-10 20:10:38 +00:00
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u16 qid;
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2013-06-24 15:47:34 +00:00
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u8 cq_phase;
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u8 cqe_seen;
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2011-01-20 17:50:14 +00:00
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};
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2015-10-16 05:58:32 +00:00
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/*
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* The nvme_iod describes the data in an I/O, including the list of PRP
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* entries. You can't see it in this data structure because C doesn't let
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2015-11-28 14:43:10 +00:00
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* me express that. Use nvme_init_iod to ensure there's enough space
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2015-10-16 05:58:32 +00:00
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* allocated to store the PRP list.
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*/
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struct nvme_iod {
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2016-11-10 15:32:33 +00:00
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struct nvme_request req;
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2015-11-28 14:43:10 +00:00
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struct nvme_queue *nvmeq;
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int aborted;
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2015-10-16 05:58:32 +00:00
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int npages; /* In the PRP list. 0 means small pool in use */
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int nents; /* Used in scatterlist */
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int length; /* Of data, in bytes */
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dma_addr_t first_dma;
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2015-10-26 08:12:51 +00:00
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struct scatterlist meta_sg; /* metadata requires single contiguous buffer */
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2015-11-28 14:43:10 +00:00
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struct scatterlist *sg;
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struct scatterlist inline_sg[0];
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2011-01-20 17:50:14 +00:00
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};
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/*
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* Check we didin't inadvertently grow the command struct
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*/
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static inline void _nvme_check_size(void)
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{
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BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
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BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
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BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
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BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
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BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
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2013-03-27 11:13:41 +00:00
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BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
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2013-12-10 20:10:38 +00:00
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BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
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2011-01-20 17:50:14 +00:00
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BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
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BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
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BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
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BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
|
2012-09-26 18:49:27 +00:00
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BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
|
2011-01-20 17:50:14 +00:00
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}
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2015-01-22 19:07:58 +00:00
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/*
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* Max size of iod being embedded in the request payload
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*/
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#define NVME_INT_PAGES 2
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2015-11-28 14:03:49 +00:00
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#define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->ctrl.page_size)
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2015-01-22 19:07:58 +00:00
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/*
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* Will slightly overestimate the number of pages needed. This is OK
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* as it only leads to a small amount of wasted memory for the lifetime of
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* the I/O.
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*/
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static int nvme_npages(unsigned size, struct nvme_dev *dev)
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{
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2015-11-28 14:03:49 +00:00
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unsigned nprps = DIV_ROUND_UP(size + dev->ctrl.page_size,
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dev->ctrl.page_size);
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2015-01-22 19:07:58 +00:00
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return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
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}
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2015-11-28 14:43:10 +00:00
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static unsigned int nvme_iod_alloc_size(struct nvme_dev *dev,
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unsigned int size, unsigned int nseg)
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2015-01-22 19:07:58 +00:00
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{
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2015-11-28 14:43:10 +00:00
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return sizeof(__le64 *) * nvme_npages(size, dev) +
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sizeof(struct scatterlist) * nseg;
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}
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2015-01-22 19:07:58 +00:00
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2015-11-28 14:43:10 +00:00
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static unsigned int nvme_cmd_size(struct nvme_dev *dev)
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{
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return sizeof(struct nvme_iod) +
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nvme_iod_alloc_size(dev, NVME_INT_BYTES(dev), NVME_INT_PAGES);
|
2015-01-22 19:07:58 +00:00
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}
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|
2016-09-14 14:18:57 +00:00
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static int nvmeq_irq(struct nvme_queue *nvmeq)
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{
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return pci_irq_vector(to_pci_dev(nvmeq->dev->dev), nvmeq->cq_vector);
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}
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|
2014-11-04 15:20:14 +00:00
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static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
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unsigned int hctx_idx)
|
2011-02-06 23:30:16 +00:00
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{
|
2014-11-04 15:20:14 +00:00
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struct nvme_dev *dev = data;
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struct nvme_queue *nvmeq = dev->queues[0];
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2015-06-01 15:29:54 +00:00
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WARN_ON(hctx_idx != 0);
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WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
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WARN_ON(nvmeq->tags);
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2014-11-04 15:20:14 +00:00
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hctx->driver_data = nvmeq;
|
2015-06-01 15:29:54 +00:00
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nvmeq->tags = &dev->admin_tagset.tags[0];
|
2014-11-04 15:20:14 +00:00
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return 0;
|
2011-02-06 23:30:16 +00:00
|
|
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}
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|
2015-06-08 16:08:13 +00:00
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static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
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{
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struct nvme_queue *nvmeq = hctx->driver_data;
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nvmeq->tags = NULL;
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}
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|
2014-11-04 15:20:14 +00:00
|
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static int nvme_admin_init_request(void *data, struct request *req,
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unsigned int hctx_idx, unsigned int rq_idx,
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unsigned int numa_node)
|
2013-07-15 21:02:20 +00:00
|
|
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{
|
2014-11-04 15:20:14 +00:00
|
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struct nvme_dev *dev = data;
|
2015-11-28 14:43:10 +00:00
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struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
|
2014-11-04 15:20:14 +00:00
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struct nvme_queue *nvmeq = dev->queues[0];
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BUG_ON(!nvmeq);
|
2015-11-28 14:43:10 +00:00
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|
iod->nvmeq = nvmeq;
|
2014-11-04 15:20:14 +00:00
|
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|
return 0;
|
2013-07-15 21:02:20 +00:00
|
|
|
}
|
|
|
|
|
2014-11-04 15:20:14 +00:00
|
|
|
static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
|
|
|
|
unsigned int hctx_idx)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2014-11-04 15:20:14 +00:00
|
|
|
struct nvme_dev *dev = data;
|
2015-06-01 15:29:54 +00:00
|
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|
struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
|
2014-11-04 15:20:14 +00:00
|
|
|
|
2015-06-01 15:29:54 +00:00
|
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|
if (!nvmeq->tags)
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nvmeq->tags = &dev->tagset.tags[hctx_idx];
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2015-06-01 15:29:54 +00:00
|
|
|
WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
|
2014-11-04 15:20:14 +00:00
|
|
|
hctx->driver_data = nvmeq;
|
|
|
|
return 0;
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
2014-11-04 15:20:14 +00:00
|
|
|
static int nvme_init_request(void *data, struct request *req,
|
|
|
|
unsigned int hctx_idx, unsigned int rq_idx,
|
|
|
|
unsigned int numa_node)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2014-11-04 15:20:14 +00:00
|
|
|
struct nvme_dev *dev = data;
|
2015-11-28 14:43:10 +00:00
|
|
|
struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
|
2014-11-04 15:20:14 +00:00
|
|
|
struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
|
|
|
|
|
|
|
|
BUG_ON(!nvmeq);
|
2015-11-28 14:43:10 +00:00
|
|
|
iod->nvmeq = nvmeq;
|
2014-11-04 15:20:14 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-09-14 14:18:57 +00:00
|
|
|
static int nvme_pci_map_queues(struct blk_mq_tag_set *set)
|
|
|
|
{
|
|
|
|
struct nvme_dev *dev = set->driver_data;
|
|
|
|
|
|
|
|
return blk_mq_pci_map_queues(set, to_pci_dev(dev->dev));
|
|
|
|
}
|
|
|
|
|
2011-01-20 17:50:14 +00:00
|
|
|
/**
|
2015-11-28 14:42:28 +00:00
|
|
|
* __nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
|
2011-01-20 17:50:14 +00:00
|
|
|
* @nvmeq: The queue to use
|
|
|
|
* @cmd: The command to send
|
|
|
|
*
|
|
|
|
* Safe to use from interrupt context
|
|
|
|
*/
|
2015-07-31 13:26:58 +00:00
|
|
|
static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
|
|
|
|
struct nvme_command *cmd)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2014-11-04 15:20:14 +00:00
|
|
|
u16 tail = nvmeq->sq_tail;
|
|
|
|
|
2015-07-20 16:14:09 +00:00
|
|
|
if (nvmeq->sq_cmds_io)
|
|
|
|
memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
|
|
|
|
else
|
|
|
|
memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
|
|
|
|
|
2011-01-20 17:50:14 +00:00
|
|
|
if (++tail == nvmeq->q_depth)
|
|
|
|
tail = 0;
|
2011-02-16 14:59:59 +00:00
|
|
|
writel(tail, nvmeq->q_db);
|
2011-01-20 17:50:14 +00:00
|
|
|
nvmeq->sq_tail = tail;
|
|
|
|
}
|
|
|
|
|
2015-11-28 14:43:10 +00:00
|
|
|
static __le64 **iod_list(struct request *req)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2015-11-28 14:43:10 +00:00
|
|
|
struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
|
2016-12-08 22:20:32 +00:00
|
|
|
return (__le64 **)(iod->sg + blk_rq_nr_phys_segments(req));
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
2016-03-22 07:24:43 +00:00
|
|
|
static int nvme_init_iod(struct request *rq, unsigned size,
|
|
|
|
struct nvme_dev *dev)
|
2015-01-22 19:07:58 +00:00
|
|
|
{
|
2015-11-28 14:43:10 +00:00
|
|
|
struct nvme_iod *iod = blk_mq_rq_to_pdu(rq);
|
2016-12-08 22:20:32 +00:00
|
|
|
int nseg = blk_rq_nr_phys_segments(rq);
|
2015-01-22 19:07:58 +00:00
|
|
|
|
2015-11-28 14:43:10 +00:00
|
|
|
if (nseg > NVME_INT_PAGES || size > NVME_INT_BYTES(dev)) {
|
|
|
|
iod->sg = kmalloc(nvme_iod_alloc_size(dev, size, nseg), GFP_ATOMIC);
|
|
|
|
if (!iod->sg)
|
|
|
|
return BLK_MQ_RQ_QUEUE_BUSY;
|
|
|
|
} else {
|
|
|
|
iod->sg = iod->inline_sg;
|
2015-01-22 19:07:58 +00:00
|
|
|
}
|
|
|
|
|
2015-11-28 14:43:10 +00:00
|
|
|
iod->aborted = 0;
|
|
|
|
iod->npages = -1;
|
|
|
|
iod->nents = 0;
|
|
|
|
iod->length = size;
|
2016-07-12 23:20:31 +00:00
|
|
|
|
2016-10-20 13:12:13 +00:00
|
|
|
if (!(rq->rq_flags & RQF_DONTPREP)) {
|
2016-07-12 23:20:31 +00:00
|
|
|
rq->retries = 0;
|
2016-10-20 13:12:13 +00:00
|
|
|
rq->rq_flags |= RQF_DONTPREP;
|
2016-07-12 23:20:31 +00:00
|
|
|
}
|
2016-11-15 19:11:58 +00:00
|
|
|
return BLK_MQ_RQ_QUEUE_OK;
|
2015-01-22 19:07:58 +00:00
|
|
|
}
|
|
|
|
|
2015-11-28 14:43:10 +00:00
|
|
|
static void nvme_free_iod(struct nvme_dev *dev, struct request *req)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2015-11-28 14:43:10 +00:00
|
|
|
struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
|
2015-11-28 14:03:49 +00:00
|
|
|
const int last_prp = dev->ctrl.page_size / 8 - 1;
|
2011-12-20 18:34:52 +00:00
|
|
|
int i;
|
2015-11-28 14:43:10 +00:00
|
|
|
__le64 **list = iod_list(req);
|
2011-12-20 18:34:52 +00:00
|
|
|
dma_addr_t prp_dma = iod->first_dma;
|
|
|
|
|
|
|
|
if (iod->npages == 0)
|
|
|
|
dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
|
|
|
|
for (i = 0; i < iod->npages; i++) {
|
|
|
|
__le64 *prp_list = list[i];
|
|
|
|
dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
|
|
|
|
dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
|
|
|
|
prp_dma = next_prp_dma;
|
|
|
|
}
|
2015-01-22 19:07:58 +00:00
|
|
|
|
2015-11-28 14:43:10 +00:00
|
|
|
if (iod->sg != iod->inline_sg)
|
|
|
|
kfree(iod->sg);
|
2014-08-29 15:06:12 +00:00
|
|
|
}
|
|
|
|
|
2015-02-23 16:16:21 +00:00
|
|
|
#ifdef CONFIG_BLK_DEV_INTEGRITY
|
NVMe: Metadata format support
Adds support for NVMe metadata formats and exposes block devices for
all namespaces regardless of their format. Namespace formats that are
unusable will have disk capacity set to 0, but a handle to the block
device is created to simplify device management. A namespace is not
usable when the format requires host interleave block and metadata in
single buffer, has no provisioned storage, or has better data but failed
to register with blk integrity.
The namespace has to be scanned in two phases to support separate
metadata formats. The first establishes the sector size and capacity
prior to invoking add_disk. If metadata is required, the capacity will
be temporarilly set to 0 until it can be revalidated and registered with
the integrity extenstions after add_disk completes.
The driver relies on the integrity extensions to provide the metadata
buffer. NVMe requires this be a single physically contiguous region,
so only one integrity segment is allowed per command. If the metadata
is used for T10 PI, the driver provides mappings to save and restore
the reftag physical block translation. The driver provides no-op
functions for generate and verify if metadata is not used for protection
information. This way the setup is always provided by the block layer.
If a request does not supply a required metadata buffer, the command
is failed with bad address. This could only happen if a user manually
disables verify/generate on such a disk. The only exception to where
this is okay is if the controller is capable of stripping/generating
the metadata, which is possible on some types of formats.
The metadata scatter gather list now occupies the spot in the nvme_iod
that used to be used to link retryable IOD's, but we don't do that
anymore, so the field was unused.
Signed-off-by: Keith Busch <keith.busch@intel.com>
2015-02-19 20:39:03 +00:00
|
|
|
static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
|
|
|
|
{
|
|
|
|
if (be32_to_cpu(pi->ref_tag) == v)
|
|
|
|
pi->ref_tag = cpu_to_be32(p);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
|
|
|
|
{
|
|
|
|
if (be32_to_cpu(pi->ref_tag) == p)
|
|
|
|
pi->ref_tag = cpu_to_be32(v);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* nvme_dif_remap - remaps ref tags to bip seed and physical lba
|
|
|
|
*
|
|
|
|
* The virtual start sector is the one that was originally submitted by the
|
|
|
|
* block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
|
|
|
|
* start sector may be different. Remap protection information to match the
|
|
|
|
* physical LBA on writes, and back to the original seed on reads.
|
|
|
|
*
|
|
|
|
* Type 0 and 3 do not have a ref tag, so no remapping required.
|
|
|
|
*/
|
|
|
|
static void nvme_dif_remap(struct request *req,
|
|
|
|
void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
|
|
|
|
{
|
|
|
|
struct nvme_ns *ns = req->rq_disk->private_data;
|
|
|
|
struct bio_integrity_payload *bip;
|
|
|
|
struct t10_pi_tuple *pi;
|
|
|
|
void *p, *pmap;
|
|
|
|
u32 i, nlb, ts, phys, virt;
|
|
|
|
|
|
|
|
if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
|
|
|
|
return;
|
|
|
|
|
|
|
|
bip = bio_integrity(req->bio);
|
|
|
|
if (!bip)
|
|
|
|
return;
|
|
|
|
|
|
|
|
pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
|
|
|
|
|
|
|
|
p = pmap;
|
|
|
|
virt = bip_get_seed(bip);
|
|
|
|
phys = nvme_block_nr(ns, blk_rq_pos(req));
|
|
|
|
nlb = (blk_rq_bytes(req) >> ns->lba_shift);
|
2015-10-21 17:20:18 +00:00
|
|
|
ts = ns->disk->queue->integrity.tuple_size;
|
NVMe: Metadata format support
Adds support for NVMe metadata formats and exposes block devices for
all namespaces regardless of their format. Namespace formats that are
unusable will have disk capacity set to 0, but a handle to the block
device is created to simplify device management. A namespace is not
usable when the format requires host interleave block and metadata in
single buffer, has no provisioned storage, or has better data but failed
to register with blk integrity.
The namespace has to be scanned in two phases to support separate
metadata formats. The first establishes the sector size and capacity
prior to invoking add_disk. If metadata is required, the capacity will
be temporarilly set to 0 until it can be revalidated and registered with
the integrity extenstions after add_disk completes.
The driver relies on the integrity extensions to provide the metadata
buffer. NVMe requires this be a single physically contiguous region,
so only one integrity segment is allowed per command. If the metadata
is used for T10 PI, the driver provides mappings to save and restore
the reftag physical block translation. The driver provides no-op
functions for generate and verify if metadata is not used for protection
information. This way the setup is always provided by the block layer.
If a request does not supply a required metadata buffer, the command
is failed with bad address. This could only happen if a user manually
disables verify/generate on such a disk. The only exception to where
this is okay is if the controller is capable of stripping/generating
the metadata, which is possible on some types of formats.
The metadata scatter gather list now occupies the spot in the nvme_iod
that used to be used to link retryable IOD's, but we don't do that
anymore, so the field was unused.
Signed-off-by: Keith Busch <keith.busch@intel.com>
2015-02-19 20:39:03 +00:00
|
|
|
|
|
|
|
for (i = 0; i < nlb; i++, virt++, phys++) {
|
|
|
|
pi = (struct t10_pi_tuple *)p;
|
|
|
|
dif_swap(phys, virt, pi);
|
|
|
|
p += ts;
|
|
|
|
}
|
|
|
|
kunmap_atomic(pmap);
|
|
|
|
}
|
2015-02-23 16:16:21 +00:00
|
|
|
#else /* CONFIG_BLK_DEV_INTEGRITY */
|
|
|
|
static void nvme_dif_remap(struct request *req,
|
|
|
|
void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
|
|
|
|
{
|
|
|
|
}
|
|
|
|
static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2015-11-28 14:43:10 +00:00
|
|
|
static bool nvme_setup_prps(struct nvme_dev *dev, struct request *req,
|
2015-10-16 05:58:37 +00:00
|
|
|
int total_len)
|
2011-01-26 15:02:29 +00:00
|
|
|
{
|
2015-11-28 14:43:10 +00:00
|
|
|
struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
|
2011-02-10 15:30:34 +00:00
|
|
|
struct dma_pool *pool;
|
2011-12-20 18:34:52 +00:00
|
|
|
int length = total_len;
|
|
|
|
struct scatterlist *sg = iod->sg;
|
2011-01-26 15:02:29 +00:00
|
|
|
int dma_len = sg_dma_len(sg);
|
|
|
|
u64 dma_addr = sg_dma_address(sg);
|
2015-11-28 14:03:49 +00:00
|
|
|
u32 page_size = dev->ctrl.page_size;
|
2015-03-26 16:07:51 +00:00
|
|
|
int offset = dma_addr & (page_size - 1);
|
2011-02-10 13:51:24 +00:00
|
|
|
__le64 *prp_list;
|
2015-11-28 14:43:10 +00:00
|
|
|
__le64 **list = iod_list(req);
|
2011-02-10 13:51:24 +00:00
|
|
|
dma_addr_t prp_dma;
|
2011-12-20 18:34:52 +00:00
|
|
|
int nprps, i;
|
2011-01-26 15:02:29 +00:00
|
|
|
|
2014-06-23 17:34:01 +00:00
|
|
|
length -= (page_size - offset);
|
2011-01-26 15:02:29 +00:00
|
|
|
if (length <= 0)
|
2015-10-16 05:58:37 +00:00
|
|
|
return true;
|
2011-01-26 15:02:29 +00:00
|
|
|
|
2014-06-23 17:34:01 +00:00
|
|
|
dma_len -= (page_size - offset);
|
2011-01-26 15:02:29 +00:00
|
|
|
if (dma_len) {
|
2014-06-23 17:34:01 +00:00
|
|
|
dma_addr += (page_size - offset);
|
2011-01-26 15:02:29 +00:00
|
|
|
} else {
|
|
|
|
sg = sg_next(sg);
|
|
|
|
dma_addr = sg_dma_address(sg);
|
|
|
|
dma_len = sg_dma_len(sg);
|
|
|
|
}
|
|
|
|
|
2014-06-23 17:34:01 +00:00
|
|
|
if (length <= page_size) {
|
2014-04-03 22:45:23 +00:00
|
|
|
iod->first_dma = dma_addr;
|
2015-10-16 05:58:37 +00:00
|
|
|
return true;
|
2011-02-10 13:51:24 +00:00
|
|
|
}
|
|
|
|
|
2014-06-23 17:34:01 +00:00
|
|
|
nprps = DIV_ROUND_UP(length, page_size);
|
2011-02-10 15:30:34 +00:00
|
|
|
if (nprps <= (256 / 8)) {
|
|
|
|
pool = dev->prp_small_pool;
|
2011-12-20 18:34:52 +00:00
|
|
|
iod->npages = 0;
|
2011-02-10 15:30:34 +00:00
|
|
|
} else {
|
|
|
|
pool = dev->prp_page_pool;
|
2011-12-20 18:34:52 +00:00
|
|
|
iod->npages = 1;
|
2011-02-10 15:30:34 +00:00
|
|
|
}
|
|
|
|
|
2015-10-16 05:58:37 +00:00
|
|
|
prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma);
|
2011-05-12 17:51:41 +00:00
|
|
|
if (!prp_list) {
|
2014-04-03 22:45:23 +00:00
|
|
|
iod->first_dma = dma_addr;
|
2011-12-20 18:34:52 +00:00
|
|
|
iod->npages = -1;
|
2015-10-16 05:58:37 +00:00
|
|
|
return false;
|
2011-05-12 17:51:41 +00:00
|
|
|
}
|
2011-12-20 18:34:52 +00:00
|
|
|
list[0] = prp_list;
|
|
|
|
iod->first_dma = prp_dma;
|
2011-02-10 13:51:24 +00:00
|
|
|
i = 0;
|
|
|
|
for (;;) {
|
2014-06-23 17:34:01 +00:00
|
|
|
if (i == page_size >> 3) {
|
2011-02-10 13:51:24 +00:00
|
|
|
__le64 *old_prp_list = prp_list;
|
2015-10-16 05:58:37 +00:00
|
|
|
prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma);
|
2011-12-20 18:34:52 +00:00
|
|
|
if (!prp_list)
|
2015-10-16 05:58:37 +00:00
|
|
|
return false;
|
2011-12-20 18:34:52 +00:00
|
|
|
list[iod->npages++] = prp_list;
|
2011-03-16 20:43:40 +00:00
|
|
|
prp_list[0] = old_prp_list[i - 1];
|
|
|
|
old_prp_list[i - 1] = cpu_to_le64(prp_dma);
|
|
|
|
i = 1;
|
2011-02-10 13:51:24 +00:00
|
|
|
}
|
|
|
|
prp_list[i++] = cpu_to_le64(dma_addr);
|
2014-06-23 17:34:01 +00:00
|
|
|
dma_len -= page_size;
|
|
|
|
dma_addr += page_size;
|
|
|
|
length -= page_size;
|
2011-02-10 13:51:24 +00:00
|
|
|
if (length <= 0)
|
|
|
|
break;
|
|
|
|
if (dma_len > 0)
|
|
|
|
continue;
|
|
|
|
BUG_ON(dma_len < 0);
|
|
|
|
sg = sg_next(sg);
|
|
|
|
dma_addr = sg_dma_address(sg);
|
|
|
|
dma_len = sg_dma_len(sg);
|
2011-01-26 15:02:29 +00:00
|
|
|
}
|
|
|
|
|
2015-10-16 05:58:37 +00:00
|
|
|
return true;
|
2011-01-26 15:02:29 +00:00
|
|
|
}
|
|
|
|
|
2015-11-28 14:43:10 +00:00
|
|
|
static int nvme_map_data(struct nvme_dev *dev, struct request *req,
|
2016-03-22 07:24:45 +00:00
|
|
|
unsigned size, struct nvme_command *cmnd)
|
2015-05-22 09:12:46 +00:00
|
|
|
{
|
2015-11-28 14:43:10 +00:00
|
|
|
struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
|
2015-10-16 05:58:38 +00:00
|
|
|
struct request_queue *q = req->q;
|
|
|
|
enum dma_data_direction dma_dir = rq_data_dir(req) ?
|
|
|
|
DMA_TO_DEVICE : DMA_FROM_DEVICE;
|
|
|
|
int ret = BLK_MQ_RQ_QUEUE_ERROR;
|
2015-05-22 09:12:46 +00:00
|
|
|
|
2016-12-08 22:20:32 +00:00
|
|
|
sg_init_table(iod->sg, blk_rq_nr_phys_segments(req));
|
2015-10-16 05:58:38 +00:00
|
|
|
iod->nents = blk_rq_map_sg(q, req, iod->sg);
|
|
|
|
if (!iod->nents)
|
|
|
|
goto out;
|
2015-05-22 09:12:46 +00:00
|
|
|
|
2015-10-16 05:58:38 +00:00
|
|
|
ret = BLK_MQ_RQ_QUEUE_BUSY;
|
2016-10-11 20:54:20 +00:00
|
|
|
if (!dma_map_sg_attrs(dev->dev, iod->sg, iod->nents, dma_dir,
|
|
|
|
DMA_ATTR_NO_WARN))
|
2015-10-16 05:58:38 +00:00
|
|
|
goto out;
|
2015-05-22 09:12:46 +00:00
|
|
|
|
2016-03-22 07:24:45 +00:00
|
|
|
if (!nvme_setup_prps(dev, req, size))
|
2015-10-16 05:58:38 +00:00
|
|
|
goto out_unmap;
|
2012-11-09 23:33:05 +00:00
|
|
|
|
2015-10-16 05:58:38 +00:00
|
|
|
ret = BLK_MQ_RQ_QUEUE_ERROR;
|
|
|
|
if (blk_integrity_rq(req)) {
|
|
|
|
if (blk_rq_count_integrity_sg(q, req->bio) != 1)
|
|
|
|
goto out_unmap;
|
2012-11-09 23:33:05 +00:00
|
|
|
|
2015-10-26 08:12:51 +00:00
|
|
|
sg_init_table(&iod->meta_sg, 1);
|
|
|
|
if (blk_rq_map_integrity_sg(q, req->bio, &iod->meta_sg) != 1)
|
2015-10-16 05:58:38 +00:00
|
|
|
goto out_unmap;
|
2012-11-09 23:33:05 +00:00
|
|
|
|
2015-10-16 05:58:38 +00:00
|
|
|
if (rq_data_dir(req))
|
|
|
|
nvme_dif_remap(req, nvme_dif_prep);
|
2012-11-09 23:33:05 +00:00
|
|
|
|
2015-10-26 08:12:51 +00:00
|
|
|
if (!dma_map_sg(dev->dev, &iod->meta_sg, 1, dma_dir))
|
2015-10-16 05:58:38 +00:00
|
|
|
goto out_unmap;
|
2015-05-22 09:12:46 +00:00
|
|
|
}
|
2011-02-22 19:18:30 +00:00
|
|
|
|
2016-06-13 14:45:25 +00:00
|
|
|
cmnd->rw.dptr.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
|
|
|
|
cmnd->rw.dptr.prp2 = cpu_to_le64(iod->first_dma);
|
2015-10-16 05:58:38 +00:00
|
|
|
if (blk_integrity_rq(req))
|
2015-10-26 08:12:51 +00:00
|
|
|
cmnd->rw.metadata = cpu_to_le64(sg_dma_address(&iod->meta_sg));
|
2015-10-16 05:58:38 +00:00
|
|
|
return BLK_MQ_RQ_QUEUE_OK;
|
2011-02-22 19:18:30 +00:00
|
|
|
|
2015-10-16 05:58:38 +00:00
|
|
|
out_unmap:
|
|
|
|
dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
|
|
|
|
out:
|
|
|
|
return ret;
|
2011-02-22 19:18:30 +00:00
|
|
|
}
|
|
|
|
|
2015-11-28 14:43:10 +00:00
|
|
|
static void nvme_unmap_data(struct nvme_dev *dev, struct request *req)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2015-11-28 14:43:10 +00:00
|
|
|
struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
|
2015-11-26 09:51:23 +00:00
|
|
|
enum dma_data_direction dma_dir = rq_data_dir(req) ?
|
|
|
|
DMA_TO_DEVICE : DMA_FROM_DEVICE;
|
|
|
|
|
|
|
|
if (iod->nents) {
|
|
|
|
dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
|
|
|
|
if (blk_integrity_rq(req)) {
|
|
|
|
if (!rq_data_dir(req))
|
|
|
|
nvme_dif_remap(req, nvme_dif_complete);
|
2015-10-26 08:12:51 +00:00
|
|
|
dma_unmap_sg(dev->dev, &iod->meta_sg, 1, dma_dir);
|
NVMe: Metadata format support
Adds support for NVMe metadata formats and exposes block devices for
all namespaces regardless of their format. Namespace formats that are
unusable will have disk capacity set to 0, but a handle to the block
device is created to simplify device management. A namespace is not
usable when the format requires host interleave block and metadata in
single buffer, has no provisioned storage, or has better data but failed
to register with blk integrity.
The namespace has to be scanned in two phases to support separate
metadata formats. The first establishes the sector size and capacity
prior to invoking add_disk. If metadata is required, the capacity will
be temporarilly set to 0 until it can be revalidated and registered with
the integrity extenstions after add_disk completes.
The driver relies on the integrity extensions to provide the metadata
buffer. NVMe requires this be a single physically contiguous region,
so only one integrity segment is allowed per command. If the metadata
is used for T10 PI, the driver provides mappings to save and restore
the reftag physical block translation. The driver provides no-op
functions for generate and verify if metadata is not used for protection
information. This way the setup is always provided by the block layer.
If a request does not supply a required metadata buffer, the command
is failed with bad address. This could only happen if a user manually
disables verify/generate on such a disk. The only exception to where
this is okay is if the controller is capable of stripping/generating
the metadata, which is possible on some types of formats.
The metadata scatter gather list now occupies the spot in the nvme_iod
that used to be used to link retryable IOD's, but we don't do that
anymore, so the field was unused.
Signed-off-by: Keith Busch <keith.busch@intel.com>
2015-02-19 20:39:03 +00:00
|
|
|
}
|
2015-08-26 14:56:14 +00:00
|
|
|
}
|
NVMe: Metadata format support
Adds support for NVMe metadata formats and exposes block devices for
all namespaces regardless of their format. Namespace formats that are
unusable will have disk capacity set to 0, but a handle to the block
device is created to simplify device management. A namespace is not
usable when the format requires host interleave block and metadata in
single buffer, has no provisioned storage, or has better data but failed
to register with blk integrity.
The namespace has to be scanned in two phases to support separate
metadata formats. The first establishes the sector size and capacity
prior to invoking add_disk. If metadata is required, the capacity will
be temporarilly set to 0 until it can be revalidated and registered with
the integrity extenstions after add_disk completes.
The driver relies on the integrity extensions to provide the metadata
buffer. NVMe requires this be a single physically contiguous region,
so only one integrity segment is allowed per command. If the metadata
is used for T10 PI, the driver provides mappings to save and restore
the reftag physical block translation. The driver provides no-op
functions for generate and verify if metadata is not used for protection
information. This way the setup is always provided by the block layer.
If a request does not supply a required metadata buffer, the command
is failed with bad address. This could only happen if a user manually
disables verify/generate on such a disk. The only exception to where
this is okay is if the controller is capable of stripping/generating
the metadata, which is possible on some types of formats.
The metadata scatter gather list now occupies the spot in the nvme_iod
that used to be used to link retryable IOD's, but we don't do that
anymore, so the field was unused.
Signed-off-by: Keith Busch <keith.busch@intel.com>
2015-02-19 20:39:03 +00:00
|
|
|
|
2016-12-08 22:20:32 +00:00
|
|
|
nvme_cleanup_cmd(req);
|
2015-11-28 14:43:10 +00:00
|
|
|
nvme_free_iod(dev, req);
|
2015-11-26 09:51:23 +00:00
|
|
|
}
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2015-05-22 09:12:46 +00:00
|
|
|
/*
|
|
|
|
* NOTE: ns is NULL when called on the admin queue.
|
|
|
|
*/
|
2014-11-04 15:20:14 +00:00
|
|
|
static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
|
|
|
|
const struct blk_mq_queue_data *bd)
|
2014-04-03 22:45:23 +00:00
|
|
|
{
|
2014-11-04 15:20:14 +00:00
|
|
|
struct nvme_ns *ns = hctx->queue->queuedata;
|
|
|
|
struct nvme_queue *nvmeq = hctx->driver_data;
|
2015-05-22 09:12:46 +00:00
|
|
|
struct nvme_dev *dev = nvmeq->dev;
|
2014-11-04 15:20:14 +00:00
|
|
|
struct request *req = bd->rq;
|
2015-10-16 05:58:38 +00:00
|
|
|
struct nvme_command cmnd;
|
2016-03-22 07:24:43 +00:00
|
|
|
unsigned map_len;
|
2015-10-16 05:58:38 +00:00
|
|
|
int ret = BLK_MQ_RQ_QUEUE_OK;
|
2014-04-03 22:45:23 +00:00
|
|
|
|
NVMe: Metadata format support
Adds support for NVMe metadata formats and exposes block devices for
all namespaces regardless of their format. Namespace formats that are
unusable will have disk capacity set to 0, but a handle to the block
device is created to simplify device management. A namespace is not
usable when the format requires host interleave block and metadata in
single buffer, has no provisioned storage, or has better data but failed
to register with blk integrity.
The namespace has to be scanned in two phases to support separate
metadata formats. The first establishes the sector size and capacity
prior to invoking add_disk. If metadata is required, the capacity will
be temporarilly set to 0 until it can be revalidated and registered with
the integrity extenstions after add_disk completes.
The driver relies on the integrity extensions to provide the metadata
buffer. NVMe requires this be a single physically contiguous region,
so only one integrity segment is allowed per command. If the metadata
is used for T10 PI, the driver provides mappings to save and restore
the reftag physical block translation. The driver provides no-op
functions for generate and verify if metadata is not used for protection
information. This way the setup is always provided by the block layer.
If a request does not supply a required metadata buffer, the command
is failed with bad address. This could only happen if a user manually
disables verify/generate on such a disk. The only exception to where
this is okay is if the controller is capable of stripping/generating
the metadata, which is possible on some types of formats.
The metadata scatter gather list now occupies the spot in the nvme_iod
that used to be used to link retryable IOD's, but we don't do that
anymore, so the field was unused.
Signed-off-by: Keith Busch <keith.busch@intel.com>
2015-02-19 20:39:03 +00:00
|
|
|
/*
|
|
|
|
* If formated with metadata, require the block layer provide a buffer
|
|
|
|
* unless this namespace is formated such that the metadata can be
|
|
|
|
* stripped/generated by the controller with PRACT=1.
|
|
|
|
*/
|
2015-05-22 09:12:46 +00:00
|
|
|
if (ns && ns->ms && !blk_integrity_rq(req)) {
|
2015-06-19 17:07:30 +00:00
|
|
|
if (!(ns->pi_type && ns->ms == 8) &&
|
|
|
|
req->cmd_type != REQ_TYPE_DRV_PRIV) {
|
2015-11-26 12:03:13 +00:00
|
|
|
blk_mq_end_request(req, -EFAULT);
|
NVMe: Metadata format support
Adds support for NVMe metadata formats and exposes block devices for
all namespaces regardless of their format. Namespace formats that are
unusable will have disk capacity set to 0, but a handle to the block
device is created to simplify device management. A namespace is not
usable when the format requires host interleave block and metadata in
single buffer, has no provisioned storage, or has better data but failed
to register with blk integrity.
The namespace has to be scanned in two phases to support separate
metadata formats. The first establishes the sector size and capacity
prior to invoking add_disk. If metadata is required, the capacity will
be temporarilly set to 0 until it can be revalidated and registered with
the integrity extenstions after add_disk completes.
The driver relies on the integrity extensions to provide the metadata
buffer. NVMe requires this be a single physically contiguous region,
so only one integrity segment is allowed per command. If the metadata
is used for T10 PI, the driver provides mappings to save and restore
the reftag physical block translation. The driver provides no-op
functions for generate and verify if metadata is not used for protection
information. This way the setup is always provided by the block layer.
If a request does not supply a required metadata buffer, the command
is failed with bad address. This could only happen if a user manually
disables verify/generate on such a disk. The only exception to where
this is okay is if the controller is capable of stripping/generating
the metadata, which is possible on some types of formats.
The metadata scatter gather list now occupies the spot in the nvme_iod
that used to be used to link retryable IOD's, but we don't do that
anymore, so the field was unused.
Signed-off-by: Keith Busch <keith.busch@intel.com>
2015-02-19 20:39:03 +00:00
|
|
|
return BLK_MQ_RQ_QUEUE_OK;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-12-08 22:20:32 +00:00
|
|
|
ret = nvme_setup_cmd(ns, req, &cmnd);
|
2016-11-15 19:11:58 +00:00
|
|
|
if (ret != BLK_MQ_RQ_QUEUE_OK)
|
2015-11-28 14:43:10 +00:00
|
|
|
return ret;
|
2014-11-04 15:20:14 +00:00
|
|
|
|
2016-12-08 22:20:32 +00:00
|
|
|
map_len = nvme_map_len(req);
|
|
|
|
ret = nvme_init_iod(req, map_len, dev);
|
2016-11-15 19:11:58 +00:00
|
|
|
if (ret != BLK_MQ_RQ_QUEUE_OK)
|
2016-12-08 22:20:32 +00:00
|
|
|
goto out_free_cmd;
|
2014-11-04 15:20:14 +00:00
|
|
|
|
2016-12-08 22:20:32 +00:00
|
|
|
if (blk_rq_nr_phys_segments(req))
|
2016-03-22 07:24:45 +00:00
|
|
|
ret = nvme_map_data(dev, req, map_len, &cmnd);
|
2014-11-04 15:20:14 +00:00
|
|
|
|
2016-11-15 19:11:58 +00:00
|
|
|
if (ret != BLK_MQ_RQ_QUEUE_OK)
|
2016-12-08 22:20:32 +00:00
|
|
|
goto out_cleanup_iod;
|
2014-11-04 15:20:14 +00:00
|
|
|
|
2015-11-26 11:59:50 +00:00
|
|
|
blk_mq_start_request(req);
|
2014-11-04 15:20:14 +00:00
|
|
|
|
2015-10-16 05:58:38 +00:00
|
|
|
spin_lock_irq(&nvmeq->q_lock);
|
2016-02-11 20:05:42 +00:00
|
|
|
if (unlikely(nvmeq->cq_vector < 0)) {
|
2016-02-24 16:15:56 +00:00
|
|
|
if (ns && !test_bit(NVME_NS_DEAD, &ns->flags))
|
|
|
|
ret = BLK_MQ_RQ_QUEUE_BUSY;
|
|
|
|
else
|
|
|
|
ret = BLK_MQ_RQ_QUEUE_ERROR;
|
2016-02-11 20:05:42 +00:00
|
|
|
spin_unlock_irq(&nvmeq->q_lock);
|
2016-12-08 22:20:32 +00:00
|
|
|
goto out_cleanup_iod;
|
2016-02-11 20:05:42 +00:00
|
|
|
}
|
2015-10-16 05:58:38 +00:00
|
|
|
__nvme_submit_cmd(nvmeq, &cmnd);
|
2014-11-04 15:20:14 +00:00
|
|
|
nvme_process_cq(nvmeq);
|
|
|
|
spin_unlock_irq(&nvmeq->q_lock);
|
|
|
|
return BLK_MQ_RQ_QUEUE_OK;
|
2016-12-08 22:20:32 +00:00
|
|
|
out_cleanup_iod:
|
2015-11-28 14:43:10 +00:00
|
|
|
nvme_free_iod(dev, req);
|
2016-12-08 22:20:32 +00:00
|
|
|
out_free_cmd:
|
|
|
|
nvme_cleanup_cmd(req);
|
2015-10-16 05:58:38 +00:00
|
|
|
return ret;
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
NVMe: Metadata format support
Adds support for NVMe metadata formats and exposes block devices for
all namespaces regardless of their format. Namespace formats that are
unusable will have disk capacity set to 0, but a handle to the block
device is created to simplify device management. A namespace is not
usable when the format requires host interleave block and metadata in
single buffer, has no provisioned storage, or has better data but failed
to register with blk integrity.
The namespace has to be scanned in two phases to support separate
metadata formats. The first establishes the sector size and capacity
prior to invoking add_disk. If metadata is required, the capacity will
be temporarilly set to 0 until it can be revalidated and registered with
the integrity extenstions after add_disk completes.
The driver relies on the integrity extensions to provide the metadata
buffer. NVMe requires this be a single physically contiguous region,
so only one integrity segment is allowed per command. If the metadata
is used for T10 PI, the driver provides mappings to save and restore
the reftag physical block translation. The driver provides no-op
functions for generate and verify if metadata is not used for protection
information. This way the setup is always provided by the block layer.
If a request does not supply a required metadata buffer, the command
is failed with bad address. This could only happen if a user manually
disables verify/generate on such a disk. The only exception to where
this is okay is if the controller is capable of stripping/generating
the metadata, which is possible on some types of formats.
The metadata scatter gather list now occupies the spot in the nvme_iod
that used to be used to link retryable IOD's, but we don't do that
anymore, so the field was unused.
Signed-off-by: Keith Busch <keith.busch@intel.com>
2015-02-19 20:39:03 +00:00
|
|
|
|
2015-11-26 12:03:13 +00:00
|
|
|
static void nvme_complete_rq(struct request *req)
|
|
|
|
{
|
2015-11-28 14:43:10 +00:00
|
|
|
struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
|
|
|
|
struct nvme_dev *dev = iod->nvmeq->dev;
|
2015-11-26 12:03:13 +00:00
|
|
|
int error = 0;
|
NVMe: Metadata format support
Adds support for NVMe metadata formats and exposes block devices for
all namespaces regardless of their format. Namespace formats that are
unusable will have disk capacity set to 0, but a handle to the block
device is created to simplify device management. A namespace is not
usable when the format requires host interleave block and metadata in
single buffer, has no provisioned storage, or has better data but failed
to register with blk integrity.
The namespace has to be scanned in two phases to support separate
metadata formats. The first establishes the sector size and capacity
prior to invoking add_disk. If metadata is required, the capacity will
be temporarilly set to 0 until it can be revalidated and registered with
the integrity extenstions after add_disk completes.
The driver relies on the integrity extensions to provide the metadata
buffer. NVMe requires this be a single physically contiguous region,
so only one integrity segment is allowed per command. If the metadata
is used for T10 PI, the driver provides mappings to save and restore
the reftag physical block translation. The driver provides no-op
functions for generate and verify if metadata is not used for protection
information. This way the setup is always provided by the block layer.
If a request does not supply a required metadata buffer, the command
is failed with bad address. This could only happen if a user manually
disables verify/generate on such a disk. The only exception to where
this is okay is if the controller is capable of stripping/generating
the metadata, which is possible on some types of formats.
The metadata scatter gather list now occupies the spot in the nvme_iod
that used to be used to link retryable IOD's, but we don't do that
anymore, so the field was unused.
Signed-off-by: Keith Busch <keith.busch@intel.com>
2015-02-19 20:39:03 +00:00
|
|
|
|
2015-11-28 14:43:10 +00:00
|
|
|
nvme_unmap_data(dev, req);
|
NVMe: Metadata format support
Adds support for NVMe metadata formats and exposes block devices for
all namespaces regardless of their format. Namespace formats that are
unusable will have disk capacity set to 0, but a handle to the block
device is created to simplify device management. A namespace is not
usable when the format requires host interleave block and metadata in
single buffer, has no provisioned storage, or has better data but failed
to register with blk integrity.
The namespace has to be scanned in two phases to support separate
metadata formats. The first establishes the sector size and capacity
prior to invoking add_disk. If metadata is required, the capacity will
be temporarilly set to 0 until it can be revalidated and registered with
the integrity extenstions after add_disk completes.
The driver relies on the integrity extensions to provide the metadata
buffer. NVMe requires this be a single physically contiguous region,
so only one integrity segment is allowed per command. If the metadata
is used for T10 PI, the driver provides mappings to save and restore
the reftag physical block translation. The driver provides no-op
functions for generate and verify if metadata is not used for protection
information. This way the setup is always provided by the block layer.
If a request does not supply a required metadata buffer, the command
is failed with bad address. This could only happen if a user manually
disables verify/generate on such a disk. The only exception to where
this is okay is if the controller is capable of stripping/generating
the metadata, which is possible on some types of formats.
The metadata scatter gather list now occupies the spot in the nvme_iod
that used to be used to link retryable IOD's, but we don't do that
anymore, so the field was unused.
Signed-off-by: Keith Busch <keith.busch@intel.com>
2015-02-19 20:39:03 +00:00
|
|
|
|
2015-11-26 12:03:13 +00:00
|
|
|
if (unlikely(req->errors)) {
|
|
|
|
if (nvme_req_needs_retry(req, req->errors)) {
|
2016-07-12 23:20:31 +00:00
|
|
|
req->retries++;
|
2015-11-26 12:03:13 +00:00
|
|
|
nvme_requeue_req(req);
|
|
|
|
return;
|
NVMe: Metadata format support
Adds support for NVMe metadata formats and exposes block devices for
all namespaces regardless of their format. Namespace formats that are
unusable will have disk capacity set to 0, but a handle to the block
device is created to simplify device management. A namespace is not
usable when the format requires host interleave block and metadata in
single buffer, has no provisioned storage, or has better data but failed
to register with blk integrity.
The namespace has to be scanned in two phases to support separate
metadata formats. The first establishes the sector size and capacity
prior to invoking add_disk. If metadata is required, the capacity will
be temporarilly set to 0 until it can be revalidated and registered with
the integrity extenstions after add_disk completes.
The driver relies on the integrity extensions to provide the metadata
buffer. NVMe requires this be a single physically contiguous region,
so only one integrity segment is allowed per command. If the metadata
is used for T10 PI, the driver provides mappings to save and restore
the reftag physical block translation. The driver provides no-op
functions for generate and verify if metadata is not used for protection
information. This way the setup is always provided by the block layer.
If a request does not supply a required metadata buffer, the command
is failed with bad address. This could only happen if a user manually
disables verify/generate on such a disk. The only exception to where
this is okay is if the controller is capable of stripping/generating
the metadata, which is possible on some types of formats.
The metadata scatter gather list now occupies the spot in the nvme_iod
that used to be used to link retryable IOD's, but we don't do that
anymore, so the field was unused.
Signed-off-by: Keith Busch <keith.busch@intel.com>
2015-02-19 20:39:03 +00:00
|
|
|
}
|
2011-02-10 17:01:09 +00:00
|
|
|
|
2015-11-26 12:03:13 +00:00
|
|
|
if (req->cmd_type == REQ_TYPE_DRV_PRIV)
|
|
|
|
error = req->errors;
|
|
|
|
else
|
|
|
|
error = nvme_error_status(req->errors);
|
|
|
|
}
|
2014-11-04 15:20:14 +00:00
|
|
|
|
2015-11-28 14:43:10 +00:00
|
|
|
if (unlikely(iod->aborted)) {
|
2016-02-10 15:51:15 +00:00
|
|
|
dev_warn(dev->ctrl.device,
|
2015-11-26 12:03:13 +00:00
|
|
|
"completing aborted command with status: %04x\n",
|
|
|
|
req->errors);
|
|
|
|
}
|
2014-11-04 15:20:14 +00:00
|
|
|
|
2015-11-26 12:03:13 +00:00
|
|
|
blk_mq_end_request(req, error);
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
2016-03-22 15:02:06 +00:00
|
|
|
/* We read the CQE phase first to check if the rest of the entry is valid */
|
|
|
|
static inline bool nvme_cqe_valid(struct nvme_queue *nvmeq, u16 head,
|
|
|
|
u16 phase)
|
|
|
|
{
|
|
|
|
return (le16_to_cpu(nvmeq->cqes[head].status) & 1) == phase;
|
|
|
|
}
|
|
|
|
|
2015-11-04 03:37:26 +00:00
|
|
|
static void __nvme_process_cq(struct nvme_queue *nvmeq, unsigned int *tag)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2011-01-20 18:24:06 +00:00
|
|
|
u16 head, phase;
|
2011-01-20 17:50:14 +00:00
|
|
|
|
|
|
|
head = nvmeq->cq_head;
|
2011-01-20 18:24:06 +00:00
|
|
|
phase = nvmeq->cq_phase;
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2016-03-22 15:02:06 +00:00
|
|
|
while (nvme_cqe_valid(nvmeq, head, phase)) {
|
2011-01-20 17:50:14 +00:00
|
|
|
struct nvme_completion cqe = nvmeq->cqes[head];
|
2015-11-26 12:03:13 +00:00
|
|
|
struct request *req;
|
2015-11-28 14:42:28 +00:00
|
|
|
|
2011-01-20 17:50:14 +00:00
|
|
|
if (++head == nvmeq->q_depth) {
|
|
|
|
head = 0;
|
2011-01-20 18:24:06 +00:00
|
|
|
phase = !phase;
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
2015-11-28 14:42:28 +00:00
|
|
|
|
2015-11-04 03:37:26 +00:00
|
|
|
if (tag && *tag == cqe.command_id)
|
|
|
|
*tag = -1;
|
2015-11-28 14:42:28 +00:00
|
|
|
|
2015-11-26 11:59:50 +00:00
|
|
|
if (unlikely(cqe.command_id >= nvmeq->q_depth)) {
|
2016-02-10 15:51:15 +00:00
|
|
|
dev_warn(nvmeq->dev->ctrl.device,
|
2015-11-26 11:59:50 +00:00
|
|
|
"invalid id %d completed on queue %d\n",
|
|
|
|
cqe.command_id, le16_to_cpu(cqe.sq_id));
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2015-11-28 14:42:28 +00:00
|
|
|
/*
|
|
|
|
* AEN requests are special as they don't time out and can
|
|
|
|
* survive any kind of queue freeze and often don't respond to
|
|
|
|
* aborts. We don't even bother to allocate a struct request
|
|
|
|
* for them but rather special case them here.
|
|
|
|
*/
|
|
|
|
if (unlikely(nvmeq->qid == 0 &&
|
|
|
|
cqe.command_id >= NVME_AQ_BLKMQ_DEPTH)) {
|
2016-11-10 15:32:34 +00:00
|
|
|
nvme_complete_async_event(&nvmeq->dev->ctrl,
|
|
|
|
cqe.status, &cqe.result);
|
2015-11-28 14:42:28 +00:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2015-11-26 12:03:13 +00:00
|
|
|
req = blk_mq_tag_to_rq(*nvmeq->tags, cqe.command_id);
|
2016-11-10 15:32:33 +00:00
|
|
|
nvme_req(req)->result = cqe.result;
|
2016-03-22 15:02:06 +00:00
|
|
|
blk_mq_complete_request(req, le16_to_cpu(cqe.status) >> 1);
|
2015-11-26 12:03:13 +00:00
|
|
|
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* If the controller ignores the cq head doorbell and continuously
|
|
|
|
* writes to the queue, it is theoretically possible to wrap around
|
|
|
|
* the queue twice and mistakenly return IRQ_NONE. Linux only
|
|
|
|
* requires that 0.1% of your interrupts are handled, so this isn't
|
|
|
|
* a big problem.
|
|
|
|
*/
|
2011-01-20 18:24:06 +00:00
|
|
|
if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
|
2015-11-04 03:37:26 +00:00
|
|
|
return;
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2015-11-20 15:38:13 +00:00
|
|
|
if (likely(nvmeq->cq_vector >= 0))
|
|
|
|
writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
|
2011-01-20 17:50:14 +00:00
|
|
|
nvmeq->cq_head = head;
|
2011-01-20 18:24:06 +00:00
|
|
|
nvmeq->cq_phase = phase;
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2013-06-24 15:47:34 +00:00
|
|
|
nvmeq->cqe_seen = 1;
|
2015-11-04 03:37:26 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_process_cq(struct nvme_queue *nvmeq)
|
|
|
|
{
|
|
|
|
__nvme_process_cq(nvmeq, NULL);
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t nvme_irq(int irq, void *data)
|
2011-02-06 12:28:06 +00:00
|
|
|
{
|
|
|
|
irqreturn_t result;
|
|
|
|
struct nvme_queue *nvmeq = data;
|
|
|
|
spin_lock(&nvmeq->q_lock);
|
2013-06-24 15:47:34 +00:00
|
|
|
nvme_process_cq(nvmeq);
|
|
|
|
result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
|
|
|
|
nvmeq->cqe_seen = 0;
|
2011-02-06 12:28:06 +00:00
|
|
|
spin_unlock(&nvmeq->q_lock);
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t nvme_irq_check(int irq, void *data)
|
|
|
|
{
|
|
|
|
struct nvme_queue *nvmeq = data;
|
2016-03-22 15:02:06 +00:00
|
|
|
if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase))
|
|
|
|
return IRQ_WAKE_THREAD;
|
|
|
|
return IRQ_NONE;
|
2011-02-06 12:28:06 +00:00
|
|
|
}
|
|
|
|
|
2015-11-04 03:37:26 +00:00
|
|
|
static int nvme_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag)
|
|
|
|
{
|
|
|
|
struct nvme_queue *nvmeq = hctx->driver_data;
|
|
|
|
|
2016-03-22 15:02:06 +00:00
|
|
|
if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase)) {
|
2015-11-04 03:37:26 +00:00
|
|
|
spin_lock_irq(&nvmeq->q_lock);
|
|
|
|
__nvme_process_cq(nvmeq, &tag);
|
|
|
|
spin_unlock_irq(&nvmeq->q_lock);
|
|
|
|
|
|
|
|
if (tag == -1)
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-04-26 11:52:00 +00:00
|
|
|
static void nvme_pci_submit_async_event(struct nvme_ctrl *ctrl, int aer_idx)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2016-04-26 11:52:00 +00:00
|
|
|
struct nvme_dev *dev = to_nvme_dev(ctrl);
|
2016-02-29 14:59:44 +00:00
|
|
|
struct nvme_queue *nvmeq = dev->queues[0];
|
2014-11-04 15:20:14 +00:00
|
|
|
struct nvme_command c;
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2014-11-04 15:20:14 +00:00
|
|
|
memset(&c, 0, sizeof(c));
|
|
|
|
c.common.opcode = nvme_admin_async_event;
|
2016-04-26 11:52:00 +00:00
|
|
|
c.common.command_id = NVME_AQ_BLKMQ_DEPTH + aer_idx;
|
2011-02-04 21:03:56 +00:00
|
|
|
|
2016-02-29 14:59:44 +00:00
|
|
|
spin_lock_irq(&nvmeq->q_lock);
|
2016-04-26 11:52:00 +00:00
|
|
|
__nvme_submit_cmd(nvmeq, &c);
|
2016-02-29 14:59:44 +00:00
|
|
|
spin_unlock_irq(&nvmeq->q_lock);
|
2015-05-22 09:12:38 +00:00
|
|
|
}
|
|
|
|
|
2011-01-20 17:50:14 +00:00
|
|
|
static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
|
2015-05-22 09:12:38 +00:00
|
|
|
{
|
2011-01-20 17:50:14 +00:00
|
|
|
struct nvme_command c;
|
|
|
|
|
|
|
|
memset(&c, 0, sizeof(c));
|
|
|
|
c.delete_queue.opcode = opcode;
|
|
|
|
c.delete_queue.qid = cpu_to_le16(id);
|
|
|
|
|
2015-11-26 09:06:56 +00:00
|
|
|
return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0);
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
|
|
|
|
struct nvme_queue *nvmeq)
|
|
|
|
{
|
|
|
|
struct nvme_command c;
|
|
|
|
int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
|
|
|
|
|
2015-05-22 09:12:46 +00:00
|
|
|
/*
|
|
|
|
* Note: we (ab)use the fact the the prp fields survive if no data
|
|
|
|
* is attached to the request.
|
|
|
|
*/
|
2011-01-20 17:50:14 +00:00
|
|
|
memset(&c, 0, sizeof(c));
|
|
|
|
c.create_cq.opcode = nvme_admin_create_cq;
|
|
|
|
c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
|
|
|
|
c.create_cq.cqid = cpu_to_le16(qid);
|
|
|
|
c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
|
|
|
|
c.create_cq.cq_flags = cpu_to_le16(flags);
|
|
|
|
c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
|
|
|
|
|
2015-11-26 09:06:56 +00:00
|
|
|
return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0);
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
|
|
|
|
struct nvme_queue *nvmeq)
|
|
|
|
{
|
|
|
|
struct nvme_command c;
|
|
|
|
int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
|
|
|
|
|
2015-05-22 09:12:46 +00:00
|
|
|
/*
|
|
|
|
* Note: we (ab)use the fact the the prp fields survive if no data
|
|
|
|
* is attached to the request.
|
|
|
|
*/
|
2011-01-20 17:50:14 +00:00
|
|
|
memset(&c, 0, sizeof(c));
|
|
|
|
c.create_sq.opcode = nvme_admin_create_sq;
|
|
|
|
c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
|
|
|
|
c.create_sq.sqid = cpu_to_le16(qid);
|
|
|
|
c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
|
|
|
|
c.create_sq.sq_flags = cpu_to_le16(flags);
|
|
|
|
c.create_sq.cqid = cpu_to_le16(qid);
|
|
|
|
|
2015-11-26 09:06:56 +00:00
|
|
|
return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0);
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
|
|
|
|
{
|
|
|
|
return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
|
|
|
|
{
|
|
|
|
return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
|
|
|
|
}
|
|
|
|
|
2015-11-16 09:39:48 +00:00
|
|
|
static void abort_endio(struct request *req, int error)
|
2011-09-19 21:08:14 +00:00
|
|
|
{
|
2015-11-28 14:43:10 +00:00
|
|
|
struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
|
|
|
|
struct nvme_queue *nvmeq = iod->nvmeq;
|
2015-11-16 09:39:48 +00:00
|
|
|
u16 status = req->errors;
|
2015-06-27 18:20:34 +00:00
|
|
|
|
2016-02-29 14:59:47 +00:00
|
|
|
dev_warn(nvmeq->dev->ctrl.device, "Abort status: 0x%x", status);
|
2015-11-16 09:39:48 +00:00
|
|
|
atomic_inc(&nvmeq->dev->ctrl.abort_limit);
|
|
|
|
blk_mq_free_request(req);
|
2011-09-19 21:08:14 +00:00
|
|
|
}
|
|
|
|
|
2015-10-22 12:03:35 +00:00
|
|
|
static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
|
2013-12-10 20:10:38 +00:00
|
|
|
{
|
2015-11-28 14:43:10 +00:00
|
|
|
struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
|
|
|
|
struct nvme_queue *nvmeq = iod->nvmeq;
|
2013-12-10 20:10:38 +00:00
|
|
|
struct nvme_dev *dev = nvmeq->dev;
|
2014-11-04 15:20:14 +00:00
|
|
|
struct request *abort_req;
|
|
|
|
struct nvme_command cmd;
|
2013-12-10 20:10:38 +00:00
|
|
|
|
2015-10-22 12:03:35 +00:00
|
|
|
/*
|
2015-11-26 11:42:26 +00:00
|
|
|
* Shutdown immediately if controller times out while starting. The
|
|
|
|
* reset work will see the pci device disabled when it gets the forced
|
|
|
|
* cancellation error. All outstanding requests are completed on
|
|
|
|
* shutdown, so we return BLK_EH_HANDLED.
|
|
|
|
*/
|
2016-04-26 11:51:57 +00:00
|
|
|
if (dev->ctrl.state == NVME_CTRL_RESETTING) {
|
2016-02-10 15:51:15 +00:00
|
|
|
dev_warn(dev->ctrl.device,
|
2015-11-26 11:42:26 +00:00
|
|
|
"I/O %d QID %d timeout, disable controller\n",
|
|
|
|
req->tag, nvmeq->qid);
|
2016-01-12 21:41:18 +00:00
|
|
|
nvme_dev_disable(dev, false);
|
2015-11-26 11:42:26 +00:00
|
|
|
req->errors = NVME_SC_CANCELLED;
|
|
|
|
return BLK_EH_HANDLED;
|
2013-12-10 20:10:38 +00:00
|
|
|
}
|
|
|
|
|
2015-11-26 11:42:26 +00:00
|
|
|
/*
|
|
|
|
* Shutdown the controller immediately and schedule a reset if the
|
|
|
|
* command was already aborted once before and still hasn't been
|
|
|
|
* returned to the driver, or if this is the admin queue.
|
2015-10-22 12:03:35 +00:00
|
|
|
*/
|
2015-11-28 14:43:10 +00:00
|
|
|
if (!nvmeq->qid || iod->aborted) {
|
2016-02-10 15:51:15 +00:00
|
|
|
dev_warn(dev->ctrl.device,
|
2015-11-26 11:11:07 +00:00
|
|
|
"I/O %d QID %d timeout, reset controller\n",
|
|
|
|
req->tag, nvmeq->qid);
|
2016-01-12 21:41:18 +00:00
|
|
|
nvme_dev_disable(dev, false);
|
2016-10-05 20:32:45 +00:00
|
|
|
nvme_reset(dev);
|
2013-12-10 20:10:38 +00:00
|
|
|
|
2015-11-26 11:11:07 +00:00
|
|
|
/*
|
|
|
|
* Mark the request as handled, since the inline shutdown
|
|
|
|
* forces all outstanding requests to complete.
|
|
|
|
*/
|
|
|
|
req->errors = NVME_SC_CANCELLED;
|
|
|
|
return BLK_EH_HANDLED;
|
2013-12-10 20:10:38 +00:00
|
|
|
}
|
|
|
|
|
2015-11-28 14:43:10 +00:00
|
|
|
iod->aborted = 1;
|
2013-12-10 20:10:38 +00:00
|
|
|
|
2015-11-16 09:39:48 +00:00
|
|
|
if (atomic_dec_return(&dev->ctrl.abort_limit) < 0) {
|
2015-11-20 08:36:44 +00:00
|
|
|
atomic_inc(&dev->ctrl.abort_limit);
|
2015-10-22 12:03:35 +00:00
|
|
|
return BLK_EH_RESET_TIMER;
|
2015-11-20 08:36:44 +00:00
|
|
|
}
|
2014-11-04 15:20:14 +00:00
|
|
|
|
2013-12-10 20:10:38 +00:00
|
|
|
memset(&cmd, 0, sizeof(cmd));
|
|
|
|
cmd.abort.opcode = nvme_admin_abort_cmd;
|
2014-11-04 15:20:14 +00:00
|
|
|
cmd.abort.cid = req->tag;
|
2013-12-10 20:10:38 +00:00
|
|
|
cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
|
|
|
|
|
2016-02-10 15:51:15 +00:00
|
|
|
dev_warn(nvmeq->dev->ctrl.device,
|
|
|
|
"I/O %d QID %d timeout, aborting\n",
|
|
|
|
req->tag, nvmeq->qid);
|
2015-11-16 09:39:48 +00:00
|
|
|
|
|
|
|
abort_req = nvme_alloc_request(dev->ctrl.admin_q, &cmd,
|
2016-06-13 14:45:23 +00:00
|
|
|
BLK_MQ_REQ_NOWAIT, NVME_QID_ANY);
|
2015-11-16 09:39:48 +00:00
|
|
|
if (IS_ERR(abort_req)) {
|
|
|
|
atomic_inc(&dev->ctrl.abort_limit);
|
|
|
|
return BLK_EH_RESET_TIMER;
|
|
|
|
}
|
|
|
|
|
|
|
|
abort_req->timeout = ADMIN_TIMEOUT;
|
|
|
|
abort_req->end_io_data = NULL;
|
|
|
|
blk_execute_rq_nowait(abort_req->q, NULL, abort_req, 0, abort_endio);
|
2013-12-10 20:10:38 +00:00
|
|
|
|
2015-10-22 12:03:35 +00:00
|
|
|
/*
|
|
|
|
* The aborted req will be completed on receiving the abort req.
|
|
|
|
* We enable the timer again. If hit twice, it'll cause a device reset,
|
|
|
|
* as the device then is in a faulty state.
|
|
|
|
*/
|
|
|
|
return BLK_EH_RESET_TIMER;
|
2013-12-10 20:10:38 +00:00
|
|
|
}
|
|
|
|
|
2014-11-04 15:20:14 +00:00
|
|
|
static void nvme_free_queue(struct nvme_queue *nvmeq)
|
|
|
|
{
|
2012-08-03 17:55:56 +00:00
|
|
|
dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
|
|
|
|
(void *)nvmeq->cqes, nvmeq->cq_dma_addr);
|
2015-07-20 16:14:09 +00:00
|
|
|
if (nvmeq->sq_cmds)
|
|
|
|
dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
|
2012-08-03 17:55:56 +00:00
|
|
|
nvmeq->sq_cmds, nvmeq->sq_dma_addr);
|
|
|
|
kfree(nvmeq);
|
|
|
|
}
|
|
|
|
|
2013-12-16 18:50:00 +00:00
|
|
|
static void nvme_free_queues(struct nvme_dev *dev, int lowest)
|
2013-07-15 21:02:20 +00:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
2013-12-16 18:50:00 +00:00
|
|
|
for (i = dev->queue_count - 1; i >= lowest; i--) {
|
2014-11-04 15:20:14 +00:00
|
|
|
struct nvme_queue *nvmeq = dev->queues[i];
|
2013-07-15 21:02:20 +00:00
|
|
|
dev->queue_count--;
|
2014-11-04 15:20:14 +00:00
|
|
|
dev->queues[i] = NULL;
|
2014-07-07 15:14:42 +00:00
|
|
|
nvme_free_queue(nvmeq);
|
2015-01-15 04:01:58 +00:00
|
|
|
}
|
2013-07-15 21:02:20 +00:00
|
|
|
}
|
|
|
|
|
2013-12-10 20:10:40 +00:00
|
|
|
/**
|
|
|
|
* nvme_suspend_queue - put queue into suspended state
|
|
|
|
* @nvmeq - queue to suspend
|
|
|
|
*/
|
|
|
|
static int nvme_suspend_queue(struct nvme_queue *nvmeq)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2014-12-22 19:59:04 +00:00
|
|
|
int vector;
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2012-08-07 19:56:23 +00:00
|
|
|
spin_lock_irq(&nvmeq->q_lock);
|
2014-12-22 19:59:04 +00:00
|
|
|
if (nvmeq->cq_vector == -1) {
|
|
|
|
spin_unlock_irq(&nvmeq->q_lock);
|
|
|
|
return 1;
|
|
|
|
}
|
2016-09-14 14:18:57 +00:00
|
|
|
vector = nvmeq_irq(nvmeq);
|
2014-03-24 16:46:25 +00:00
|
|
|
nvmeq->dev->online_queues--;
|
2014-12-22 19:59:04 +00:00
|
|
|
nvmeq->cq_vector = -1;
|
2012-08-07 19:56:23 +00:00
|
|
|
spin_unlock_irq(&nvmeq->q_lock);
|
|
|
|
|
2015-11-26 09:06:56 +00:00
|
|
|
if (!nvmeq->qid && nvmeq->dev->ctrl.admin_q)
|
2016-01-04 16:10:57 +00:00
|
|
|
blk_mq_stop_hw_queues(nvmeq->dev->ctrl.admin_q);
|
2015-03-26 19:49:33 +00:00
|
|
|
|
2011-03-27 12:52:06 +00:00
|
|
|
free_irq(vector, nvmeq);
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2013-12-10 20:10:40 +00:00
|
|
|
return 0;
|
|
|
|
}
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2016-01-12 21:41:18 +00:00
|
|
|
static void nvme_disable_admin_queue(struct nvme_dev *dev, bool shutdown)
|
2013-12-10 20:10:40 +00:00
|
|
|
{
|
2016-01-12 21:41:18 +00:00
|
|
|
struct nvme_queue *nvmeq = dev->queues[0];
|
2013-12-10 20:10:40 +00:00
|
|
|
|
|
|
|
if (!nvmeq)
|
|
|
|
return;
|
|
|
|
if (nvme_suspend_queue(nvmeq))
|
|
|
|
return;
|
|
|
|
|
2016-01-12 21:41:18 +00:00
|
|
|
if (shutdown)
|
|
|
|
nvme_shutdown_ctrl(&dev->ctrl);
|
|
|
|
else
|
|
|
|
nvme_disable_ctrl(&dev->ctrl, lo_hi_readq(
|
|
|
|
dev->bar + NVME_REG_CAP));
|
2015-02-19 17:34:48 +00:00
|
|
|
|
|
|
|
spin_lock_irq(&nvmeq->q_lock);
|
|
|
|
nvme_process_cq(nvmeq);
|
|
|
|
spin_unlock_irq(&nvmeq->q_lock);
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
2015-07-20 16:14:09 +00:00
|
|
|
static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
|
|
|
|
int entry_size)
|
|
|
|
{
|
|
|
|
int q_depth = dev->q_depth;
|
2015-11-28 14:03:49 +00:00
|
|
|
unsigned q_size_aligned = roundup(q_depth * entry_size,
|
|
|
|
dev->ctrl.page_size);
|
2015-07-20 16:14:09 +00:00
|
|
|
|
|
|
|
if (q_size_aligned * nr_io_queues > dev->cmb_size) {
|
2015-07-21 21:08:13 +00:00
|
|
|
u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
|
2015-11-28 14:03:49 +00:00
|
|
|
mem_per_q = round_down(mem_per_q, dev->ctrl.page_size);
|
2015-07-21 21:08:13 +00:00
|
|
|
q_depth = div_u64(mem_per_q, entry_size);
|
2015-07-20 16:14:09 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Ensure the reduced q_depth is above some threshold where it
|
|
|
|
* would be better to map queues in system memory with the
|
|
|
|
* original depth
|
|
|
|
*/
|
|
|
|
if (q_depth < 64)
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
return q_depth;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
|
|
|
|
int qid, int depth)
|
|
|
|
{
|
|
|
|
if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
|
2015-11-28 14:03:49 +00:00
|
|
|
unsigned offset = (qid - 1) * roundup(SQ_SIZE(depth),
|
|
|
|
dev->ctrl.page_size);
|
2015-07-20 16:14:09 +00:00
|
|
|
nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
|
|
|
|
nvmeq->sq_cmds_io = dev->cmb + offset;
|
|
|
|
} else {
|
|
|
|
nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
|
|
|
|
&nvmeq->sq_dma_addr, GFP_KERNEL);
|
|
|
|
if (!nvmeq->sq_cmds)
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-01-20 17:50:14 +00:00
|
|
|
static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
|
2014-12-22 19:59:04 +00:00
|
|
|
int depth)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2014-11-04 15:20:14 +00:00
|
|
|
struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
|
2011-01-20 17:50:14 +00:00
|
|
|
if (!nvmeq)
|
|
|
|
return NULL;
|
|
|
|
|
2015-05-22 09:12:39 +00:00
|
|
|
nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
|
2014-06-15 20:37:33 +00:00
|
|
|
&nvmeq->cq_dma_addr, GFP_KERNEL);
|
2011-01-20 17:50:14 +00:00
|
|
|
if (!nvmeq->cqes)
|
|
|
|
goto free_nvmeq;
|
|
|
|
|
2015-07-20 16:14:09 +00:00
|
|
|
if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
|
2011-01-20 17:50:14 +00:00
|
|
|
goto free_cqdma;
|
|
|
|
|
2015-05-22 09:12:39 +00:00
|
|
|
nvmeq->q_dmadev = dev->dev;
|
2011-02-10 14:56:01 +00:00
|
|
|
nvmeq->dev = dev;
|
2014-01-27 20:57:22 +00:00
|
|
|
snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
|
2015-11-26 09:06:56 +00:00
|
|
|
dev->ctrl.instance, qid);
|
2011-01-20 17:50:14 +00:00
|
|
|
spin_lock_init(&nvmeq->q_lock);
|
|
|
|
nvmeq->cq_head = 0;
|
2011-01-20 18:24:06 +00:00
|
|
|
nvmeq->cq_phase = 1;
|
2013-09-10 03:25:37 +00:00
|
|
|
nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
|
2011-01-20 17:50:14 +00:00
|
|
|
nvmeq->q_depth = depth;
|
2013-12-10 20:10:38 +00:00
|
|
|
nvmeq->qid = qid;
|
2015-06-30 17:22:52 +00:00
|
|
|
nvmeq->cq_vector = -1;
|
2014-11-04 15:20:14 +00:00
|
|
|
dev->queues[qid] = nvmeq;
|
2015-05-27 18:26:23 +00:00
|
|
|
dev->queue_count++;
|
|
|
|
|
2011-01-20 17:50:14 +00:00
|
|
|
return nvmeq;
|
|
|
|
|
|
|
|
free_cqdma:
|
2015-05-22 09:12:39 +00:00
|
|
|
dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
|
2011-01-20 17:50:14 +00:00
|
|
|
nvmeq->cq_dma_addr);
|
|
|
|
free_nvmeq:
|
|
|
|
kfree(nvmeq);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2016-09-14 14:18:57 +00:00
|
|
|
static int queue_request_irq(struct nvme_queue *nvmeq)
|
2011-01-20 14:10:15 +00:00
|
|
|
{
|
2011-02-06 12:28:06 +00:00
|
|
|
if (use_threaded_interrupts)
|
2016-09-14 14:18:57 +00:00
|
|
|
return request_threaded_irq(nvmeq_irq(nvmeq), nvme_irq_check,
|
|
|
|
nvme_irq, IRQF_SHARED, nvmeq->irqname, nvmeq);
|
|
|
|
else
|
|
|
|
return request_irq(nvmeq_irq(nvmeq), nvme_irq, IRQF_SHARED,
|
|
|
|
nvmeq->irqname, nvmeq);
|
2011-01-20 14:10:15 +00:00
|
|
|
}
|
|
|
|
|
2013-07-15 21:02:20 +00:00
|
|
|
static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2013-07-15 21:02:20 +00:00
|
|
|
struct nvme_dev *dev = nvmeq->dev;
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2014-09-10 21:48:47 +00:00
|
|
|
spin_lock_irq(&nvmeq->q_lock);
|
2013-07-15 21:02:20 +00:00
|
|
|
nvmeq->sq_tail = 0;
|
|
|
|
nvmeq->cq_head = 0;
|
|
|
|
nvmeq->cq_phase = 1;
|
2013-09-10 03:25:37 +00:00
|
|
|
nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
|
2013-07-15 21:02:20 +00:00
|
|
|
memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
|
2014-03-24 16:46:25 +00:00
|
|
|
dev->online_queues++;
|
2014-09-10 21:48:47 +00:00
|
|
|
spin_unlock_irq(&nvmeq->q_lock);
|
2013-07-15 21:02:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
|
|
|
|
{
|
|
|
|
struct nvme_dev *dev = nvmeq->dev;
|
|
|
|
int result;
|
2011-02-01 13:39:04 +00:00
|
|
|
|
2014-12-22 19:59:04 +00:00
|
|
|
nvmeq->cq_vector = qid - 1;
|
2011-01-20 17:50:14 +00:00
|
|
|
result = adapter_alloc_cq(dev, qid, nvmeq);
|
|
|
|
if (result < 0)
|
2013-07-15 21:02:20 +00:00
|
|
|
return result;
|
2011-01-20 17:50:14 +00:00
|
|
|
|
|
|
|
result = adapter_alloc_sq(dev, qid, nvmeq);
|
|
|
|
if (result < 0)
|
|
|
|
goto release_cq;
|
|
|
|
|
2016-09-14 14:18:57 +00:00
|
|
|
result = queue_request_irq(nvmeq);
|
2011-01-20 17:50:14 +00:00
|
|
|
if (result < 0)
|
|
|
|
goto release_sq;
|
|
|
|
|
2013-07-15 21:02:20 +00:00
|
|
|
nvme_init_queue(nvmeq, qid);
|
|
|
|
return result;
|
2011-01-20 17:50:14 +00:00
|
|
|
|
|
|
|
release_sq:
|
|
|
|
adapter_delete_sq(dev, qid);
|
|
|
|
release_cq:
|
|
|
|
adapter_delete_cq(dev, qid);
|
2013-07-15 21:02:20 +00:00
|
|
|
return result;
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
2014-11-04 15:20:14 +00:00
|
|
|
static struct blk_mq_ops nvme_mq_admin_ops = {
|
2015-05-22 09:12:46 +00:00
|
|
|
.queue_rq = nvme_queue_rq,
|
2015-11-26 12:03:13 +00:00
|
|
|
.complete = nvme_complete_rq,
|
2014-11-04 15:20:14 +00:00
|
|
|
.init_hctx = nvme_admin_init_hctx,
|
2015-06-08 16:08:13 +00:00
|
|
|
.exit_hctx = nvme_admin_exit_hctx,
|
2014-11-04 15:20:14 +00:00
|
|
|
.init_request = nvme_admin_init_request,
|
|
|
|
.timeout = nvme_timeout,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct blk_mq_ops nvme_mq_ops = {
|
|
|
|
.queue_rq = nvme_queue_rq,
|
2015-11-26 12:03:13 +00:00
|
|
|
.complete = nvme_complete_rq,
|
2014-11-04 15:20:14 +00:00
|
|
|
.init_hctx = nvme_init_hctx,
|
|
|
|
.init_request = nvme_init_request,
|
2016-09-14 14:18:57 +00:00
|
|
|
.map_queues = nvme_pci_map_queues,
|
2014-11-04 15:20:14 +00:00
|
|
|
.timeout = nvme_timeout,
|
2015-11-04 03:37:26 +00:00
|
|
|
.poll = nvme_poll,
|
2014-11-04 15:20:14 +00:00
|
|
|
};
|
|
|
|
|
2015-01-08 01:55:49 +00:00
|
|
|
static void nvme_dev_remove_admin(struct nvme_dev *dev)
|
|
|
|
{
|
2015-11-26 09:06:56 +00:00
|
|
|
if (dev->ctrl.admin_q && !blk_queue_dying(dev->ctrl.admin_q)) {
|
2016-02-24 16:15:56 +00:00
|
|
|
/*
|
|
|
|
* If the controller was reset during removal, it's possible
|
|
|
|
* user requests may be waiting on a stopped queue. Start the
|
|
|
|
* queue to flush these to completion.
|
|
|
|
*/
|
|
|
|
blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true);
|
2015-11-26 09:06:56 +00:00
|
|
|
blk_cleanup_queue(dev->ctrl.admin_q);
|
2015-01-08 01:55:49 +00:00
|
|
|
blk_mq_free_tag_set(&dev->admin_tagset);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-11-04 15:20:14 +00:00
|
|
|
static int nvme_alloc_admin_tags(struct nvme_dev *dev)
|
|
|
|
{
|
2015-11-26 09:06:56 +00:00
|
|
|
if (!dev->ctrl.admin_q) {
|
2014-11-04 15:20:14 +00:00
|
|
|
dev->admin_tagset.ops = &nvme_mq_admin_ops;
|
|
|
|
dev->admin_tagset.nr_hw_queues = 1;
|
2016-01-04 16:10:55 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Subtract one to leave an empty queue entry for 'Full Queue'
|
|
|
|
* condition. See NVM-Express 1.2 specification, section 4.1.2.
|
|
|
|
*/
|
|
|
|
dev->admin_tagset.queue_depth = NVME_AQ_BLKMQ_DEPTH - 1;
|
2014-11-04 15:20:14 +00:00
|
|
|
dev->admin_tagset.timeout = ADMIN_TIMEOUT;
|
2015-05-22 09:12:39 +00:00
|
|
|
dev->admin_tagset.numa_node = dev_to_node(dev->dev);
|
2015-01-22 19:07:58 +00:00
|
|
|
dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
|
2014-11-04 15:20:14 +00:00
|
|
|
dev->admin_tagset.driver_data = dev;
|
|
|
|
|
|
|
|
if (blk_mq_alloc_tag_set(&dev->admin_tagset))
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2015-11-26 09:06:56 +00:00
|
|
|
dev->ctrl.admin_q = blk_mq_init_queue(&dev->admin_tagset);
|
|
|
|
if (IS_ERR(dev->ctrl.admin_q)) {
|
2014-11-04 15:20:14 +00:00
|
|
|
blk_mq_free_tag_set(&dev->admin_tagset);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
2015-11-26 09:06:56 +00:00
|
|
|
if (!blk_get_queue(dev->ctrl.admin_q)) {
|
2015-01-08 01:55:49 +00:00
|
|
|
nvme_dev_remove_admin(dev);
|
2015-11-26 09:06:56 +00:00
|
|
|
dev->ctrl.admin_q = NULL;
|
2015-01-08 01:55:49 +00:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
2015-01-08 01:55:50 +00:00
|
|
|
} else
|
2016-01-04 16:10:57 +00:00
|
|
|
blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true);
|
2014-11-04 15:20:14 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-12-21 23:13:49 +00:00
|
|
|
static int nvme_configure_admin_queue(struct nvme_dev *dev)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2013-05-04 10:43:16 +00:00
|
|
|
int result;
|
2011-01-20 17:50:14 +00:00
|
|
|
u32 aqa;
|
2015-11-20 07:58:10 +00:00
|
|
|
u64 cap = lo_hi_readq(dev->bar + NVME_REG_CAP);
|
2011-01-20 17:50:14 +00:00
|
|
|
struct nvme_queue *nvmeq;
|
|
|
|
|
2016-10-19 15:51:05 +00:00
|
|
|
dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1, 0) ?
|
2015-08-10 21:20:40 +00:00
|
|
|
NVME_CAP_NSSRC(cap) : 0;
|
|
|
|
|
2015-11-20 07:58:10 +00:00
|
|
|
if (dev->subsystem &&
|
|
|
|
(readl(dev->bar + NVME_REG_CSTS) & NVME_CSTS_NSSRO))
|
|
|
|
writel(NVME_CSTS_NSSRO, dev->bar + NVME_REG_CSTS);
|
2015-08-10 21:20:40 +00:00
|
|
|
|
2015-11-28 14:03:49 +00:00
|
|
|
result = nvme_disable_ctrl(&dev->ctrl, cap);
|
2013-05-04 10:43:16 +00:00
|
|
|
if (result < 0)
|
|
|
|
return result;
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2014-11-04 15:20:14 +00:00
|
|
|
nvmeq = dev->queues[0];
|
2013-07-15 21:02:23 +00:00
|
|
|
if (!nvmeq) {
|
2014-12-22 19:59:04 +00:00
|
|
|
nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
|
2013-07-15 21:02:23 +00:00
|
|
|
if (!nvmeq)
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
2011-01-20 17:50:14 +00:00
|
|
|
|
|
|
|
aqa = nvmeq->q_depth - 1;
|
|
|
|
aqa |= aqa << 16;
|
|
|
|
|
2015-11-20 07:58:10 +00:00
|
|
|
writel(aqa, dev->bar + NVME_REG_AQA);
|
|
|
|
lo_hi_writeq(nvmeq->sq_dma_addr, dev->bar + NVME_REG_ASQ);
|
|
|
|
lo_hi_writeq(nvmeq->cq_dma_addr, dev->bar + NVME_REG_ACQ);
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2015-11-28 14:03:49 +00:00
|
|
|
result = nvme_enable_ctrl(&dev->ctrl, cap);
|
2013-05-01 19:07:51 +00:00
|
|
|
if (result)
|
2016-11-15 20:56:26 +00:00
|
|
|
return result;
|
2014-11-04 15:20:14 +00:00
|
|
|
|
2014-12-22 19:59:04 +00:00
|
|
|
nvmeq->cq_vector = 0;
|
2016-09-14 14:18:57 +00:00
|
|
|
result = queue_request_irq(nvmeq);
|
2015-06-30 17:22:52 +00:00
|
|
|
if (result) {
|
|
|
|
nvmeq->cq_vector = -1;
|
2016-11-15 20:56:26 +00:00
|
|
|
return result;
|
2015-06-30 17:22:52 +00:00
|
|
|
}
|
2013-05-01 19:07:51 +00:00
|
|
|
|
2011-01-20 17:50:14 +00:00
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
2016-04-13 14:08:20 +00:00
|
|
|
static bool nvme_should_reset(struct nvme_dev *dev, u32 csts)
|
|
|
|
{
|
|
|
|
|
|
|
|
/* If true, indicates loss of adapter communication, possibly by a
|
|
|
|
* NVMe Subsystem reset.
|
|
|
|
*/
|
|
|
|
bool nssro = dev->subsystem && (csts & NVME_CSTS_NSSRO);
|
|
|
|
|
|
|
|
/* If there is a reset ongoing, we shouldn't reset again. */
|
|
|
|
if (work_busy(&dev->reset_work))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
/* We shouldn't reset unless the controller is on fatal error state
|
|
|
|
* _or_ if we lost the communication with it.
|
|
|
|
*/
|
|
|
|
if (!(csts & NVME_CSTS_CFS) && !nssro)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
/* If PCI error recovery process is happening, we cannot reset or
|
|
|
|
* the recovery mechanism will surely fail.
|
|
|
|
*/
|
|
|
|
if (pci_channel_offline(to_pci_dev(dev->dev)))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-12-03 04:14:15 +00:00
|
|
|
static void nvme_warn_reset(struct nvme_dev *dev, u32 csts)
|
|
|
|
{
|
|
|
|
/* Read a config register to help see what died. */
|
|
|
|
u16 pci_status;
|
|
|
|
int result;
|
|
|
|
|
|
|
|
result = pci_read_config_word(to_pci_dev(dev->dev), PCI_STATUS,
|
|
|
|
&pci_status);
|
|
|
|
if (result == PCIBIOS_SUCCESSFUL)
|
|
|
|
dev_warn(dev->dev,
|
|
|
|
"controller is down; will reset: CSTS=0x%x, PCI_STATUS=0x%hx\n",
|
|
|
|
csts, pci_status);
|
|
|
|
else
|
|
|
|
dev_warn(dev->dev,
|
|
|
|
"controller is down; will reset: CSTS=0x%x, PCI_STATUS read failed (%d)\n",
|
|
|
|
csts, result);
|
|
|
|
}
|
|
|
|
|
2016-02-29 14:59:46 +00:00
|
|
|
static void nvme_watchdog_timer(unsigned long data)
|
2011-03-02 23:37:18 +00:00
|
|
|
{
|
2016-02-29 14:59:46 +00:00
|
|
|
struct nvme_dev *dev = (struct nvme_dev *)data;
|
|
|
|
u32 csts = readl(dev->bar + NVME_REG_CSTS);
|
2011-03-02 23:37:18 +00:00
|
|
|
|
2016-04-13 14:08:20 +00:00
|
|
|
/* Skip controllers under certain specific conditions. */
|
|
|
|
if (nvme_should_reset(dev, csts)) {
|
2016-10-05 20:32:45 +00:00
|
|
|
if (!nvme_reset(dev))
|
2016-12-03 04:14:15 +00:00
|
|
|
nvme_warn_reset(dev, csts);
|
2016-02-29 14:59:46 +00:00
|
|
|
return;
|
2011-03-02 23:37:18 +00:00
|
|
|
}
|
2016-02-29 14:59:46 +00:00
|
|
|
|
|
|
|
mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ));
|
2011-03-02 23:37:18 +00:00
|
|
|
}
|
|
|
|
|
2015-11-26 10:46:39 +00:00
|
|
|
static int nvme_create_io_queues(struct nvme_dev *dev)
|
2014-03-24 16:46:25 +00:00
|
|
|
{
|
2015-12-18 00:08:15 +00:00
|
|
|
unsigned i, max;
|
2015-11-26 10:46:39 +00:00
|
|
|
int ret = 0;
|
2014-03-24 16:46:25 +00:00
|
|
|
|
2015-11-26 10:46:39 +00:00
|
|
|
for (i = dev->queue_count; i <= dev->max_qid; i++) {
|
|
|
|
if (!nvme_alloc_queue(dev, i, dev->q_depth)) {
|
|
|
|
ret = -ENOMEM;
|
2014-03-24 16:46:25 +00:00
|
|
|
break;
|
2015-11-26 10:46:39 +00:00
|
|
|
}
|
|
|
|
}
|
2014-03-24 16:46:25 +00:00
|
|
|
|
2015-12-18 00:08:15 +00:00
|
|
|
max = min(dev->max_qid, dev->queue_count - 1);
|
|
|
|
for (i = dev->online_queues; i <= max; i++) {
|
2015-11-26 10:46:39 +00:00
|
|
|
ret = nvme_create_queue(dev->queues[i], i);
|
2016-11-15 20:56:26 +00:00
|
|
|
if (ret)
|
2014-03-24 16:46:25 +00:00
|
|
|
break;
|
2014-04-11 15:58:45 +00:00
|
|
|
}
|
2015-11-26 10:46:39 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Ignore failing Create SQ/CQ commands, we can continue with less
|
|
|
|
* than the desired aount of queues, and even a controller without
|
|
|
|
* I/O queues an still be used to issue admin commands. This might
|
|
|
|
* be useful to upgrade a buggy firmware for example.
|
|
|
|
*/
|
|
|
|
return ret >= 0 ? 0 : ret;
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
2016-10-06 02:01:12 +00:00
|
|
|
static ssize_t nvme_cmb_show(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev));
|
|
|
|
|
|
|
|
return snprintf(buf, PAGE_SIZE, "cmbloc : x%08x\ncmbsz : x%08x\n",
|
|
|
|
ndev->cmbloc, ndev->cmbsz);
|
|
|
|
}
|
|
|
|
static DEVICE_ATTR(cmb, S_IRUGO, nvme_cmb_show, NULL);
|
|
|
|
|
2015-07-20 16:14:09 +00:00
|
|
|
static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
|
|
|
|
{
|
|
|
|
u64 szu, size, offset;
|
|
|
|
resource_size_t bar_size;
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev->dev);
|
|
|
|
void __iomem *cmb;
|
|
|
|
dma_addr_t dma_addr;
|
|
|
|
|
2015-11-20 07:58:10 +00:00
|
|
|
dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ);
|
2015-07-20 16:14:09 +00:00
|
|
|
if (!(NVME_CMB_SZ(dev->cmbsz)))
|
|
|
|
return NULL;
|
2016-10-06 02:01:12 +00:00
|
|
|
dev->cmbloc = readl(dev->bar + NVME_REG_CMBLOC);
|
2015-07-20 16:14:09 +00:00
|
|
|
|
2016-10-06 02:01:12 +00:00
|
|
|
if (!use_cmb_sqes)
|
|
|
|
return NULL;
|
2015-07-20 16:14:09 +00:00
|
|
|
|
|
|
|
szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
|
|
|
|
size = szu * NVME_CMB_SZ(dev->cmbsz);
|
2016-10-06 02:01:12 +00:00
|
|
|
offset = szu * NVME_CMB_OFST(dev->cmbloc);
|
|
|
|
bar_size = pci_resource_len(pdev, NVME_CMB_BIR(dev->cmbloc));
|
2015-07-20 16:14:09 +00:00
|
|
|
|
|
|
|
if (offset > bar_size)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Controllers may support a CMB size larger than their BAR,
|
|
|
|
* for example, due to being behind a bridge. Reduce the CMB to
|
|
|
|
* the reported size of the BAR
|
|
|
|
*/
|
|
|
|
if (size > bar_size - offset)
|
|
|
|
size = bar_size - offset;
|
|
|
|
|
2016-10-06 02:01:12 +00:00
|
|
|
dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(dev->cmbloc)) + offset;
|
2015-07-20 16:14:09 +00:00
|
|
|
cmb = ioremap_wc(dma_addr, size);
|
|
|
|
if (!cmb)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
dev->cmb_dma_addr = dma_addr;
|
|
|
|
dev->cmb_size = size;
|
|
|
|
return cmb;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void nvme_release_cmb(struct nvme_dev *dev)
|
|
|
|
{
|
|
|
|
if (dev->cmb) {
|
|
|
|
iounmap(dev->cmb);
|
|
|
|
dev->cmb = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-07-15 21:02:24 +00:00
|
|
|
static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
|
|
|
|
{
|
2013-09-10 03:25:37 +00:00
|
|
|
return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
|
2013-07-15 21:02:24 +00:00
|
|
|
}
|
|
|
|
|
2012-12-21 23:13:49 +00:00
|
|
|
static int nvme_setup_io_queues(struct nvme_dev *dev)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2014-11-04 15:20:14 +00:00
|
|
|
struct nvme_queue *adminq = dev->queues[0];
|
2015-05-22 09:12:39 +00:00
|
|
|
struct pci_dev *pdev = to_pci_dev(dev->dev);
|
2016-09-14 14:18:57 +00:00
|
|
|
int result, nr_io_queues, size;
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2016-05-13 18:38:09 +00:00
|
|
|
nr_io_queues = num_online_cpus();
|
2015-11-26 10:09:06 +00:00
|
|
|
result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues);
|
|
|
|
if (result < 0)
|
2011-01-20 18:01:49 +00:00
|
|
|
return result;
|
2015-11-26 10:09:06 +00:00
|
|
|
|
2016-06-06 21:20:50 +00:00
|
|
|
if (nr_io_queues == 0)
|
2016-04-08 22:09:10 +00:00
|
|
|
return 0;
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2015-07-20 16:14:09 +00:00
|
|
|
if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
|
|
|
|
result = nvme_cmb_qdepth(dev, nr_io_queues,
|
|
|
|
sizeof(struct nvme_command));
|
|
|
|
if (result > 0)
|
|
|
|
dev->q_depth = result;
|
|
|
|
else
|
|
|
|
nvme_release_cmb(dev);
|
|
|
|
}
|
|
|
|
|
2013-07-15 21:02:24 +00:00
|
|
|
size = db_bar_size(dev, nr_io_queues);
|
|
|
|
if (size > 8192) {
|
2011-10-20 21:00:41 +00:00
|
|
|
iounmap(dev->bar);
|
2013-07-15 21:02:24 +00:00
|
|
|
do {
|
|
|
|
dev->bar = ioremap(pci_resource_start(pdev, 0), size);
|
|
|
|
if (dev->bar)
|
|
|
|
break;
|
|
|
|
if (!--nr_io_queues)
|
|
|
|
return -ENOMEM;
|
|
|
|
size = db_bar_size(dev, nr_io_queues);
|
|
|
|
} while (1);
|
2015-11-20 07:58:10 +00:00
|
|
|
dev->dbs = dev->bar + 4096;
|
2014-02-21 21:13:44 +00:00
|
|
|
adminq->q_db = dev->dbs;
|
2011-10-20 21:00:41 +00:00
|
|
|
}
|
|
|
|
|
2013-07-15 21:02:24 +00:00
|
|
|
/* Deregister the admin queue's interrupt */
|
2016-09-14 14:18:57 +00:00
|
|
|
free_irq(pci_irq_vector(pdev, 0), adminq);
|
2013-07-15 21:02:24 +00:00
|
|
|
|
2014-11-14 16:49:26 +00:00
|
|
|
/*
|
|
|
|
* If we enable msix early due to not intx, disable it again before
|
|
|
|
* setting up the full range we need.
|
|
|
|
*/
|
2016-09-14 14:18:57 +00:00
|
|
|
pci_free_irq_vectors(pdev);
|
|
|
|
nr_io_queues = pci_alloc_irq_vectors(pdev, 1, nr_io_queues,
|
|
|
|
PCI_IRQ_ALL_TYPES | PCI_IRQ_AFFINITY);
|
|
|
|
if (nr_io_queues <= 0)
|
|
|
|
return -EIO;
|
|
|
|
dev->max_qid = nr_io_queues;
|
2013-05-11 22:19:31 +00:00
|
|
|
|
2013-06-20 14:53:48 +00:00
|
|
|
/*
|
|
|
|
* Should investigate if there's a performance win from allocating
|
|
|
|
* more queues than interrupt vectors; it might allow the submission
|
|
|
|
* path to scale better, even if the receive path is limited by the
|
|
|
|
* number of interrupts.
|
|
|
|
*/
|
|
|
|
|
2016-09-14 14:18:57 +00:00
|
|
|
result = queue_request_irq(adminq);
|
2015-06-30 17:22:52 +00:00
|
|
|
if (result) {
|
|
|
|
adminq->cq_vector = -1;
|
2016-11-15 20:56:26 +00:00
|
|
|
return result;
|
2015-06-30 17:22:52 +00:00
|
|
|
}
|
2015-11-26 10:46:39 +00:00
|
|
|
return nvme_create_io_queues(dev);
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
2016-01-12 21:41:17 +00:00
|
|
|
static void nvme_del_queue_end(struct request *req, int error)
|
2015-06-01 20:28:14 +00:00
|
|
|
{
|
2016-01-12 21:41:17 +00:00
|
|
|
struct nvme_queue *nvmeq = req->end_io_data;
|
2015-12-11 20:14:28 +00:00
|
|
|
|
2016-01-12 21:41:17 +00:00
|
|
|
blk_mq_free_request(req);
|
|
|
|
complete(&nvmeq->dev->ioq_wait);
|
2015-06-01 20:28:14 +00:00
|
|
|
}
|
|
|
|
|
2016-01-12 21:41:17 +00:00
|
|
|
static void nvme_del_cq_end(struct request *req, int error)
|
2015-06-01 20:28:14 +00:00
|
|
|
{
|
2016-01-12 21:41:17 +00:00
|
|
|
struct nvme_queue *nvmeq = req->end_io_data;
|
2015-06-01 20:28:14 +00:00
|
|
|
|
2016-01-12 21:41:17 +00:00
|
|
|
if (!error) {
|
|
|
|
unsigned long flags;
|
|
|
|
|
2016-04-05 17:32:04 +00:00
|
|
|
/*
|
|
|
|
* We might be called with the AQ q_lock held
|
|
|
|
* and the I/O queue q_lock should always
|
|
|
|
* nest inside the AQ one.
|
|
|
|
*/
|
|
|
|
spin_lock_irqsave_nested(&nvmeq->q_lock, flags,
|
|
|
|
SINGLE_DEPTH_NESTING);
|
2016-01-12 21:41:17 +00:00
|
|
|
nvme_process_cq(nvmeq);
|
|
|
|
spin_unlock_irqrestore(&nvmeq->q_lock, flags);
|
2015-06-01 20:28:14 +00:00
|
|
|
}
|
2016-01-12 21:41:17 +00:00
|
|
|
|
|
|
|
nvme_del_queue_end(req, error);
|
2015-06-01 20:28:14 +00:00
|
|
|
}
|
|
|
|
|
2016-01-12 21:41:17 +00:00
|
|
|
static int nvme_delete_queue(struct nvme_queue *nvmeq, u8 opcode)
|
2015-09-03 14:18:17 +00:00
|
|
|
{
|
2016-01-12 21:41:17 +00:00
|
|
|
struct request_queue *q = nvmeq->dev->ctrl.admin_q;
|
|
|
|
struct request *req;
|
|
|
|
struct nvme_command cmd;
|
2015-09-03 14:18:17 +00:00
|
|
|
|
2016-01-12 21:41:17 +00:00
|
|
|
memset(&cmd, 0, sizeof(cmd));
|
|
|
|
cmd.delete_queue.opcode = opcode;
|
|
|
|
cmd.delete_queue.qid = cpu_to_le16(nvmeq->qid);
|
2015-09-03 14:18:17 +00:00
|
|
|
|
2016-06-13 14:45:23 +00:00
|
|
|
req = nvme_alloc_request(q, &cmd, BLK_MQ_REQ_NOWAIT, NVME_QID_ANY);
|
2016-01-12 21:41:17 +00:00
|
|
|
if (IS_ERR(req))
|
|
|
|
return PTR_ERR(req);
|
2015-09-03 14:18:17 +00:00
|
|
|
|
2016-01-12 21:41:17 +00:00
|
|
|
req->timeout = ADMIN_TIMEOUT;
|
|
|
|
req->end_io_data = nvmeq;
|
|
|
|
|
|
|
|
blk_execute_rq_nowait(q, NULL, req, false,
|
|
|
|
opcode == nvme_admin_delete_cq ?
|
|
|
|
nvme_del_cq_end : nvme_del_queue_end);
|
|
|
|
return 0;
|
2015-09-03 14:18:17 +00:00
|
|
|
}
|
|
|
|
|
2016-10-12 15:22:16 +00:00
|
|
|
static void nvme_disable_io_queues(struct nvme_dev *dev, int queues)
|
2015-06-01 20:28:14 +00:00
|
|
|
{
|
2016-10-12 15:22:16 +00:00
|
|
|
int pass;
|
2016-01-12 21:41:17 +00:00
|
|
|
unsigned long timeout;
|
|
|
|
u8 opcode = nvme_admin_delete_sq;
|
2015-06-01 20:28:14 +00:00
|
|
|
|
2016-01-12 21:41:17 +00:00
|
|
|
for (pass = 0; pass < 2; pass++) {
|
2016-05-06 17:50:52 +00:00
|
|
|
int sent = 0, i = queues;
|
2016-01-12 21:41:17 +00:00
|
|
|
|
|
|
|
reinit_completion(&dev->ioq_wait);
|
|
|
|
retry:
|
|
|
|
timeout = ADMIN_TIMEOUT;
|
2016-08-11 15:35:57 +00:00
|
|
|
for (; i > 0; i--, sent++)
|
|
|
|
if (nvme_delete_queue(dev->queues[i], opcode))
|
2016-01-12 21:41:17 +00:00
|
|
|
break;
|
2016-08-11 15:35:57 +00:00
|
|
|
|
2016-01-12 21:41:17 +00:00
|
|
|
while (sent--) {
|
|
|
|
timeout = wait_for_completion_io_timeout(&dev->ioq_wait, timeout);
|
|
|
|
if (timeout == 0)
|
|
|
|
return;
|
|
|
|
if (i)
|
|
|
|
goto retry;
|
|
|
|
}
|
|
|
|
opcode = nvme_admin_delete_cq;
|
|
|
|
}
|
2015-06-01 20:28:14 +00:00
|
|
|
}
|
|
|
|
|
2013-04-16 15:22:36 +00:00
|
|
|
/*
|
|
|
|
* Return: error value if an error occurred setting up the queues or calling
|
|
|
|
* Identify Device. 0 if these succeeded, even if adding some of the
|
|
|
|
* namespaces failed. At the moment, these failures are silent. TBD which
|
|
|
|
* failures should be reported.
|
|
|
|
*/
|
2012-12-21 23:13:49 +00:00
|
|
|
static int nvme_dev_add(struct nvme_dev *dev)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2015-11-28 14:39:07 +00:00
|
|
|
if (!dev->ctrl.tagset) {
|
2015-06-08 16:08:15 +00:00
|
|
|
dev->tagset.ops = &nvme_mq_ops;
|
|
|
|
dev->tagset.nr_hw_queues = dev->online_queues - 1;
|
|
|
|
dev->tagset.timeout = NVME_IO_TIMEOUT;
|
|
|
|
dev->tagset.numa_node = dev_to_node(dev->dev);
|
|
|
|
dev->tagset.queue_depth =
|
2014-11-04 15:20:14 +00:00
|
|
|
min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
|
2015-06-08 16:08:15 +00:00
|
|
|
dev->tagset.cmd_size = nvme_cmd_size(dev);
|
|
|
|
dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
|
|
|
|
dev->tagset.driver_data = dev;
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2015-06-08 16:08:15 +00:00
|
|
|
if (blk_mq_alloc_tag_set(&dev->tagset))
|
|
|
|
return 0;
|
2015-11-28 14:39:07 +00:00
|
|
|
dev->ctrl.tagset = &dev->tagset;
|
2015-12-18 00:08:15 +00:00
|
|
|
} else {
|
|
|
|
blk_mq_update_nr_hw_queues(&dev->tagset, dev->online_queues - 1);
|
|
|
|
|
|
|
|
/* Free previously allocated queues that are no longer usable */
|
|
|
|
nvme_free_queues(dev, dev->online_queues);
|
2015-06-08 16:08:15 +00:00
|
|
|
}
|
2015-12-18 00:08:15 +00:00
|
|
|
|
NVMe: Metadata format support
Adds support for NVMe metadata formats and exposes block devices for
all namespaces regardless of their format. Namespace formats that are
unusable will have disk capacity set to 0, but a handle to the block
device is created to simplify device management. A namespace is not
usable when the format requires host interleave block and metadata in
single buffer, has no provisioned storage, or has better data but failed
to register with blk integrity.
The namespace has to be scanned in two phases to support separate
metadata formats. The first establishes the sector size and capacity
prior to invoking add_disk. If metadata is required, the capacity will
be temporarilly set to 0 until it can be revalidated and registered with
the integrity extenstions after add_disk completes.
The driver relies on the integrity extensions to provide the metadata
buffer. NVMe requires this be a single physically contiguous region,
so only one integrity segment is allowed per command. If the metadata
is used for T10 PI, the driver provides mappings to save and restore
the reftag physical block translation. The driver provides no-op
functions for generate and verify if metadata is not used for protection
information. This way the setup is always provided by the block layer.
If a request does not supply a required metadata buffer, the command
is failed with bad address. This could only happen if a user manually
disables verify/generate on such a disk. The only exception to where
this is okay is if the controller is capable of stripping/generating
the metadata, which is possible on some types of formats.
The metadata scatter gather list now occupies the spot in the nvme_iod
that used to be used to link retryable IOD's, but we don't do that
anymore, so the field was unused.
Signed-off-by: Keith Busch <keith.busch@intel.com>
2015-02-19 20:39:03 +00:00
|
|
|
return 0;
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
2016-02-24 16:15:52 +00:00
|
|
|
static int nvme_pci_enable(struct nvme_dev *dev)
|
2013-07-15 21:02:19 +00:00
|
|
|
{
|
2014-03-24 16:46:25 +00:00
|
|
|
u64 cap;
|
2016-02-24 16:15:52 +00:00
|
|
|
int result = -ENOMEM;
|
2015-05-22 09:12:39 +00:00
|
|
|
struct pci_dev *pdev = to_pci_dev(dev->dev);
|
2013-07-15 21:02:19 +00:00
|
|
|
|
|
|
|
if (pci_enable_device_mem(pdev))
|
|
|
|
return result;
|
|
|
|
|
|
|
|
pci_set_master(pdev);
|
|
|
|
|
2015-05-22 09:12:39 +00:00
|
|
|
if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
|
|
|
|
dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
|
2013-06-26 22:49:11 +00:00
|
|
|
goto disable;
|
2013-07-15 21:02:19 +00:00
|
|
|
|
2015-11-20 07:58:10 +00:00
|
|
|
if (readl(dev->bar + NVME_REG_CSTS) == -1) {
|
2013-12-10 20:10:39 +00:00
|
|
|
result = -ENODEV;
|
2016-02-24 16:15:52 +00:00
|
|
|
goto disable;
|
2013-12-10 20:10:39 +00:00
|
|
|
}
|
2014-11-14 16:49:26 +00:00
|
|
|
|
|
|
|
/*
|
2016-04-08 22:09:10 +00:00
|
|
|
* Some devices and/or platforms don't advertise or work with INTx
|
|
|
|
* interrupts. Pre-enable a single MSIX or MSI vec for setup. We'll
|
|
|
|
* adjust this later.
|
2014-11-14 16:49:26 +00:00
|
|
|
*/
|
2016-09-14 14:18:57 +00:00
|
|
|
result = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
|
|
|
|
if (result < 0)
|
|
|
|
return result;
|
2014-11-14 16:49:26 +00:00
|
|
|
|
2015-11-20 07:58:10 +00:00
|
|
|
cap = lo_hi_readq(dev->bar + NVME_REG_CAP);
|
|
|
|
|
2014-03-24 16:46:25 +00:00
|
|
|
dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
|
|
|
|
dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
|
2015-11-20 07:58:10 +00:00
|
|
|
dev->dbs = dev->bar + 4096;
|
2015-12-01 20:23:22 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Temporary fix for the Apple controller found in the MacBook8,1 and
|
|
|
|
* some MacBook7,1 to avoid controller resets and data loss.
|
|
|
|
*/
|
|
|
|
if (pdev->vendor == PCI_VENDOR_ID_APPLE && pdev->device == 0x2001) {
|
|
|
|
dev->q_depth = 2;
|
|
|
|
dev_warn(dev->dev, "detected Apple NVMe controller, set "
|
|
|
|
"queue depth=%u to work around controller resets\n",
|
|
|
|
dev->q_depth);
|
|
|
|
}
|
|
|
|
|
2016-10-06 02:01:12 +00:00
|
|
|
/*
|
|
|
|
* CMBs can currently only exist on >=1.2 PCIe devices. We only
|
|
|
|
* populate sysfs if a CMB is implemented. Note that we add the
|
|
|
|
* CMB attribute to the nvme_ctrl kobj which removes the need to remove
|
|
|
|
* it on exit. Since nvme_dev_attrs_group has no name we can pass
|
|
|
|
* NULL as final argument to sysfs_add_file_to_group.
|
|
|
|
*/
|
|
|
|
|
2016-10-19 15:51:05 +00:00
|
|
|
if (readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 2, 0)) {
|
2015-07-20 16:14:09 +00:00
|
|
|
dev->cmb = nvme_map_cmb(dev);
|
2013-07-15 21:02:19 +00:00
|
|
|
|
2016-10-06 02:01:12 +00:00
|
|
|
if (dev->cmbsz) {
|
|
|
|
if (sysfs_add_file_to_group(&dev->ctrl.device->kobj,
|
|
|
|
&dev_attr_cmb.attr, NULL))
|
|
|
|
dev_warn(dev->dev,
|
|
|
|
"failed to add sysfs attribute for CMB\n");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-12-07 22:30:31 +00:00
|
|
|
pci_enable_pcie_error_reporting(pdev);
|
|
|
|
pci_save_state(pdev);
|
2013-07-15 21:02:19 +00:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
disable:
|
|
|
|
pci_disable_device(pdev);
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_dev_unmap(struct nvme_dev *dev)
|
2016-02-24 16:15:52 +00:00
|
|
|
{
|
|
|
|
if (dev->bar)
|
|
|
|
iounmap(dev->bar);
|
2016-06-07 07:44:02 +00:00
|
|
|
pci_release_mem_regions(to_pci_dev(dev->dev));
|
2016-02-24 16:15:52 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_pci_disable(struct nvme_dev *dev)
|
2013-07-15 21:02:19 +00:00
|
|
|
{
|
2015-05-22 09:12:39 +00:00
|
|
|
struct pci_dev *pdev = to_pci_dev(dev->dev);
|
|
|
|
|
2016-09-14 14:18:57 +00:00
|
|
|
pci_free_irq_vectors(pdev);
|
2013-07-15 21:02:19 +00:00
|
|
|
|
2015-12-07 22:30:31 +00:00
|
|
|
if (pci_is_enabled(pdev)) {
|
|
|
|
pci_disable_pcie_error_reporting(pdev);
|
2015-05-22 09:12:39 +00:00
|
|
|
pci_disable_device(pdev);
|
2013-12-10 20:10:40 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-01-12 21:41:18 +00:00
|
|
|
static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2016-10-12 15:22:16 +00:00
|
|
|
int i, queues;
|
2014-06-25 17:18:12 +00:00
|
|
|
u32 csts = -1;
|
2013-07-15 21:02:20 +00:00
|
|
|
|
2016-02-29 14:59:46 +00:00
|
|
|
del_timer_sync(&dev->watchdog_timer);
|
2011-03-02 23:37:18 +00:00
|
|
|
|
2015-11-26 11:21:29 +00:00
|
|
|
mutex_lock(&dev->shutdown_lock);
|
2016-02-24 16:15:52 +00:00
|
|
|
if (pci_is_enabled(to_pci_dev(dev->dev))) {
|
2016-01-04 16:10:57 +00:00
|
|
|
nvme_stop_queues(&dev->ctrl);
|
2015-11-20 07:58:10 +00:00
|
|
|
csts = readl(dev->bar + NVME_REG_CSTS);
|
2015-01-08 01:55:52 +00:00
|
|
|
}
|
2016-08-11 15:35:57 +00:00
|
|
|
|
2016-10-12 15:22:16 +00:00
|
|
|
queues = dev->online_queues - 1;
|
2016-08-11 15:35:57 +00:00
|
|
|
for (i = dev->queue_count - 1; i > 0; i--)
|
|
|
|
nvme_suspend_queue(dev->queues[i]);
|
|
|
|
|
2014-06-25 17:18:12 +00:00
|
|
|
if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
|
2016-09-06 20:39:13 +00:00
|
|
|
/* A device might become IO incapable very soon during
|
|
|
|
* probe, before the admin queue is configured. Thus,
|
|
|
|
* queue_count can be 0 here.
|
|
|
|
*/
|
|
|
|
if (dev->queue_count)
|
|
|
|
nvme_suspend_queue(dev->queues[0]);
|
2013-12-10 20:10:40 +00:00
|
|
|
} else {
|
2016-10-12 15:22:16 +00:00
|
|
|
nvme_disable_io_queues(dev, queues);
|
2016-01-12 21:41:18 +00:00
|
|
|
nvme_disable_admin_queue(dev, shutdown);
|
2013-12-10 20:10:40 +00:00
|
|
|
}
|
2016-02-24 16:15:52 +00:00
|
|
|
nvme_pci_disable(dev);
|
2015-02-19 17:34:48 +00:00
|
|
|
|
2016-05-18 21:05:01 +00:00
|
|
|
blk_mq_tagset_busy_iter(&dev->tagset, nvme_cancel_request, &dev->ctrl);
|
|
|
|
blk_mq_tagset_busy_iter(&dev->admin_tagset, nvme_cancel_request, &dev->ctrl);
|
2015-11-26 11:21:29 +00:00
|
|
|
mutex_unlock(&dev->shutdown_lock);
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
2011-02-10 14:56:01 +00:00
|
|
|
static int nvme_setup_prp_pools(struct nvme_dev *dev)
|
|
|
|
{
|
2015-05-22 09:12:39 +00:00
|
|
|
dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
|
2011-02-10 14:56:01 +00:00
|
|
|
PAGE_SIZE, PAGE_SIZE, 0);
|
|
|
|
if (!dev->prp_page_pool)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2011-02-10 15:30:34 +00:00
|
|
|
/* Optimisation for I/Os between 4k and 128k */
|
2015-05-22 09:12:39 +00:00
|
|
|
dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
|
2011-02-10 15:30:34 +00:00
|
|
|
256, 256, 0);
|
|
|
|
if (!dev->prp_small_pool) {
|
|
|
|
dma_pool_destroy(dev->prp_page_pool);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
2011-02-10 14:56:01 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_release_prp_pools(struct nvme_dev *dev)
|
|
|
|
{
|
|
|
|
dma_pool_destroy(dev->prp_page_pool);
|
2011-02-10 15:30:34 +00:00
|
|
|
dma_pool_destroy(dev->prp_small_pool);
|
2011-02-10 14:56:01 +00:00
|
|
|
}
|
|
|
|
|
2015-11-26 09:54:19 +00:00
|
|
|
static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl)
|
2013-02-19 17:17:58 +00:00
|
|
|
{
|
2015-11-26 09:54:19 +00:00
|
|
|
struct nvme_dev *dev = to_nvme_dev(ctrl);
|
2014-01-31 23:53:39 +00:00
|
|
|
|
2015-05-22 09:12:39 +00:00
|
|
|
put_device(dev->dev);
|
2015-06-08 16:08:13 +00:00
|
|
|
if (dev->tagset.tags)
|
|
|
|
blk_mq_free_tag_set(&dev->tagset);
|
2015-11-26 09:06:56 +00:00
|
|
|
if (dev->ctrl.admin_q)
|
|
|
|
blk_put_queue(dev->ctrl.admin_q);
|
2013-02-19 17:17:58 +00:00
|
|
|
kfree(dev->queues);
|
|
|
|
kfree(dev);
|
|
|
|
}
|
|
|
|
|
2016-02-24 16:15:55 +00:00
|
|
|
static void nvme_remove_dead_ctrl(struct nvme_dev *dev, int status)
|
|
|
|
{
|
Merge branch 'for-4.6/drivers' of git://git.kernel.dk/linux-block
Pull block driver updates from Jens Axboe:
"This is the block driver pull request for this merge window. It sits
on top of for-4.6/core, that was just sent out.
This contains:
- A set of fixes for lightnvm. One from Alan, fixing an overflow,
and the rest from the usual suspects, Javier and Matias.
- A set of fixes for nbd from Markus and Dan, and a fixup from Arnd
for correct usage of the signed 64-bit divider.
- A set of bug fixes for the Micron mtip32xx, from Asai.
- A fix for the brd discard handling from Bart.
- Update the maintainers entry for cciss, since that hardware has
transferred ownership.
- Three bug fixes for bcache from Eric Wheeler.
- Set of fixes for xen-blk{back,front} from Jan and Konrad.
- Removal of the cpqarray driver. It has been disabled in Kconfig
since 2013, and we were initially scheduled to remove it in 3.15.
- Various updates and fixes for NVMe, with the most important being:
- Removal of the per-device NVMe thread, replacing that with a
watchdog timer instead. From Christoph.
- Exposing the namespace WWID through sysfs, from Keith.
- Set of cleanups from Ming Lin.
- Logging the controller device name instead of the underlying
PCI device name, from Sagi.
- And a bunch of fixes and optimizations from the usual suspects
in this area"
* 'for-4.6/drivers' of git://git.kernel.dk/linux-block: (49 commits)
NVMe: Expose ns wwid through single sysfs entry
drivers:block: cpqarray clean up
brd: Fix discard request processing
cpqarray: remove it from the kernel
cciss: update MAINTAINERS
NVMe: Remove unused sq_head read in completion path
bcache: fix cache_set_flush() NULL pointer dereference on OOM
bcache: cleaned up error handling around register_cache()
bcache: fix race of writeback thread starting before complete initialization
NVMe: Create discard zero quirk white list
nbd: use correct div_s64 helper
mtip32xx: remove unneeded variable in mtip_cmd_timeout()
lightnvm: generalize rrpc ppa calculations
lightnvm: remove struct nvm_dev->total_blocks
lightnvm: rename ->nr_pages to ->nr_sects
lightnvm: update closed list outside of intr context
xen/blback: Fit the important information of the thread in 17 characters
lightnvm: fold get bb tbl when using dual/quad plane mode
lightnvm: fix up nonsensical configure overrun checking
xen-blkback: advertise indirect segment support earlier
...
2016-03-19 00:13:31 +00:00
|
|
|
dev_warn(dev->ctrl.device, "Removing after probe failure status: %d\n", status);
|
2016-02-24 16:15:55 +00:00
|
|
|
|
|
|
|
kref_get(&dev->ctrl.kref);
|
2016-02-24 16:15:56 +00:00
|
|
|
nvme_dev_disable(dev, false);
|
2016-02-24 16:15:55 +00:00
|
|
|
if (!schedule_work(&dev->remove_work))
|
|
|
|
nvme_put_ctrl(&dev->ctrl);
|
|
|
|
}
|
|
|
|
|
2015-11-26 11:42:26 +00:00
|
|
|
static void nvme_reset_work(struct work_struct *work)
|
2013-02-19 17:17:58 +00:00
|
|
|
{
|
2015-11-26 11:42:26 +00:00
|
|
|
struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
|
2016-02-24 16:15:55 +00:00
|
|
|
int result = -ENODEV;
|
2013-02-19 17:17:58 +00:00
|
|
|
|
2016-04-26 11:51:57 +00:00
|
|
|
if (WARN_ON(dev->ctrl.state == NVME_CTRL_RESETTING))
|
2015-11-26 11:42:26 +00:00
|
|
|
goto out;
|
2013-02-19 17:17:58 +00:00
|
|
|
|
2015-11-26 11:42:26 +00:00
|
|
|
/*
|
|
|
|
* If we're called to reset a live controller first shut it down before
|
|
|
|
* moving on.
|
|
|
|
*/
|
2016-02-24 16:15:52 +00:00
|
|
|
if (dev->ctrl.ctrl_config & NVME_CC_ENABLE)
|
2016-01-12 21:41:18 +00:00
|
|
|
nvme_dev_disable(dev, false);
|
2013-02-19 17:17:58 +00:00
|
|
|
|
2016-04-26 11:51:57 +00:00
|
|
|
if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_RESETTING))
|
2016-04-08 22:11:02 +00:00
|
|
|
goto out;
|
|
|
|
|
2016-02-24 16:15:52 +00:00
|
|
|
result = nvme_pci_enable(dev);
|
2013-07-15 21:02:21 +00:00
|
|
|
if (result)
|
2015-10-03 07:49:23 +00:00
|
|
|
goto out;
|
2013-07-15 21:02:21 +00:00
|
|
|
|
|
|
|
result = nvme_configure_admin_queue(dev);
|
|
|
|
if (result)
|
2016-02-24 16:15:55 +00:00
|
|
|
goto out;
|
2013-07-15 21:02:21 +00:00
|
|
|
|
2014-11-04 15:20:14 +00:00
|
|
|
nvme_init_queue(dev->queues[0], 0);
|
2015-01-08 01:55:50 +00:00
|
|
|
result = nvme_alloc_admin_tags(dev);
|
|
|
|
if (result)
|
2016-02-24 16:15:55 +00:00
|
|
|
goto out;
|
2014-04-07 23:10:11 +00:00
|
|
|
|
2015-10-16 05:58:46 +00:00
|
|
|
result = nvme_init_identify(&dev->ctrl);
|
|
|
|
if (result)
|
2016-02-24 16:15:55 +00:00
|
|
|
goto out;
|
2015-10-16 05:58:46 +00:00
|
|
|
|
2013-07-15 21:02:21 +00:00
|
|
|
result = nvme_setup_io_queues(dev);
|
2014-06-23 20:25:35 +00:00
|
|
|
if (result)
|
2016-02-24 16:15:55 +00:00
|
|
|
goto out;
|
2013-07-15 21:02:21 +00:00
|
|
|
|
2016-04-12 17:13:11 +00:00
|
|
|
/*
|
|
|
|
* A controller that can not execute IO typically requires user
|
|
|
|
* intervention to correct. For such degraded controllers, the driver
|
|
|
|
* should not submit commands the user did not request, so skip
|
|
|
|
* registering for asynchronous event notification on this condition.
|
|
|
|
*/
|
2016-04-26 11:52:00 +00:00
|
|
|
if (dev->online_queues > 1)
|
|
|
|
nvme_queue_async_events(&dev->ctrl);
|
2015-10-03 07:49:23 +00:00
|
|
|
|
2016-02-29 14:59:46 +00:00
|
|
|
mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ));
|
2015-10-03 07:49:23 +00:00
|
|
|
|
2015-10-02 16:51:31 +00:00
|
|
|
/*
|
|
|
|
* Keep the controller around but remove all namespaces if we don't have
|
|
|
|
* any working I/O queue.
|
|
|
|
*/
|
2015-10-03 07:49:23 +00:00
|
|
|
if (dev->online_queues < 2) {
|
2016-02-10 15:51:15 +00:00
|
|
|
dev_warn(dev->ctrl.device, "IO queues not created\n");
|
2016-04-27 21:51:18 +00:00
|
|
|
nvme_kill_queues(&dev->ctrl);
|
2015-11-28 14:39:07 +00:00
|
|
|
nvme_remove_namespaces(&dev->ctrl);
|
2015-10-03 07:49:23 +00:00
|
|
|
} else {
|
2016-01-04 16:10:57 +00:00
|
|
|
nvme_start_queues(&dev->ctrl);
|
2015-10-03 07:49:23 +00:00
|
|
|
nvme_dev_add(dev);
|
|
|
|
}
|
|
|
|
|
2016-04-26 11:51:57 +00:00
|
|
|
if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_LIVE)) {
|
|
|
|
dev_warn(dev->ctrl.device, "failed to mark controller live\n");
|
|
|
|
goto out;
|
|
|
|
}
|
2016-04-26 11:51:58 +00:00
|
|
|
|
|
|
|
if (dev->online_queues > 1)
|
2016-04-26 11:51:59 +00:00
|
|
|
nvme_queue_scan(&dev->ctrl);
|
2015-10-03 07:49:23 +00:00
|
|
|
return;
|
2013-07-15 21:02:21 +00:00
|
|
|
|
2015-10-03 07:49:23 +00:00
|
|
|
out:
|
2016-02-24 16:15:55 +00:00
|
|
|
nvme_remove_dead_ctrl(dev, result);
|
2013-07-15 21:02:21 +00:00
|
|
|
}
|
|
|
|
|
2015-11-26 11:35:49 +00:00
|
|
|
static void nvme_remove_dead_ctrl_work(struct work_struct *work)
|
2013-12-10 20:10:36 +00:00
|
|
|
{
|
2015-11-26 11:35:49 +00:00
|
|
|
struct nvme_dev *dev = container_of(work, struct nvme_dev, remove_work);
|
2015-05-22 09:12:39 +00:00
|
|
|
struct pci_dev *pdev = to_pci_dev(dev->dev);
|
2013-12-10 20:10:36 +00:00
|
|
|
|
2016-02-24 16:15:56 +00:00
|
|
|
nvme_kill_queues(&dev->ctrl);
|
2013-12-10 20:10:36 +00:00
|
|
|
if (pci_get_drvdata(pdev))
|
2016-03-28 22:03:21 +00:00
|
|
|
device_release_driver(&pdev->dev);
|
2015-11-26 09:54:19 +00:00
|
|
|
nvme_put_ctrl(&dev->ctrl);
|
2013-12-10 20:10:36 +00:00
|
|
|
}
|
|
|
|
|
2015-06-05 16:30:08 +00:00
|
|
|
static int nvme_reset(struct nvme_dev *dev)
|
2013-12-10 20:10:36 +00:00
|
|
|
{
|
2015-11-26 09:06:56 +00:00
|
|
|
if (!dev->ctrl.admin_q || blk_queue_dying(dev->ctrl.admin_q))
|
2015-06-05 16:30:08 +00:00
|
|
|
return -ENODEV;
|
2016-10-05 20:32:45 +00:00
|
|
|
if (work_busy(&dev->reset_work))
|
|
|
|
return -ENODEV;
|
2015-11-26 11:10:29 +00:00
|
|
|
if (!queue_work(nvme_workq, &dev->reset_work))
|
|
|
|
return -EBUSY;
|
|
|
|
return 0;
|
2013-12-10 20:10:36 +00:00
|
|
|
}
|
|
|
|
|
2015-11-26 09:06:56 +00:00
|
|
|
static int nvme_pci_reg_read32(struct nvme_ctrl *ctrl, u32 off, u32 *val)
|
2014-03-07 15:24:49 +00:00
|
|
|
{
|
2015-11-26 09:06:56 +00:00
|
|
|
*val = readl(to_nvme_dev(ctrl)->bar + off);
|
2015-10-02 16:49:23 +00:00
|
|
|
return 0;
|
2014-03-07 15:24:49 +00:00
|
|
|
}
|
|
|
|
|
2015-11-28 14:03:49 +00:00
|
|
|
static int nvme_pci_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val)
|
2015-06-05 16:30:08 +00:00
|
|
|
{
|
2015-11-28 14:03:49 +00:00
|
|
|
writel(val, to_nvme_dev(ctrl)->bar + off);
|
|
|
|
return 0;
|
|
|
|
}
|
2015-06-05 16:30:08 +00:00
|
|
|
|
2015-11-28 14:37:52 +00:00
|
|
|
static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val)
|
|
|
|
{
|
|
|
|
*val = readq(to_nvme_dev(ctrl)->bar + off);
|
|
|
|
return 0;
|
2015-06-05 16:30:08 +00:00
|
|
|
}
|
|
|
|
|
2015-11-28 14:40:19 +00:00
|
|
|
static int nvme_pci_reset_ctrl(struct nvme_ctrl *ctrl)
|
|
|
|
{
|
2016-10-05 20:32:45 +00:00
|
|
|
struct nvme_dev *dev = to_nvme_dev(ctrl);
|
|
|
|
int ret = nvme_reset(dev);
|
|
|
|
|
|
|
|
if (!ret)
|
|
|
|
flush_work(&dev->reset_work);
|
|
|
|
return ret;
|
2015-06-05 16:30:08 +00:00
|
|
|
}
|
2015-11-28 14:40:19 +00:00
|
|
|
|
2015-11-26 09:06:56 +00:00
|
|
|
static const struct nvme_ctrl_ops nvme_pci_ctrl_ops = {
|
2016-06-13 14:45:24 +00:00
|
|
|
.name = "pcie",
|
2016-02-10 18:03:29 +00:00
|
|
|
.module = THIS_MODULE,
|
2015-11-26 09:06:56 +00:00
|
|
|
.reg_read32 = nvme_pci_reg_read32,
|
2015-11-28 14:03:49 +00:00
|
|
|
.reg_write32 = nvme_pci_reg_write32,
|
2015-11-28 14:37:52 +00:00
|
|
|
.reg_read64 = nvme_pci_reg_read64,
|
2015-11-28 14:40:19 +00:00
|
|
|
.reset_ctrl = nvme_pci_reset_ctrl,
|
2015-11-26 09:54:19 +00:00
|
|
|
.free_ctrl = nvme_pci_free_ctrl,
|
2016-04-26 11:52:00 +00:00
|
|
|
.submit_async_event = nvme_pci_submit_async_event,
|
2015-11-26 09:06:56 +00:00
|
|
|
};
|
2015-06-05 16:30:08 +00:00
|
|
|
|
2016-02-24 16:15:52 +00:00
|
|
|
static int nvme_dev_map(struct nvme_dev *dev)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev->dev);
|
|
|
|
|
2016-06-07 07:44:02 +00:00
|
|
|
if (pci_request_mem_regions(pdev, "nvme"))
|
2016-02-24 16:15:52 +00:00
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
|
|
|
|
if (!dev->bar)
|
|
|
|
goto release;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
release:
|
2016-06-07 07:44:02 +00:00
|
|
|
pci_release_mem_regions(pdev);
|
2016-02-24 16:15:52 +00:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2012-12-21 23:13:49 +00:00
|
|
|
static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
2014-11-04 15:20:14 +00:00
|
|
|
int node, result = -ENOMEM;
|
2011-01-20 17:50:14 +00:00
|
|
|
struct nvme_dev *dev;
|
|
|
|
|
2014-11-04 15:20:14 +00:00
|
|
|
node = dev_to_node(&pdev->dev);
|
|
|
|
if (node == NUMA_NO_NODE)
|
2016-06-20 00:33:17 +00:00
|
|
|
set_dev_node(&pdev->dev, first_memory_node);
|
2014-11-04 15:20:14 +00:00
|
|
|
|
|
|
|
dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
|
2011-01-20 17:50:14 +00:00
|
|
|
if (!dev)
|
|
|
|
return -ENOMEM;
|
2014-11-04 15:20:14 +00:00
|
|
|
dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
|
|
|
|
GFP_KERNEL, node);
|
2011-01-20 17:50:14 +00:00
|
|
|
if (!dev->queues)
|
|
|
|
goto free;
|
|
|
|
|
2015-05-22 09:12:39 +00:00
|
|
|
dev->dev = get_device(&pdev->dev);
|
2013-12-10 20:10:36 +00:00
|
|
|
pci_set_drvdata(pdev, dev);
|
2015-11-26 09:06:56 +00:00
|
|
|
|
2016-02-24 16:15:52 +00:00
|
|
|
result = nvme_dev_map(dev);
|
|
|
|
if (result)
|
|
|
|
goto free;
|
|
|
|
|
2015-11-28 14:40:19 +00:00
|
|
|
INIT_WORK(&dev->reset_work, nvme_reset_work);
|
2015-11-26 11:35:49 +00:00
|
|
|
INIT_WORK(&dev->remove_work, nvme_remove_dead_ctrl_work);
|
2016-02-29 14:59:46 +00:00
|
|
|
setup_timer(&dev->watchdog_timer, nvme_watchdog_timer,
|
|
|
|
(unsigned long)dev);
|
2015-11-26 11:21:29 +00:00
|
|
|
mutex_init(&dev->shutdown_lock);
|
2016-01-12 21:41:17 +00:00
|
|
|
init_completion(&dev->ioq_wait);
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2011-02-10 14:56:01 +00:00
|
|
|
result = nvme_setup_prp_pools(dev);
|
|
|
|
if (result)
|
2014-08-20 01:15:59 +00:00
|
|
|
goto put_pci;
|
2015-06-05 16:30:08 +00:00
|
|
|
|
2015-11-28 14:40:19 +00:00
|
|
|
result = nvme_init_ctrl(&dev->ctrl, &pdev->dev, &nvme_pci_ctrl_ops,
|
|
|
|
id->driver_data);
|
2015-06-05 16:30:08 +00:00
|
|
|
if (result)
|
2015-02-12 22:33:00 +00:00
|
|
|
goto release_pools;
|
2011-02-15 21:28:20 +00:00
|
|
|
|
2016-02-10 15:51:15 +00:00
|
|
|
dev_info(dev->ctrl.device, "pci function %s\n", dev_name(&pdev->dev));
|
|
|
|
|
2015-10-23 17:42:02 +00:00
|
|
|
queue_work(nvme_workq, &dev->reset_work);
|
2011-01-20 17:50:14 +00:00
|
|
|
return 0;
|
|
|
|
|
2013-07-15 21:02:19 +00:00
|
|
|
release_pools:
|
2011-02-10 14:56:01 +00:00
|
|
|
nvme_release_prp_pools(dev);
|
2014-08-20 01:15:59 +00:00
|
|
|
put_pci:
|
2015-05-22 09:12:39 +00:00
|
|
|
put_device(dev->dev);
|
2016-02-24 16:15:52 +00:00
|
|
|
nvme_dev_unmap(dev);
|
2011-01-20 17:50:14 +00:00
|
|
|
free:
|
|
|
|
kfree(dev->queues);
|
|
|
|
kfree(dev);
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
2014-05-02 16:40:43 +00:00
|
|
|
static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
|
|
|
|
{
|
2014-06-23 22:03:21 +00:00
|
|
|
struct nvme_dev *dev = pci_get_drvdata(pdev);
|
2014-05-02 16:40:43 +00:00
|
|
|
|
2014-06-23 22:03:21 +00:00
|
|
|
if (prepare)
|
2016-01-12 21:41:18 +00:00
|
|
|
nvme_dev_disable(dev, false);
|
2014-06-23 22:03:21 +00:00
|
|
|
else
|
2016-10-05 20:32:45 +00:00
|
|
|
nvme_reset(dev);
|
2014-05-02 16:40:43 +00:00
|
|
|
}
|
|
|
|
|
2014-01-27 16:29:40 +00:00
|
|
|
static void nvme_shutdown(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
struct nvme_dev *dev = pci_get_drvdata(pdev);
|
2016-01-12 21:41:18 +00:00
|
|
|
nvme_dev_disable(dev, true);
|
2014-01-27 16:29:40 +00:00
|
|
|
}
|
|
|
|
|
2016-02-24 16:15:55 +00:00
|
|
|
/*
|
|
|
|
* The driver's remove may be called on a device in a partially initialized
|
|
|
|
* state. This function must not have any dependencies on the device state in
|
|
|
|
* order to proceed.
|
|
|
|
*/
|
2012-12-21 23:13:49 +00:00
|
|
|
static void nvme_remove(struct pci_dev *pdev)
|
2011-01-20 17:50:14 +00:00
|
|
|
{
|
|
|
|
struct nvme_dev *dev = pci_get_drvdata(pdev);
|
2013-12-10 20:10:36 +00:00
|
|
|
|
2016-04-26 11:51:57 +00:00
|
|
|
nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING);
|
|
|
|
|
2013-12-10 20:10:36 +00:00
|
|
|
pci_set_drvdata(pdev, NULL);
|
2016-05-12 14:37:14 +00:00
|
|
|
|
|
|
|
if (!pci_device_is_present(pdev))
|
|
|
|
nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DEAD);
|
|
|
|
|
2016-04-08 22:11:02 +00:00
|
|
|
flush_work(&dev->reset_work);
|
2015-11-28 14:41:02 +00:00
|
|
|
nvme_uninit_ctrl(&dev->ctrl);
|
2016-01-12 21:41:18 +00:00
|
|
|
nvme_dev_disable(dev, true);
|
2014-11-04 15:20:14 +00:00
|
|
|
nvme_dev_remove_admin(dev);
|
2013-12-16 18:50:00 +00:00
|
|
|
nvme_free_queues(dev, 0);
|
2015-07-20 16:14:09 +00:00
|
|
|
nvme_release_cmb(dev);
|
2013-12-10 20:10:36 +00:00
|
|
|
nvme_release_prp_pools(dev);
|
2016-02-24 16:15:52 +00:00
|
|
|
nvme_dev_unmap(dev);
|
2015-11-26 09:54:19 +00:00
|
|
|
nvme_put_ctrl(&dev->ctrl);
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
2016-06-20 15:41:06 +00:00
|
|
|
static int nvme_pci_sriov_configure(struct pci_dev *pdev, int numvfs)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (numvfs == 0) {
|
|
|
|
if (pci_vfs_assigned(pdev)) {
|
|
|
|
dev_warn(&pdev->dev,
|
|
|
|
"Cannot disable SR-IOV VFs while assigned\n");
|
|
|
|
return -EPERM;
|
|
|
|
}
|
|
|
|
pci_disable_sriov(pdev);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = pci_enable_sriov(pdev, numvfs);
|
|
|
|
return ret ? ret : numvfs;
|
|
|
|
}
|
|
|
|
|
2014-02-13 02:19:14 +00:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
2013-07-15 21:02:23 +00:00
|
|
|
static int nvme_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
struct nvme_dev *ndev = pci_get_drvdata(pdev);
|
|
|
|
|
2016-01-12 21:41:18 +00:00
|
|
|
nvme_dev_disable(ndev, true);
|
2013-07-15 21:02:23 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nvme_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
|
|
struct nvme_dev *ndev = pci_get_drvdata(pdev);
|
|
|
|
|
2016-10-05 20:32:45 +00:00
|
|
|
nvme_reset(ndev);
|
2013-12-10 20:10:36 +00:00
|
|
|
return 0;
|
2013-07-15 21:02:23 +00:00
|
|
|
}
|
2014-02-13 02:19:14 +00:00
|
|
|
#endif
|
2013-07-15 21:02:23 +00:00
|
|
|
|
|
|
|
static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
|
2011-01-20 17:50:14 +00:00
|
|
|
|
2015-12-07 22:30:31 +00:00
|
|
|
static pci_ers_result_t nvme_error_detected(struct pci_dev *pdev,
|
|
|
|
pci_channel_state_t state)
|
|
|
|
{
|
|
|
|
struct nvme_dev *dev = pci_get_drvdata(pdev);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* A frozen channel requires a reset. When detected, this method will
|
|
|
|
* shutdown the controller to quiesce. The controller will be restarted
|
|
|
|
* after the slot reset through driver's slot_reset callback.
|
|
|
|
*/
|
|
|
|
switch (state) {
|
|
|
|
case pci_channel_io_normal:
|
|
|
|
return PCI_ERS_RESULT_CAN_RECOVER;
|
|
|
|
case pci_channel_io_frozen:
|
2016-04-04 21:07:41 +00:00
|
|
|
dev_warn(dev->ctrl.device,
|
|
|
|
"frozen state error detected, reset controller\n");
|
2016-01-12 21:41:18 +00:00
|
|
|
nvme_dev_disable(dev, false);
|
2015-12-07 22:30:31 +00:00
|
|
|
return PCI_ERS_RESULT_NEED_RESET;
|
|
|
|
case pci_channel_io_perm_failure:
|
2016-04-04 21:07:41 +00:00
|
|
|
dev_warn(dev->ctrl.device,
|
|
|
|
"failure state error detected, request disconnect\n");
|
2015-12-07 22:30:31 +00:00
|
|
|
return PCI_ERS_RESULT_DISCONNECT;
|
|
|
|
}
|
|
|
|
return PCI_ERS_RESULT_NEED_RESET;
|
|
|
|
}
|
|
|
|
|
|
|
|
static pci_ers_result_t nvme_slot_reset(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
struct nvme_dev *dev = pci_get_drvdata(pdev);
|
|
|
|
|
2016-02-10 15:51:15 +00:00
|
|
|
dev_info(dev->ctrl.device, "restart after slot reset\n");
|
2015-12-07 22:30:31 +00:00
|
|
|
pci_restore_state(pdev);
|
2016-10-05 20:32:45 +00:00
|
|
|
nvme_reset(dev);
|
2015-12-07 22:30:31 +00:00
|
|
|
return PCI_ERS_RESULT_RECOVERED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void nvme_error_resume(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
pci_cleanup_aer_uncorrect_error_status(pdev);
|
|
|
|
}
|
|
|
|
|
2012-09-07 16:33:17 +00:00
|
|
|
static const struct pci_error_handlers nvme_err_handler = {
|
2011-01-20 17:50:14 +00:00
|
|
|
.error_detected = nvme_error_detected,
|
|
|
|
.slot_reset = nvme_slot_reset,
|
|
|
|
.resume = nvme_error_resume,
|
2014-05-02 16:40:43 +00:00
|
|
|
.reset_notify = nvme_reset_notify,
|
2011-01-20 17:50:14 +00:00
|
|
|
};
|
|
|
|
|
2014-03-24 14:11:22 +00:00
|
|
|
static const struct pci_device_id nvme_id_table[] = {
|
2015-11-26 09:07:41 +00:00
|
|
|
{ PCI_VDEVICE(INTEL, 0x0953),
|
2016-03-04 20:15:17 +00:00
|
|
|
.driver_data = NVME_QUIRK_STRIPE_SIZE |
|
|
|
|
NVME_QUIRK_DISCARD_ZEROES, },
|
2016-05-02 21:14:24 +00:00
|
|
|
{ PCI_VDEVICE(INTEL, 0x0a53),
|
|
|
|
.driver_data = NVME_QUIRK_STRIPE_SIZE |
|
|
|
|
NVME_QUIRK_DISCARD_ZEROES, },
|
|
|
|
{ PCI_VDEVICE(INTEL, 0x0a54),
|
|
|
|
.driver_data = NVME_QUIRK_STRIPE_SIZE |
|
|
|
|
NVME_QUIRK_DISCARD_ZEROES, },
|
2015-10-22 21:45:06 +00:00
|
|
|
{ PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */
|
|
|
|
.driver_data = NVME_QUIRK_IDENTIFY_CNS, },
|
2016-06-14 21:22:41 +00:00
|
|
|
{ PCI_DEVICE(0x1c58, 0x0003), /* HGST adapter */
|
|
|
|
.driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
|
2016-09-08 16:12:11 +00:00
|
|
|
{ PCI_DEVICE(0x1c5f, 0x0540), /* Memblaze Pblaze4 adapter */
|
|
|
|
.driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
|
2011-01-20 17:50:14 +00:00
|
|
|
{ PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
|
2015-11-03 23:49:45 +00:00
|
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) },
|
2011-01-20 17:50:14 +00:00
|
|
|
{ 0, }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, nvme_id_table);
|
|
|
|
|
|
|
|
static struct pci_driver nvme_driver = {
|
|
|
|
.name = "nvme",
|
|
|
|
.id_table = nvme_id_table,
|
|
|
|
.probe = nvme_probe,
|
2012-12-21 23:13:49 +00:00
|
|
|
.remove = nvme_remove,
|
2014-01-27 16:29:40 +00:00
|
|
|
.shutdown = nvme_shutdown,
|
2013-07-15 21:02:23 +00:00
|
|
|
.driver = {
|
|
|
|
.pm = &nvme_dev_pm_ops,
|
|
|
|
},
|
2016-06-20 15:41:06 +00:00
|
|
|
.sriov_configure = nvme_pci_sriov_configure,
|
2011-01-20 17:50:14 +00:00
|
|
|
.err_handler = &nvme_err_handler,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init nvme_init(void)
|
|
|
|
{
|
2012-07-31 17:31:15 +00:00
|
|
|
int result;
|
2011-03-02 23:37:18 +00:00
|
|
|
|
2015-10-23 17:42:02 +00:00
|
|
|
nvme_workq = alloc_workqueue("nvme", WQ_UNBOUND | WQ_MEM_RECLAIM, 0);
|
2013-12-10 20:10:36 +00:00
|
|
|
if (!nvme_workq)
|
2014-04-07 23:10:11 +00:00
|
|
|
return -ENOMEM;
|
2013-12-10 20:10:36 +00:00
|
|
|
|
2014-06-11 17:51:35 +00:00
|
|
|
result = pci_register_driver(&nvme_driver);
|
|
|
|
if (result)
|
2016-02-10 18:03:32 +00:00
|
|
|
destroy_workqueue(nvme_workq);
|
2011-01-20 17:50:14 +00:00
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit nvme_exit(void)
|
|
|
|
{
|
|
|
|
pci_unregister_driver(&nvme_driver);
|
2013-12-10 20:10:36 +00:00
|
|
|
destroy_workqueue(nvme_workq);
|
2014-05-10 02:42:26 +00:00
|
|
|
_nvme_check_size();
|
2011-01-20 17:50:14 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
|
|
|
|
MODULE_LICENSE("GPL");
|
2014-11-21 22:16:32 +00:00
|
|
|
MODULE_VERSION("1.0");
|
2011-01-20 17:50:14 +00:00
|
|
|
module_init(nvme_init);
|
|
|
|
module_exit(nvme_exit);
|