2005-04-16 22:20:36 +00:00
|
|
|
/*
|
|
|
|
* include/asm-sh/cpu-sh4/freq.h
|
|
|
|
*
|
|
|
|
* Copyright (C) 2002, 2003 Paul Mundt
|
|
|
|
*
|
|
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
|
|
* License. See the file "COPYING" in the main directory of this archive
|
|
|
|
* for more details.
|
|
|
|
*/
|
|
|
|
#ifndef __ASM_CPU_SH4_FREQ_H
|
|
|
|
#define __ASM_CPU_SH4_FREQ_H
|
|
|
|
|
2008-04-09 08:56:18 +00:00
|
|
|
#if defined(CONFIG_CPU_SUBTYPE_SH7722) || \
|
|
|
|
defined(CONFIG_CPU_SUBTYPE_SH7723) || \
|
2008-07-07 12:11:51 +00:00
|
|
|
defined(CONFIG_CPU_SUBTYPE_SH7343) || \
|
2008-04-09 08:56:18 +00:00
|
|
|
defined(CONFIG_CPU_SUBTYPE_SH7366)
|
2005-04-16 22:20:36 +00:00
|
|
|
#define FRQCR 0xa4150000
|
2007-04-24 04:39:09 +00:00
|
|
|
#define VCLKCR 0xa4150004
|
|
|
|
#define SCLKACR 0xa4150008
|
|
|
|
#define SCLKBCR 0xa415000c
|
|
|
|
#define IrDACLKCR 0xa4150010
|
2008-07-17 09:56:15 +00:00
|
|
|
#define MSTPCR0 0xa4150030
|
|
|
|
#define MSTPCR1 0xa4150034
|
|
|
|
#define MSTPCR2 0xa4150038
|
2009-08-21 07:30:28 +00:00
|
|
|
#elif defined(CONFIG_CPU_SUBTYPE_SH7757)
|
|
|
|
#define FRQCR 0xffc80000
|
|
|
|
#define OSCCR 0xffc80018
|
|
|
|
#define PLLCR 0xffc80024
|
2008-01-07 05:40:07 +00:00
|
|
|
#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
|
|
|
|
defined(CONFIG_CPU_SUBTYPE_SH7780)
|
2006-01-17 06:14:17 +00:00
|
|
|
#define FRQCR 0xffc80000
|
2009-04-16 05:40:56 +00:00
|
|
|
#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
|
|
|
|
#define FRQCRA 0xa4150000
|
|
|
|
#define FRQCRB 0xa4150004
|
|
|
|
#define VCLKCR 0xa4150048
|
|
|
|
|
|
|
|
#define FCLKACR 0xa4150008
|
|
|
|
#define FCLKBCR 0xa415000c
|
|
|
|
#define FRQCR FRQCRA
|
|
|
|
#define SCLKACR FCLKACR
|
|
|
|
#define SCLKBCR FCLKBCR
|
|
|
|
#define FCLKACR 0xa4150008
|
|
|
|
#define FCLKBCR 0xa415000c
|
|
|
|
#define IrDACLKCR 0xa4150018
|
|
|
|
|
|
|
|
#define MSTPCR0 0xa4150030
|
|
|
|
#define MSTPCR1 0xa4150034
|
|
|
|
#define MSTPCR2 0xa4150038
|
|
|
|
|
2012-04-12 06:45:32 +00:00
|
|
|
#elif defined(CONFIG_CPU_SUBTYPE_SH7734)
|
|
|
|
#define FRQCR0 0xffc80000
|
|
|
|
#define FRQCR2 0xffc80008
|
|
|
|
#define FRQMR1 0xffc80014
|
|
|
|
#define FRQMR2 0xffc80018
|
2007-03-12 05:38:59 +00:00
|
|
|
#elif defined(CONFIG_CPU_SUBTYPE_SH7785)
|
|
|
|
#define FRQCR0 0xffc80000
|
|
|
|
#define FRQCR1 0xffc80004
|
|
|
|
#define FRQMR1 0xffc80014
|
2009-03-03 06:40:25 +00:00
|
|
|
#elif defined(CONFIG_CPU_SUBTYPE_SH7786)
|
|
|
|
#define FRQCR0 0xffc40000
|
|
|
|
#define FRQCR1 0xffc40004
|
|
|
|
#define FRQMR1 0xffc40014
|
2007-06-20 09:27:10 +00:00
|
|
|
#elif defined(CONFIG_CPU_SUBTYPE_SHX3)
|
2010-10-01 14:49:56 +00:00
|
|
|
#define FRQCR0 0xffc00000
|
|
|
|
#define FRQCR1 0xffc00004
|
|
|
|
#define FRQMR1 0xffc00014
|
2005-04-16 22:20:36 +00:00
|
|
|
#else
|
|
|
|
#define FRQCR 0xffc00000
|
2007-05-31 04:46:21 +00:00
|
|
|
#define FRQCR_PSTBY 0x0200
|
|
|
|
#define FRQCR_PLLEN 0x0400
|
|
|
|
#define FRQCR_CKOEN 0x0800
|
2005-04-16 22:20:36 +00:00
|
|
|
#endif
|
|
|
|
#define MIN_DIVISOR_NR 0
|
|
|
|
#define MAX_DIVISOR_NR 3
|
|
|
|
|
|
|
|
#endif /* __ASM_CPU_SH4_FREQ_H */
|
|
|
|
|