2019-06-04 08:11:33 +00:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2013-06-05 21:11:49 +00:00
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/*
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* Copyright (C) 2013 Advanced Micro Devices, Inc.
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*
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* Author: Steven Kinney <Steven.Kinney@amd.com>
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* Author: Suravee Suthikulpanit <Suraveee.Suthikulpanit@amd.com>
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*/
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#ifndef _PERF_EVENT_AMD_IOMMU_H_
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#define _PERF_EVENT_AMD_IOMMU_H_
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/* iommu pc mmio region register indexes */
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#define IOMMU_PC_COUNTER_REG 0x00
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#define IOMMU_PC_COUNTER_SRC_REG 0x08
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#define IOMMU_PC_PASID_MATCH_REG 0x10
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#define IOMMU_PC_DOMID_MATCH_REG 0x18
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#define IOMMU_PC_DEVID_MATCH_REG 0x20
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#define IOMMU_PC_COUNTER_REPORT_REG 0x28
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/* maximun specified bank/counters */
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#define PC_MAX_SPEC_BNKS 64
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#define PC_MAX_SPEC_CNTRS 16
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2017-02-24 08:48:19 +00:00
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struct amd_iommu;
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2013-06-05 21:11:49 +00:00
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/* amd_iommu_init.c external support functions */
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2017-02-24 08:48:17 +00:00
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extern int amd_iommu_get_num_iommus(void);
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2013-06-05 21:11:49 +00:00
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extern bool amd_iommu_pc_supported(void);
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2017-02-24 08:48:18 +00:00
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extern u8 amd_iommu_pc_get_max_banks(unsigned int idx);
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2013-06-05 21:11:49 +00:00
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2017-02-24 08:48:18 +00:00
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extern u8 amd_iommu_pc_get_max_counters(unsigned int idx);
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2013-06-05 21:11:49 +00:00
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2017-02-24 08:48:19 +00:00
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extern int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr,
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u8 fxn, u64 *value);
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extern int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr,
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u8 fxn, u64 *value);
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2013-06-05 21:11:49 +00:00
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2017-02-24 08:48:18 +00:00
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extern struct amd_iommu *get_amd_iommu(int idx);
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2013-06-05 21:11:49 +00:00
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#endif /*_PERF_EVENT_AMD_IOMMU_H_*/
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