2012-06-19 21:44:25 +00:00
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# common clock types
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2012-09-11 18:56:23 +00:00
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obj-$(CONFIG_HAVE_CLK) += clk-devres.o
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2010-11-17 09:04:33 +00:00
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obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o
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2012-03-16 06:11:20 +00:00
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obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed-rate.o clk-gate.o \
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2012-05-03 10:06:14 +00:00
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clk-mux.o clk-divider.o clk-fixed-factor.o
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2012-04-10 03:32:35 +00:00
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# SoCs specific
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2012-09-11 05:26:15 +00:00
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obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
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2012-01-11 12:52:34 +00:00
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obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
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2012-03-13 23:19:19 +00:00
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obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
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2012-04-28 16:02:39 +00:00
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obj-$(CONFIG_ARCH_MXS) += mxs/
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2012-07-18 22:07:18 +00:00
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obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
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2012-04-10 03:32:35 +00:00
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obj-$(CONFIG_PLAT_SPEAR) += spear/
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2012-06-19 21:44:25 +00:00
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obj-$(CONFIG_ARCH_U300) += clk-u300.o
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2012-08-06 16:32:08 +00:00
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obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/
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2012-08-20 06:42:37 +00:00
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obj-$(CONFIG_ARCH_PRIMA2) += clk-prima2.o
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2012-11-17 14:22:22 +00:00
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obj-$(CONFIG_PLAT_ORION) += mvebu/
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2012-08-20 02:55:11 +00:00
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ifeq ($(CONFIG_COMMON_CLK), y)
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obj-$(CONFIG_ARCH_MMP) += mmp/
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endif
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2012-08-20 10:05:35 +00:00
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obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o
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2012-08-27 13:45:53 +00:00
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obj-$(CONFIG_ARCH_U8500) += ux500/
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2012-08-21 14:01:39 +00:00
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obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
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2012-11-16 20:21:43 +00:00
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obj-$(CONFIG_ARCH_SUNXI) += clk-sunxi.o
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2012-11-08 18:04:26 +00:00
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obj-$(CONFIG_ARCH_ZYNQ) += clk-zynq.o
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clk: tegra: add Tegra specific clocks
Add Tegra specific clocks, pll, pll_out, peripheral, frac_divider, super.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: alloc sizeof(*foo) not sizeof(struct foo), add comments re:
storing pointers to stack variables, make a timeout loop more idiomatic,
use _clk_pll_disable() not clk_disable_pll() from _program_pll() to
avoid redundant lock operations, unified tegra_clk_periph() and
tegra_clk_periph_nodiv(), unified tegra_clk_pll{,e}, rename all clock
registration functions so they don't have the same name as the clock
structs, return -EINVAL from clk_plle_enable when matching table rate
not found, pass ops to _tegra_clk_register_pll rather than a bool.]
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-11 07:46:20 +00:00
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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2012-05-17 09:04:57 +00:00
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# Chip specific
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obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
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2012-08-28 08:54:28 +00:00
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obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
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2012-09-14 14:30:27 +00:00
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obj-$(CONFIG_CLK_TWL6040) += clk-twl6040.o
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