2019-04-14 19:14:49 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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2019-04-05 11:50:01 +00:00
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//
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// Freescale MPC5200 PSC DMA
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// ALSA SoC Platform driver
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//
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// Copyright (C) 2008 Secret Lab Technologies Ltd.
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// Copyright (C) 2009 Jon Smirl, Digispeaker
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2009-05-23 23:12:59 +00:00
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#include <linux/module.h>
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2012-02-25 21:12:30 +00:00
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#include <linux/dma-mapping.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
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#include <linux/slab.h>
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2023-10-06 20:09:10 +00:00
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#include <linux/of.h>
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2013-09-17 19:28:33 +00:00
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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2023-10-06 20:09:10 +00:00
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#include <linux/platform_device.h>
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2009-05-23 23:12:59 +00:00
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#include <sound/soc.h>
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2012-10-12 15:52:45 +00:00
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#include <linux/fsl/bestcomm/bestcomm.h>
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#include <linux/fsl/bestcomm/gen_bd.h>
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2009-05-23 23:12:59 +00:00
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#include <asm/mpc52xx_psc.h>
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#include "mpc5200_dma.h"
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2018-01-29 02:47:19 +00:00
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#define DRV_NAME "mpc5200_dma"
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2009-05-23 23:12:59 +00:00
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/*
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* Interrupt handlers
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*/
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2009-05-23 23:13:01 +00:00
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static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma)
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2009-05-23 23:12:59 +00:00
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{
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2009-05-23 23:13:01 +00:00
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struct psc_dma *psc_dma = _psc_dma;
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struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
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2009-05-23 23:12:59 +00:00
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u16 isr;
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isr = in_be16(®s->mpc52xx_psc_isr);
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/* Playback underrun error */
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2009-05-23 23:13:01 +00:00
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if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
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psc_dma->stats.underrun_count++;
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2009-05-23 23:12:59 +00:00
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/* Capture overrun error */
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2009-05-23 23:13:01 +00:00
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if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
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psc_dma->stats.overrun_count++;
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2009-05-23 23:12:59 +00:00
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2009-05-26 12:34:08 +00:00
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out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT);
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2009-05-23 23:12:59 +00:00
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return IRQ_HANDLED;
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}
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/**
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2009-05-23 23:13:01 +00:00
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* psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer
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2009-05-23 23:12:59 +00:00
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* @s: pointer to stream private data structure
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*
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* Enqueues another audio period buffer into the bestcomm queue.
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*
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* Note: The routine must only be called when there is space available in
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* the queue. Otherwise the enqueue will fail and the audio ring buffer
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* will get out of sync
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*/
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2009-05-23 23:13:01 +00:00
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static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s)
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2009-05-23 23:12:59 +00:00
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{
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struct bcom_bd *bd;
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/* Prepare and enqueue the next buffer descriptor */
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bd = bcom_prepare_next_buffer(s->bcom_task);
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bd->status = s->period_bytes;
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2009-11-07 08:33:53 +00:00
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bd->data[0] = s->runtime->dma_addr + (s->period_next * s->period_bytes);
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2009-05-23 23:12:59 +00:00
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bcom_submit_next_buffer(s->bcom_task, NULL);
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/* Update for next period */
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2009-11-07 08:33:53 +00:00
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s->period_next = (s->period_next + 1) % s->runtime->periods;
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2009-05-23 23:12:59 +00:00
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}
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/* Bestcomm DMA irq handler */
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2009-11-09 16:40:09 +00:00
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static irqreturn_t psc_dma_bcom_irq(int irq, void *_psc_dma_stream)
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2009-05-23 23:12:59 +00:00
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{
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2009-05-26 12:34:08 +00:00
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struct psc_dma_stream *s = _psc_dma_stream;
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2009-05-23 23:12:59 +00:00
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2009-05-26 12:34:08 +00:00
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spin_lock(&s->psc_dma->lock);
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/* For each finished period, dequeue the completed period buffer
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* and enqueue a new one in it's place. */
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while (bcom_buffer_done(s->bcom_task)) {
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bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
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2009-05-23 23:12:59 +00:00
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2009-11-07 08:33:53 +00:00
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s->period_current = (s->period_current+1) % s->runtime->periods;
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2009-11-07 08:34:18 +00:00
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s->period_count++;
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2009-05-26 12:34:08 +00:00
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psc_dma_bcom_enqueue_next_buffer(s);
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2009-05-23 23:12:59 +00:00
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}
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2009-05-26 12:34:08 +00:00
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spin_unlock(&s->psc_dma->lock);
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2009-05-23 23:12:59 +00:00
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2009-05-26 12:34:08 +00:00
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/* If the stream is active, then also inform the PCM middle layer
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* of the period finished event. */
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if (s->active)
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snd_pcm_period_elapsed(s->stream);
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return IRQ_HANDLED;
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2009-05-23 23:12:59 +00:00
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}
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/**
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2009-05-23 23:13:01 +00:00
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* psc_dma_trigger: start and stop the DMA transfer.
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2023-10-09 23:39:43 +00:00
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* @component: triggered component
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* @substream: triggered substream
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* @cmd: triggered command
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2009-05-23 23:12:59 +00:00
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*
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* This function is called by ALSA to start, stop, pause, and resume the DMA
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* transfer of data.
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*/
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2019-10-02 05:34:38 +00:00
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static int psc_dma_trigger(struct snd_soc_component *component,
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struct snd_pcm_substream *substream, int cmd)
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2009-05-23 23:12:59 +00:00
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{
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2023-09-11 23:48:02 +00:00
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struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
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struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0));
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2009-05-23 23:12:59 +00:00
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struct snd_pcm_runtime *runtime = substream->runtime;
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2009-11-07 08:34:31 +00:00
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struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
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2009-05-23 23:13:01 +00:00
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struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
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2009-05-23 23:12:59 +00:00
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u16 imr;
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unsigned long flags;
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2009-05-26 12:34:08 +00:00
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int i;
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2009-05-23 23:12:59 +00:00
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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2009-11-07 08:34:18 +00:00
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dev_dbg(psc_dma->dev, "START: stream=%i fbits=%u ps=%u #p=%u\n",
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substream->pstr->stream, runtime->frame_bits,
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(int)runtime->period_size, runtime->periods);
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2009-05-23 23:12:59 +00:00
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s->period_bytes = frames_to_bytes(runtime,
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runtime->period_size);
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2009-11-07 08:33:53 +00:00
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s->period_next = 0;
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s->period_current = 0;
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2009-05-23 23:12:59 +00:00
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s->active = 1;
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2009-11-07 08:34:18 +00:00
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s->period_count = 0;
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2009-05-26 12:34:08 +00:00
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s->runtime = runtime;
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/* Fill up the bestcomm bd queue and enable DMA.
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* This will begin filling the PSC's fifo.
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*/
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spin_lock_irqsave(&psc_dma->lock, flags);
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2009-11-07 08:34:05 +00:00
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if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
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2009-05-26 12:34:08 +00:00
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bcom_gen_bd_rx_reset(s->bcom_task);
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2009-11-07 08:34:05 +00:00
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else
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2009-05-26 12:34:08 +00:00
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bcom_gen_bd_tx_reset(s->bcom_task);
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2009-11-07 08:34:05 +00:00
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for (i = 0; i < runtime->periods; i++)
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if (!bcom_queue_full(s->bcom_task))
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psc_dma_bcom_enqueue_next_buffer(s);
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2009-05-23 23:12:59 +00:00
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bcom_enable(s->bcom_task);
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2009-05-23 23:13:01 +00:00
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spin_unlock_irqrestore(&psc_dma->lock, flags);
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2009-05-23 23:12:59 +00:00
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2009-05-26 12:34:08 +00:00
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out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT);
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2009-05-23 23:12:59 +00:00
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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2009-11-07 08:34:18 +00:00
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dev_dbg(psc_dma->dev, "STOP: stream=%i periods_count=%i\n",
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substream->pstr->stream, s->period_count);
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2009-05-23 23:12:59 +00:00
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s->active = 0;
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2009-05-26 12:34:08 +00:00
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spin_lock_irqsave(&psc_dma->lock, flags);
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2009-05-23 23:12:59 +00:00
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bcom_disable(s->bcom_task);
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2009-05-26 12:34:08 +00:00
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if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
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bcom_gen_bd_rx_reset(s->bcom_task);
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else
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bcom_gen_bd_tx_reset(s->bcom_task);
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spin_unlock_irqrestore(&psc_dma->lock, flags);
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2009-05-23 23:12:59 +00:00
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break;
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default:
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2009-11-07 08:34:18 +00:00
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dev_dbg(psc_dma->dev, "unhandled trigger: stream=%i cmd=%i\n",
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substream->pstr->stream, cmd);
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2009-05-23 23:12:59 +00:00
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return -EINVAL;
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}
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/* Update interrupt enable settings */
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imr = 0;
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2009-05-23 23:13:01 +00:00
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if (psc_dma->playback.active)
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2009-05-23 23:12:59 +00:00
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imr |= MPC52xx_PSC_IMR_TXEMP;
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2009-05-23 23:13:01 +00:00
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if (psc_dma->capture.active)
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2009-05-23 23:12:59 +00:00
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imr |= MPC52xx_PSC_IMR_ORERR;
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2009-05-26 12:34:08 +00:00
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out_be16(®s->isr_imr.imr, psc_dma->imr | imr);
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2009-05-23 23:12:59 +00:00
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return 0;
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}
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/* ---------------------------------------------------------------------
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* The PSC DMA 'ASoC platform' driver
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*
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* Can be referenced by an 'ASoC machine' driver
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* This driver only deals with the audio bus; it doesn't have any
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* interaction with the attached codec
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*/
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2009-05-26 12:34:08 +00:00
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static const struct snd_pcm_hardware psc_dma_hardware = {
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2009-05-23 23:12:59 +00:00
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.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
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SNDRV_PCM_INFO_BATCH,
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.formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |
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2009-05-26 12:34:08 +00:00
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SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE,
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2009-05-23 23:12:59 +00:00
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.period_bytes_max = 1024 * 1024,
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.period_bytes_min = 32,
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.periods_min = 2,
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.periods_max = 256,
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.buffer_bytes_max = 2 * 1024 * 1024,
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2009-05-26 12:34:08 +00:00
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.fifo_size = 512,
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2009-05-23 23:12:59 +00:00
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};
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2019-10-02 05:34:38 +00:00
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static int psc_dma_open(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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2009-05-23 23:12:59 +00:00
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{
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2009-05-26 12:34:08 +00:00
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struct snd_pcm_runtime *runtime = substream->runtime;
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2023-09-11 23:48:02 +00:00
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struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
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struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0));
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2009-05-23 23:13:01 +00:00
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struct psc_dma_stream *s;
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2009-05-26 12:34:08 +00:00
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int rc;
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2009-05-23 23:12:59 +00:00
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2009-05-26 12:34:08 +00:00
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dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream);
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2009-05-23 23:12:59 +00:00
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if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
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2009-05-23 23:13:01 +00:00
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s = &psc_dma->capture;
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2009-05-23 23:12:59 +00:00
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else
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2009-05-23 23:13:01 +00:00
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s = &psc_dma->playback;
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2009-05-23 23:12:59 +00:00
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2009-05-26 12:34:08 +00:00
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snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware);
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|
|
rc = snd_pcm_hw_constraint_integer(runtime,
|
|
|
|
SNDRV_PCM_HW_PARAM_PERIODS);
|
|
|
|
if (rc < 0) {
|
|
|
|
dev_err(substream->pcm->card->dev, "invalid buffer size\n");
|
|
|
|
return rc;
|
|
|
|
}
|
2009-05-23 23:12:59 +00:00
|
|
|
|
|
|
|
s->stream = substream;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2019-10-02 05:34:38 +00:00
|
|
|
static int psc_dma_close(struct snd_soc_component *component,
|
|
|
|
struct snd_pcm_substream *substream)
|
2009-05-23 23:12:59 +00:00
|
|
|
{
|
2023-09-11 23:48:02 +00:00
|
|
|
struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
|
|
|
|
struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0));
|
2009-05-23 23:13:01 +00:00
|
|
|
struct psc_dma_stream *s;
|
2009-05-23 23:12:59 +00:00
|
|
|
|
2009-05-26 12:34:08 +00:00
|
|
|
dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream);
|
2009-05-23 23:12:59 +00:00
|
|
|
|
|
|
|
if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
|
2009-05-23 23:13:01 +00:00
|
|
|
s = &psc_dma->capture;
|
2009-05-23 23:12:59 +00:00
|
|
|
else
|
2009-05-23 23:13:01 +00:00
|
|
|
s = &psc_dma->playback;
|
2009-05-23 23:12:59 +00:00
|
|
|
|
2009-05-26 12:34:08 +00:00
|
|
|
if (!psc_dma->playback.active &&
|
|
|
|
!psc_dma->capture.active) {
|
|
|
|
|
|
|
|
/* Disable all interrupts and reset the PSC */
|
|
|
|
out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
|
|
|
|
out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */
|
|
|
|
}
|
2009-05-23 23:12:59 +00:00
|
|
|
s->stream = NULL;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static snd_pcm_uframes_t
|
2019-10-02 05:34:38 +00:00
|
|
|
psc_dma_pointer(struct snd_soc_component *component,
|
|
|
|
struct snd_pcm_substream *substream)
|
2009-05-23 23:12:59 +00:00
|
|
|
{
|
2023-09-11 23:48:02 +00:00
|
|
|
struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
|
|
|
|
struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0));
|
2009-05-23 23:13:01 +00:00
|
|
|
struct psc_dma_stream *s;
|
2009-05-23 23:12:59 +00:00
|
|
|
dma_addr_t count;
|
|
|
|
|
|
|
|
if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
|
2009-05-23 23:13:01 +00:00
|
|
|
s = &psc_dma->capture;
|
2009-05-23 23:12:59 +00:00
|
|
|
else
|
2009-05-23 23:13:01 +00:00
|
|
|
s = &psc_dma->playback;
|
2009-05-23 23:12:59 +00:00
|
|
|
|
2009-11-07 08:33:53 +00:00
|
|
|
count = s->period_current * s->period_bytes;
|
2009-05-23 23:12:59 +00:00
|
|
|
|
|
|
|
return bytes_to_frames(substream->runtime, count);
|
|
|
|
}
|
|
|
|
|
2019-10-02 05:34:38 +00:00
|
|
|
static int psc_dma_new(struct snd_soc_component *component,
|
|
|
|
struct snd_soc_pcm_runtime *rtd)
|
2009-05-23 23:12:59 +00:00
|
|
|
{
|
2011-06-07 15:08:33 +00:00
|
|
|
struct snd_card *card = rtd->card->snd_card;
|
2023-09-11 23:48:02 +00:00
|
|
|
struct snd_soc_dai *dai = snd_soc_rtd_to_cpu(rtd, 0);
|
2011-06-07 15:08:33 +00:00
|
|
|
struct snd_pcm *pcm = rtd->pcm;
|
2009-05-26 12:34:08 +00:00
|
|
|
size_t size = psc_dma_hardware.buffer_bytes_max;
|
2013-06-27 11:53:37 +00:00
|
|
|
int rc;
|
2009-05-23 23:12:59 +00:00
|
|
|
|
2018-01-29 02:47:19 +00:00
|
|
|
dev_dbg(component->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n",
|
2009-05-23 23:12:59 +00:00
|
|
|
card, dai, pcm);
|
|
|
|
|
2013-06-27 11:53:37 +00:00
|
|
|
rc = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
2009-05-23 23:12:59 +00:00
|
|
|
|
2021-08-02 07:28:12 +00:00
|
|
|
return snd_pcm_set_fixed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, card->dev,
|
|
|
|
size);
|
2009-05-23 23:12:59 +00:00
|
|
|
}
|
|
|
|
|
2018-01-29 02:47:19 +00:00
|
|
|
static const struct snd_soc_component_driver mpc5200_audio_dma_component = {
|
|
|
|
.name = DRV_NAME,
|
2019-10-02 05:34:38 +00:00
|
|
|
.open = psc_dma_open,
|
|
|
|
.close = psc_dma_close,
|
|
|
|
.pointer = psc_dma_pointer,
|
|
|
|
.trigger = psc_dma_trigger,
|
|
|
|
.pcm_construct = psc_dma_new,
|
2009-05-23 23:12:59 +00:00
|
|
|
};
|
2009-05-26 12:34:08 +00:00
|
|
|
|
2012-09-13 21:43:11 +00:00
|
|
|
int mpc5200_audio_dma_create(struct platform_device *op)
|
2009-05-26 12:34:08 +00:00
|
|
|
{
|
|
|
|
phys_addr_t fifo;
|
|
|
|
struct psc_dma *psc_dma;
|
|
|
|
struct resource res;
|
|
|
|
int size, irq, rc;
|
|
|
|
const __be32 *prop;
|
|
|
|
void __iomem *regs;
|
2009-09-12 12:25:35 +00:00
|
|
|
int ret;
|
2009-05-26 12:34:08 +00:00
|
|
|
|
|
|
|
/* Fetch the registers and IRQ of the PSC */
|
2010-04-13 23:12:29 +00:00
|
|
|
irq = irq_of_parse_and_map(op->dev.of_node, 0);
|
|
|
|
if (of_address_to_resource(op->dev.of_node, 0, &res)) {
|
2009-05-26 12:34:08 +00:00
|
|
|
dev_err(&op->dev, "Missing reg property\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
2011-06-09 16:13:32 +00:00
|
|
|
regs = ioremap(res.start, resource_size(&res));
|
2009-05-26 12:34:08 +00:00
|
|
|
if (!regs) {
|
|
|
|
dev_err(&op->dev, "Could not map registers\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Allocate and initialize the driver private data */
|
|
|
|
psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL);
|
|
|
|
if (!psc_dma) {
|
2009-09-12 12:25:35 +00:00
|
|
|
ret = -ENOMEM;
|
|
|
|
goto out_unmap;
|
2009-05-26 12:34:08 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the PSC ID */
|
2010-04-13 23:12:29 +00:00
|
|
|
prop = of_get_property(op->dev.of_node, "cell-index", &size);
|
2009-09-12 12:25:35 +00:00
|
|
|
if (!prop || size < sizeof *prop) {
|
|
|
|
ret = -ENODEV;
|
|
|
|
goto out_free;
|
|
|
|
}
|
2009-05-26 12:34:08 +00:00
|
|
|
|
|
|
|
spin_lock_init(&psc_dma->lock);
|
2009-07-02 17:57:25 +00:00
|
|
|
mutex_init(&psc_dma->mutex);
|
2009-05-26 12:34:08 +00:00
|
|
|
psc_dma->id = be32_to_cpu(*prop);
|
|
|
|
psc_dma->irq = irq;
|
|
|
|
psc_dma->psc_regs = regs;
|
|
|
|
psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs;
|
|
|
|
psc_dma->dev = &op->dev;
|
|
|
|
psc_dma->playback.psc_dma = psc_dma;
|
|
|
|
psc_dma->capture.psc_dma = psc_dma;
|
2021-02-19 23:29:35 +00:00
|
|
|
snprintf(psc_dma->name, sizeof(psc_dma->name), "PSC%d", psc_dma->id);
|
2009-05-26 12:34:08 +00:00
|
|
|
|
|
|
|
/* Find the address of the fifo data registers and setup the
|
|
|
|
* DMA tasks */
|
|
|
|
fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32);
|
|
|
|
psc_dma->capture.bcom_task =
|
|
|
|
bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512);
|
|
|
|
psc_dma->playback.bcom_task =
|
|
|
|
bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo);
|
|
|
|
if (!psc_dma->capture.bcom_task ||
|
|
|
|
!psc_dma->playback.bcom_task) {
|
|
|
|
dev_err(&op->dev, "Could not allocate bestcomm tasks\n");
|
2009-09-12 12:25:35 +00:00
|
|
|
ret = -ENODEV;
|
|
|
|
goto out_free;
|
2009-05-26 12:34:08 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Disable all interrupts and reset the PSC */
|
|
|
|
out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
|
|
|
|
/* reset receiver */
|
|
|
|
out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX);
|
|
|
|
/* reset transmitter */
|
|
|
|
out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX);
|
|
|
|
/* reset error */
|
|
|
|
out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT);
|
|
|
|
/* reset mode */
|
|
|
|
out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1);
|
|
|
|
|
|
|
|
/* Set up mode register;
|
|
|
|
* First write: RxRdy (FIFO Alarm) generates rx FIFO irq
|
|
|
|
* Second write: register Normal mode for non loopback
|
|
|
|
*/
|
|
|
|
out_8(&psc_dma->psc_regs->mode, 0);
|
|
|
|
out_8(&psc_dma->psc_regs->mode, 0);
|
|
|
|
|
|
|
|
/* Set the TX and RX fifo alarm thresholds */
|
|
|
|
out_be16(&psc_dma->fifo_regs->rfalarm, 0x100);
|
|
|
|
out_8(&psc_dma->fifo_regs->rfcntl, 0x4);
|
|
|
|
out_be16(&psc_dma->fifo_regs->tfalarm, 0x100);
|
|
|
|
out_8(&psc_dma->fifo_regs->tfcntl, 0x7);
|
|
|
|
|
|
|
|
/* Lookup the IRQ numbers */
|
|
|
|
psc_dma->playback.irq =
|
|
|
|
bcom_get_task_irq(psc_dma->playback.bcom_task);
|
|
|
|
psc_dma->capture.irq =
|
|
|
|
bcom_get_task_irq(psc_dma->capture.bcom_task);
|
|
|
|
|
|
|
|
rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED,
|
|
|
|
"psc-dma-status", psc_dma);
|
2009-11-09 16:40:09 +00:00
|
|
|
rc |= request_irq(psc_dma->capture.irq, &psc_dma_bcom_irq, IRQF_SHARED,
|
2009-05-26 12:34:08 +00:00
|
|
|
"psc-dma-capture", &psc_dma->capture);
|
2009-11-09 16:40:09 +00:00
|
|
|
rc |= request_irq(psc_dma->playback.irq, &psc_dma_bcom_irq, IRQF_SHARED,
|
2009-05-26 12:34:08 +00:00
|
|
|
"psc-dma-playback", &psc_dma->playback);
|
|
|
|
if (rc) {
|
2009-09-12 12:25:35 +00:00
|
|
|
ret = -ENODEV;
|
|
|
|
goto out_irq;
|
2009-05-26 12:34:08 +00:00
|
|
|
}
|
2009-05-23 23:12:59 +00:00
|
|
|
|
2009-05-26 12:34:08 +00:00
|
|
|
/* Save what we've done so it can be found again later */
|
|
|
|
dev_set_drvdata(&op->dev, psc_dma);
|
|
|
|
|
|
|
|
/* Tell the ASoC OF helpers about it */
|
2018-01-29 02:47:19 +00:00
|
|
|
return devm_snd_soc_register_component(&op->dev,
|
|
|
|
&mpc5200_audio_dma_component, NULL, 0);
|
2009-09-12 12:25:35 +00:00
|
|
|
out_irq:
|
|
|
|
free_irq(psc_dma->irq, psc_dma);
|
|
|
|
free_irq(psc_dma->capture.irq, &psc_dma->capture);
|
|
|
|
free_irq(psc_dma->playback.irq, &psc_dma->playback);
|
|
|
|
out_free:
|
|
|
|
kfree(psc_dma);
|
|
|
|
out_unmap:
|
|
|
|
iounmap(regs);
|
|
|
|
return ret;
|
2009-05-26 12:34:08 +00:00
|
|
|
}
|
2012-09-13 21:43:11 +00:00
|
|
|
EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create);
|
2009-05-26 12:34:08 +00:00
|
|
|
|
2012-09-13 21:43:11 +00:00
|
|
|
int mpc5200_audio_dma_destroy(struct platform_device *op)
|
2009-05-26 12:34:08 +00:00
|
|
|
{
|
|
|
|
struct psc_dma *psc_dma = dev_get_drvdata(&op->dev);
|
|
|
|
|
|
|
|
dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n");
|
|
|
|
|
|
|
|
bcom_gen_bd_rx_release(psc_dma->capture.bcom_task);
|
|
|
|
bcom_gen_bd_tx_release(psc_dma->playback.bcom_task);
|
|
|
|
|
|
|
|
/* Release irqs */
|
|
|
|
free_irq(psc_dma->irq, psc_dma);
|
|
|
|
free_irq(psc_dma->capture.irq, &psc_dma->capture);
|
|
|
|
free_irq(psc_dma->playback.irq, &psc_dma->playback);
|
|
|
|
|
|
|
|
iounmap(psc_dma->psc_regs);
|
|
|
|
kfree(psc_dma);
|
|
|
|
dev_set_drvdata(&op->dev, NULL);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2012-09-13 21:43:11 +00:00
|
|
|
EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy);
|
2009-05-26 12:34:08 +00:00
|
|
|
|
|
|
|
MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
|
|
|
|
MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver");
|
|
|
|
MODULE_LICENSE("GPL");
|