2011-07-10 01:14:07 +00:00
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/*
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* omap_hwmod_2xxx_3xxx_ipblock_data.c - common IP block data for OMAP2/3
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*
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* Copyright (C) 2011 Nokia Corporation
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2012-05-08 17:34:27 +00:00
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* Copyright (C) 2012 Texas Instruments, Inc.
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2011-07-10 01:14:07 +00:00
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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2012-10-03 00:41:35 +00:00
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2012-11-30 16:41:50 +00:00
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#include <linux/dmaengine.h>
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#include <linux/omap-dma.h>
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2012-10-03 00:41:35 +00:00
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#include "omap_hwmod.h"
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2012-09-20 18:41:48 +00:00
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#include "hdq1w.h"
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2011-07-10 01:14:07 +00:00
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#include "omap_hwmod_common_data.h"
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2011-07-10 01:14:08 +00:00
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/* UART */
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static struct omap_hwmod_class_sysconfig omap2_uart_sysc = {
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.rev_offs = 0x50,
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.sysc_offs = 0x54,
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.syss_offs = 0x58,
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.sysc_flags = (SYSC_HAS_SIDLEMODE |
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SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
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SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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struct omap_hwmod_class omap2_uart_class = {
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.name = "uart",
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.sysc = &omap2_uart_sysc,
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};
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/*
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* 'venc' class
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* video encoder
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*/
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struct omap_hwmod_class omap2_venc_hwmod_class = {
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.name = "venc",
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};
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2011-07-10 01:14:07 +00:00
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/*
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* omap_hwmod class data
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*/
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struct omap_hwmod_class l3_hwmod_class = {
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2016-10-21 10:02:12 +00:00
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.name = "l3",
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2011-07-10 01:14:07 +00:00
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};
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struct omap_hwmod_class l4_hwmod_class = {
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2016-10-21 10:02:12 +00:00
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.name = "l4",
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2011-07-10 01:14:07 +00:00
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};
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struct omap_hwmod_class mpu_hwmod_class = {
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2016-10-21 10:02:12 +00:00
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.name = "mpu",
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2011-07-10 01:14:07 +00:00
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};
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struct omap_hwmod_class iva_hwmod_class = {
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2016-10-21 10:02:12 +00:00
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.name = "iva",
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2011-07-10 01:14:07 +00:00
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};
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/* Common MPU IRQ line data */
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2011-07-10 01:14:07 +00:00
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struct omap_hwmod_irq_info omap2_dispc_irqs[] = {
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2012-08-28 00:43:01 +00:00
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{ .irq = 25 + OMAP_INTC_START, },
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2016-10-21 10:02:12 +00:00
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{ .irq = -1, },
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2011-07-10 01:14:07 +00:00
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};
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struct omap_hwmod_irq_info omap2_dma_system_irqs[] = {
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2012-08-28 00:43:01 +00:00
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{ .name = "0", .irq = 12 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ0 */
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{ .name = "1", .irq = 13 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ1 */
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{ .name = "2", .irq = 14 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ2 */
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{ .name = "3", .irq = 15 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ3 */
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2016-10-21 10:02:12 +00:00
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{ .irq = -1, },
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2011-07-10 01:14:07 +00:00
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};
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2012-05-08 17:34:27 +00:00
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struct omap_hwmod_class_sysconfig omap2_hdq1w_sysc = {
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.rev_offs = 0x0,
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.sysc_offs = 0x14,
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.syss_offs = 0x18,
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.sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
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SYSS_HAS_RESET_STATUS),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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struct omap_hwmod_class omap2_hdq1w_class = {
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.name = "hdq1w",
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.sysc = &omap2_hdq1w_sysc,
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.reset = &omap_hdq1w_reset,
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};
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