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130 lines
3.7 KiB
Plaintext
130 lines
3.7 KiB
Plaintext
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menu "Platform options"
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comment "Memory settings"
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config NIOS2_MEM_BASE
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hex "Memory base address"
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default "0x00000000"
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help
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This is the physical address of the memory that the kernel will run
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from. This address is used to link the kernel and setup initial memory
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management. You should take the raw memory address without any MMU
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or cache bits set.
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Please not that this address is used directly so you have to manually
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do address translation if it's connected to a bridge.
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comment "Device tree"
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config NIOS2_DTB_AT_PHYS_ADDR
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bool "DTB at physical address"
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default n
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help
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When enabled you can select a physical address to load the dtb from.
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Normally this address is passed by a bootloader such as u-boot but
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using this you can use a devicetree without a bootloader.
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This way you can store a devicetree in NOR flash or an onchip rom.
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Please note that this address is used directly so you have to manually
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do address translation if it's connected to a bridge. Also take into
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account that when using an MMU you'd have to ad 0xC0000000 to your
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address
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config NIOS2_DTB_PHYS_ADDR
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hex "DTB Address"
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depends on NIOS2_DTB_AT_PHYS_ADDR
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default "0xC0000000"
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help
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Physical address of a dtb blob.
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config NIOS2_DTB_SOURCE_BOOL
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bool "Compile and link device tree into kernel image"
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default n
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help
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This allows you to specify a dts (device tree source) file
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which will be compiled and linked into the kernel image.
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config NIOS2_DTB_SOURCE
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string "Device tree source file"
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depends on NIOS2_DTB_SOURCE_BOOL
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default ""
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help
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Absolute path to the device tree source (dts) file describing your
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system.
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comment "Nios II instructions"
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config NIOS2_HW_MUL_SUPPORT
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bool "Enable MUL instruction"
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default n
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help
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Set to true if you configured the Nios II to include the MUL
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instruction. This will enable the -mhw-mul compiler flag.
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config NIOS2_HW_MULX_SUPPORT
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bool "Enable MULX instruction"
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default n
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help
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Set to true if you configured the Nios II to include the MULX
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instruction. Enables the -mhw-mulx compiler flag.
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config NIOS2_HW_DIV_SUPPORT
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bool "Enable DIV instruction"
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default n
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help
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Set to true if you configured the Nios II to include the DIV
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instruction. Enables the -mhw-div compiler flag.
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config NIOS2_FPU_SUPPORT
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bool "Custom floating point instr support"
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default n
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help
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Enables the -mcustom-fpu-cfg=60-1 compiler flag.
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config NIOS2_CI_SWAB_SUPPORT
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bool "Byteswap custom instruction"
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default n
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help
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Use the byteswap (endian converter) Nios II custom instruction provided
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by Altera and which can be enabled in QSYS builder. This accelerates
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endian conversions in the kernel (e.g. ntohs).
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config NIOS2_CI_SWAB_NO
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int "Byteswap custom instruction number" if NIOS2_CI_SWAB_SUPPORT
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default 0
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help
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Number of the instruction as configured in QSYS Builder.
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comment "Cache settings"
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config CUSTOM_CACHE_SETTINGS
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bool "Custom cache settings"
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help
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This option allows you to tweak the cache settings used during early
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boot (where the information from device tree is not yet available).
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There should be no reason to change these values. Linux will work
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perfectly fine, even if the Nios II is configured with smaller caches.
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Say N here unless you know what you are doing.
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config NIOS2_DCACHE_SIZE
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hex "D-Cache size" if CUSTOM_CACHE_SETTINGS
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range 0x200 0x10000
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default "0x800"
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help
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Maximum possible data cache size.
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config NIOS2_DCACHE_LINE_SIZE
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hex "D-Cache line size" if CUSTOM_CACHE_SETTINGS
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range 0x10 0x20
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default "0x20"
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help
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Minimum possible data cache line size.
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config NIOS2_ICACHE_SIZE
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hex "I-Cache size" if CUSTOM_CACHE_SETTINGS
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range 0x200 0x10000
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default "0x1000"
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help
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Maximum possible instruction cache size.
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endmenu
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