2007-10-14 18:43:16 +00:00
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#ifndef RTL8180_H
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#define RTL8180_H
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#include "rtl818x.h"
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#define MAX_RX_SIZE IEEE80211_MAX_RTS_THRESHOLD
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#define RF_PARAM_ANALOGPHY (1 << 0)
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#define RF_PARAM_ANTBDEFAULT (1 << 1)
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#define RF_PARAM_CARRIERSENSE1 (1 << 2)
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#define RF_PARAM_CARRIERSENSE2 (1 << 3)
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#define BB_ANTATTEN_CHAN14 0x0C
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#define BB_ANTENNA_B 0x40
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#define BB_HOST_BANG (1 << 30)
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#define BB_HOST_BANG_EN (1 << 2)
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#define BB_HOST_BANG_CLK (1 << 1)
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#define BB_HOST_BANG_DATA 1
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#define ANAPARAM_TXDACOFF_SHIFT 27
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#define ANAPARAM_PWR0_SHIFT 28
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#define ANAPARAM_PWR0_MASK (0x07 << ANAPARAM_PWR0_SHIFT)
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#define ANAPARAM_PWR1_SHIFT 20
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#define ANAPARAM_PWR1_MASK (0x7F << ANAPARAM_PWR1_SHIFT)
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enum rtl8180_tx_desc_flags {
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RTL8180_TX_DESC_FLAG_NO_ENC = (1 << 15),
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RTL8180_TX_DESC_FLAG_TX_OK = (1 << 15),
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RTL8180_TX_DESC_FLAG_SPLCP = (1 << 16),
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RTL8180_TX_DESC_FLAG_RX_UNDER = (1 << 16),
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RTL8180_TX_DESC_FLAG_MOREFRAG = (1 << 17),
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RTL8180_TX_DESC_FLAG_CTS = (1 << 18),
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RTL8180_TX_DESC_FLAG_RTS = (1 << 23),
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RTL8180_TX_DESC_FLAG_LS = (1 << 28),
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RTL8180_TX_DESC_FLAG_FS = (1 << 29),
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RTL8180_TX_DESC_FLAG_DMA = (1 << 30),
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RTL8180_TX_DESC_FLAG_OWN = (1 << 31)
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};
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struct rtl8180_tx_desc {
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__le32 flags;
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__le16 rts_duration;
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__le16 plcp_len;
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__le32 tx_buf;
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__le32 frame_len;
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__le32 next_tx_desc;
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u8 cw;
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u8 retry_limit;
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u8 agc;
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u8 flags2;
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u32 reserved[2];
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} __attribute__ ((packed));
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enum rtl8180_rx_desc_flags {
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RTL8180_RX_DESC_FLAG_ICV_ERR = (1 << 12),
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RTL8180_RX_DESC_FLAG_CRC32_ERR = (1 << 13),
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RTL8180_RX_DESC_FLAG_PM = (1 << 14),
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RTL8180_RX_DESC_FLAG_RX_ERR = (1 << 15),
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RTL8180_RX_DESC_FLAG_BCAST = (1 << 16),
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RTL8180_RX_DESC_FLAG_PAM = (1 << 17),
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RTL8180_RX_DESC_FLAG_MCAST = (1 << 18),
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RTL8180_RX_DESC_FLAG_SPLCP = (1 << 25),
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RTL8180_RX_DESC_FLAG_FOF = (1 << 26),
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RTL8180_RX_DESC_FLAG_DMA_FAIL = (1 << 27),
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RTL8180_RX_DESC_FLAG_LS = (1 << 28),
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RTL8180_RX_DESC_FLAG_FS = (1 << 29),
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RTL8180_RX_DESC_FLAG_EOR = (1 << 30),
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RTL8180_RX_DESC_FLAG_OWN = (1 << 31)
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};
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struct rtl8180_rx_desc {
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__le32 flags;
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__le32 flags2;
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union {
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__le32 rx_buf;
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__le64 tsft;
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};
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} __attribute__ ((packed));
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struct rtl8180_tx_ring {
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struct rtl8180_tx_desc *desc;
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dma_addr_t dma;
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unsigned int idx;
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unsigned int entries;
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struct sk_buff_head queue;
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};
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struct rtl8180_priv {
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/* common between rtl818x drivers */
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struct rtl818x_csr __iomem *map;
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const struct rtl818x_rf_ops *rf;
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2007-12-19 00:31:26 +00:00
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struct ieee80211_vif *vif;
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2007-10-14 18:43:16 +00:00
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int mode;
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/* rtl8180 driver specific */
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spinlock_t lock;
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struct rtl8180_rx_desc *rx_ring;
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dma_addr_t rx_ring_dma;
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unsigned int rx_idx;
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struct sk_buff *rx_buf[32];
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struct rtl8180_tx_ring tx_ring[4];
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struct ieee80211_channel channels[14];
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struct ieee80211_rate rates[12];
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2008-01-24 18:38:38 +00:00
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struct ieee80211_supported_band band;
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2007-10-14 18:43:16 +00:00
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struct pci_dev *pdev;
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u32 rx_conf;
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int r8185;
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u32 anaparam;
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u16 rfparam;
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u8 csthreshold;
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};
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void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
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void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam);
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static inline u8 rtl818x_ioread8(struct rtl8180_priv *priv, u8 __iomem *addr)
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{
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return ioread8(addr);
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}
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static inline u16 rtl818x_ioread16(struct rtl8180_priv *priv, __le16 __iomem *addr)
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{
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return ioread16(addr);
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}
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static inline u32 rtl818x_ioread32(struct rtl8180_priv *priv, __le32 __iomem *addr)
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{
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return ioread32(addr);
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}
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static inline void rtl818x_iowrite8(struct rtl8180_priv *priv,
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u8 __iomem *addr, u8 val)
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{
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iowrite8(val, addr);
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}
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static inline void rtl818x_iowrite16(struct rtl8180_priv *priv,
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__le16 __iomem *addr, u16 val)
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{
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iowrite16(val, addr);
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}
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static inline void rtl818x_iowrite32(struct rtl8180_priv *priv,
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__le32 __iomem *addr, u32 val)
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{
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iowrite32(val, addr);
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}
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#endif /* RTL8180_H */
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