2020-04-16 12:25:35 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2019 NXP
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*
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*/
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#ifndef _FSL_ASRC_COMMON_H
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#define _FSL_ASRC_COMMON_H
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/* directions */
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#define IN 0
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#define OUT 1
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enum asrc_pair_index {
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ASRC_INVALID_PAIR = -1,
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ASRC_PAIR_A = 0,
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ASRC_PAIR_B = 1,
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ASRC_PAIR_C = 2,
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ASRC_PAIR_D = 3,
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};
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#define PAIR_CTX_NUM 0x4
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/**
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* fsl_asrc_pair: ASRC Pair common data
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*
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* @asrc: pointer to its parent module
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* @error: error record
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* @index: pair index (ASRC_PAIR_A, ASRC_PAIR_B, ASRC_PAIR_C)
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* @channels: occupied channel number
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* @desc: input and output dma descriptors
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* @dma_chan: inputer and output DMA channels
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* @dma_data: private dma data
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* @pos: hardware pointer position
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2020-06-12 07:37:51 +00:00
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* @req_dma_chan: flag to release dev_to_dev chan
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2020-04-16 12:25:35 +00:00
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* @private: pair private area
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*/
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struct fsl_asrc_pair {
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struct fsl_asrc *asrc;
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unsigned int error;
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enum asrc_pair_index index;
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unsigned int channels;
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struct dma_async_tx_descriptor *desc[2];
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struct dma_chan *dma_chan[2];
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struct imx_dma_data dma_data;
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unsigned int pos;
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2020-06-12 07:37:51 +00:00
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bool req_dma_chan;
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2020-04-16 12:25:35 +00:00
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void *private;
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};
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/**
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* fsl_asrc: ASRC common data
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*
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* @dma_params_rx: DMA parameters for receive channel
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* @dma_params_tx: DMA parameters for transmit channel
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* @pdev: platform device pointer
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* @regmap: regmap handler
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* @paddr: physical address to the base address of registers
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* @mem_clk: clock source to access register
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* @ipg_clk: clock source to drive peripheral
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* @spba_clk: SPBA clock (optional, depending on SoC design)
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* @lock: spin lock for resource protection
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* @pair: pair pointers
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* @channel_avail: non-occupied channel numbers
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* @asrc_rate: default sample rate for ASoC Back-Ends
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* @asrc_format: default sample format for ASoC Back-Ends
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* @use_edma: edma is used
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* @get_dma_channel: function pointer
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* @request_pair: function pointer
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* @release_pair: function pointer
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* @get_fifo_addr: function pointer
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* @pair_priv_size: size of pair private struct.
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* @private: private data structure
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*/
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struct fsl_asrc {
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struct snd_dmaengine_dai_dma_data dma_params_rx;
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struct snd_dmaengine_dai_dma_data dma_params_tx;
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struct platform_device *pdev;
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struct regmap *regmap;
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unsigned long paddr;
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struct clk *mem_clk;
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struct clk *ipg_clk;
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struct clk *spba_clk;
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spinlock_t lock; /* spin lock for resource protection */
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struct fsl_asrc_pair *pair[PAIR_CTX_NUM];
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unsigned int channel_avail;
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int asrc_rate;
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snd_pcm_format_t asrc_format;
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bool use_edma;
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struct dma_chan *(*get_dma_channel)(struct fsl_asrc_pair *pair, bool dir);
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int (*request_pair)(int channels, struct fsl_asrc_pair *pair);
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void (*release_pair)(struct fsl_asrc_pair *pair);
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int (*get_fifo_addr)(u8 dir, enum asrc_pair_index index);
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size_t pair_priv_size;
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void *private;
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};
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#define DRV_NAME "fsl-asrc-dai"
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extern struct snd_soc_component_driver fsl_asrc_component;
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#endif /* _FSL_ASRC_COMMON_H */
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