2012-11-29 11:55:21 +00:00
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#ifndef _ASM_S390_PCI_CLP_H
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#define _ASM_S390_PCI_CLP_H
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#include <asm/clp.h>
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/*
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* Call Logical Processor - Command Codes
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*/
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#define CLP_LIST_PCI 0x0002
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#define CLP_QUERY_PCI_FN 0x0003
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#define CLP_QUERY_PCI_FNGRP 0x0004
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#define CLP_SET_PCI_FN 0x0005
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/* PCI function handle list entry */
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struct clp_fh_list_entry {
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u16 device_id;
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u16 vendor_id;
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u32 config_state : 1;
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u32 : 31;
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u32 fid; /* PCI function id */
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u32 fh; /* PCI function handle */
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} __packed;
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#define CLP_RC_SETPCIFN_FH 0x0101 /* Invalid PCI fn handle */
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#define CLP_RC_SETPCIFN_FHOP 0x0102 /* Fn handle not valid for op */
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#define CLP_RC_SETPCIFN_DMAAS 0x0103 /* Invalid DMA addr space */
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#define CLP_RC_SETPCIFN_RES 0x0104 /* Insufficient resources */
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#define CLP_RC_SETPCIFN_ALRDY 0x0105 /* Fn already in requested state */
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#define CLP_RC_SETPCIFN_ERR 0x0106 /* Fn in permanent error state */
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#define CLP_RC_SETPCIFN_RECPND 0x0107 /* Error recovery pending */
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#define CLP_RC_SETPCIFN_BUSY 0x0108 /* Fn busy */
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#define CLP_RC_LISTPCI_BADRT 0x010a /* Resume token not recognized */
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#define CLP_RC_QUERYPCIFG_PFGID 0x010b /* Unrecognized PFGID */
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/* request or response block header length */
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#define LIST_PCI_HDR_LEN 32
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/* Number of function handles fitting in response block */
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#define CLP_FH_LIST_NR_ENTRIES \
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((CLP_BLK_SIZE - 2 * LIST_PCI_HDR_LEN) \
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/ sizeof(struct clp_fh_list_entry))
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#define CLP_SET_ENABLE_PCI_FN 0 /* Yes, 0 enables it */
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#define CLP_SET_DISABLE_PCI_FN 1 /* Yes, 1 disables it */
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#define CLP_UTIL_STR_LEN 64
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2014-04-16 14:12:05 +00:00
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#define CLP_PFIP_NR_SEGMENTS 4
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2012-11-29 11:55:21 +00:00
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2016-01-27 12:33:30 +00:00
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extern bool zpci_unique_uid;
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2012-11-29 11:55:21 +00:00
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/* List PCI functions request */
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struct clp_req_list_pci {
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struct clp_req_hdr hdr;
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u64 resume_token;
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u64 reserved2;
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} __packed;
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/* List PCI functions response */
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struct clp_rsp_list_pci {
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struct clp_rsp_hdr hdr;
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u64 resume_token;
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u32 reserved2;
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u16 max_fn;
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2016-01-27 12:33:30 +00:00
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u8 : 7;
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u8 uid_checking : 1;
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2012-11-29 11:55:21 +00:00
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u8 entry_size;
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struct clp_fh_list_entry fh_list[CLP_FH_LIST_NR_ENTRIES];
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} __packed;
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/* Query PCI function request */
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struct clp_req_query_pci {
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struct clp_req_hdr hdr;
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u32 fh; /* function handle */
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u32 reserved2;
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u64 reserved3;
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} __packed;
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/* Query PCI function response */
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struct clp_rsp_query_pci {
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struct clp_rsp_hdr hdr;
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u16 vfn; /* virtual fn number */
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u16 : 7;
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u16 util_str_avail : 1; /* utility string available? */
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u16 pfgid : 8; /* pci function group id */
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u32 fid; /* pci function id */
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u8 bar_size[PCI_BAR_COUNT];
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u16 pchid;
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2016-12-17 14:35:39 +00:00
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__le32 bar[PCI_BAR_COUNT];
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2014-04-16 14:12:05 +00:00
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u8 pfip[CLP_PFIP_NR_SEGMENTS]; /* pci function internal path */
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2016-06-15 11:07:51 +00:00
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u32 : 16;
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u8 fmb_len;
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2014-04-16 14:12:05 +00:00
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u8 pft; /* pci function type */
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2012-11-29 11:55:21 +00:00
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u64 sdma; /* start dma as */
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u64 edma; /* end dma as */
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2014-04-16 14:12:05 +00:00
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u32 reserved[11];
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u32 uid; /* user defined id */
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2012-11-29 11:55:21 +00:00
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u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */
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} __packed;
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/* Query PCI function group request */
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struct clp_req_query_pci_grp {
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struct clp_req_hdr hdr;
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2016-01-13 11:54:28 +00:00
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u32 reserved2 : 24;
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2012-11-29 11:55:21 +00:00
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u32 pfgid : 8; /* function group id */
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2016-01-13 11:54:28 +00:00
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u32 reserved3;
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u64 reserved4;
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2012-11-29 11:55:21 +00:00
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} __packed;
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/* Query PCI function group response */
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struct clp_rsp_query_pci_grp {
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struct clp_rsp_hdr hdr;
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u16 : 4;
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u16 noi : 12; /* number of interrupts */
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u8 version;
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u8 : 6;
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u8 frame : 1;
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u8 refresh : 1; /* TLB refresh mode */
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u16 reserved2;
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u16 mui;
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u64 reserved3;
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u64 dasm; /* dma address space mask */
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u64 msia; /* MSI address */
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u64 reserved4;
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u64 reserved5;
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} __packed;
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/* Set PCI function request */
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struct clp_req_set_pci {
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struct clp_req_hdr hdr;
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u32 fh; /* function handle */
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u16 reserved2;
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u8 oc; /* operation controls */
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u8 ndas; /* number of dma spaces */
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u64 reserved3;
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} __packed;
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/* Set PCI function response */
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struct clp_rsp_set_pci {
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struct clp_rsp_hdr hdr;
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u32 fh; /* function handle */
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u32 reserved3;
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u64 reserved4;
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} __packed;
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/* Combined request/response block structures used by clp insn */
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struct clp_req_rsp_list_pci {
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struct clp_req_list_pci request;
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struct clp_rsp_list_pci response;
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} __packed;
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struct clp_req_rsp_set_pci {
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struct clp_req_set_pci request;
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struct clp_rsp_set_pci response;
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} __packed;
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struct clp_req_rsp_query_pci {
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struct clp_req_query_pci request;
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struct clp_rsp_query_pci response;
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} __packed;
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struct clp_req_rsp_query_pci_grp {
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struct clp_req_query_pci_grp request;
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struct clp_rsp_query_pci_grp response;
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} __packed;
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#endif
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