2010-03-16 17:23:29 +00:00
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/******************************************************************************
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*
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* GPL LICENSE SUMMARY
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*
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2011-12-27 19:21:32 +00:00
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* Copyright(c) 2008 - 2012 Intel Corporation. All rights reserved.
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2010-03-16 17:23:29 +00:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
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* USA
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*
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* Contact Information:
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* Intel Linux Wireless <ilw@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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*****************************************************************************/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include "iwl-dev.h"
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#include "iwl-core.h"
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2010-03-16 17:23:30 +00:00
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#include "iwl-io.h"
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2010-03-17 00:41:23 +00:00
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#include "iwl-agn-hw.h"
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2010-03-16 19:37:24 +00:00
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#include "iwl-agn.h"
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2010-09-22 16:02:11 +00:00
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#include "iwl-agn-calib.h"
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2011-07-08 15:46:16 +00:00
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#include "iwl-trans.h"
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2011-08-26 06:11:11 +00:00
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#include "iwl-fh.h"
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2012-02-09 14:08:15 +00:00
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#include "iwl-op-mode.h"
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2010-03-16 19:37:24 +00:00
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2010-04-27 21:10:00 +00:00
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static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
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{COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
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0, COEX_UNASSOC_IDLE_FLAGS},
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{COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
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0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
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{COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
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0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
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{COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
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0, COEX_CALIBRATION_FLAGS},
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{COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
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0, COEX_PERIODIC_CALIBRATION_FLAGS},
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{COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
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0, COEX_CONNECTION_ESTAB_FLAGS},
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{COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
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0, COEX_ASSOCIATED_IDLE_FLAGS},
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{COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
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0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
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{COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
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0, COEX_ASSOC_AUTO_SCAN_FLAGS},
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{COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
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0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
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{COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
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{COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
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{COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
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0, COEX_STAND_ALONE_DEBUG_FLAGS},
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{COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
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0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
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{COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
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{COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
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};
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2011-11-10 14:55:10 +00:00
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/******************************************************************************
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*
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* uCode download functions
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*
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******************************************************************************/
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2012-03-06 21:30:37 +00:00
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static inline const struct fw_img *
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iwl_get_ucode_image(struct iwl_priv *priv, enum iwl_ucode_type ucode_type)
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2011-11-10 14:55:08 +00:00
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{
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2012-03-10 21:00:14 +00:00
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if (ucode_type >= IWL_UCODE_TYPE_MAX)
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return NULL;
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return &priv->fw->img[ucode_type];
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2011-11-10 14:55:08 +00:00
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}
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2010-03-16 19:37:24 +00:00
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/*
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* Calibration
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*/
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2012-03-06 21:30:36 +00:00
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static int iwl_set_Xtal_calib(struct iwl_priv *priv)
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2010-03-16 19:37:24 +00:00
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{
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struct iwl_calib_xtal_freq_cmd cmd;
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__le16 *xtal_calib =
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2012-03-06 21:30:36 +00:00
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(__le16 *)iwl_eeprom_query_addr(priv->shrd, EEPROM_XTAL);
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2010-03-16 19:37:24 +00:00
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2011-06-06 21:26:43 +00:00
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iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD);
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2010-03-16 19:37:24 +00:00
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cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
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cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
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2012-03-06 21:30:36 +00:00
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return iwl_calib_set(priv, (void *)&cmd, sizeof(cmd));
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2010-03-16 19:37:24 +00:00
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}
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2012-03-06 21:30:36 +00:00
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static int iwl_set_temperature_offset_calib(struct iwl_priv *priv)
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2010-09-21 23:54:01 +00:00
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{
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struct iwl_calib_temperature_offset_cmd cmd;
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__le16 *offset_calib =
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2012-03-06 21:30:36 +00:00
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(__le16 *)iwl_eeprom_query_addr(priv->shrd,
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2011-11-30 23:37:32 +00:00
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EEPROM_RAW_TEMPERATURE);
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2011-06-06 21:26:43 +00:00
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memset(&cmd, 0, sizeof(cmd));
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iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
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2011-09-12 19:08:25 +00:00
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memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(*offset_calib));
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2010-09-21 23:54:01 +00:00
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if (!(cmd.radio_sensor_offset))
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cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
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2011-06-06 21:26:43 +00:00
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2012-03-06 21:30:36 +00:00
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IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n",
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2011-07-08 21:29:48 +00:00
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le16_to_cpu(cmd.radio_sensor_offset));
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2012-03-06 21:30:36 +00:00
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return iwl_calib_set(priv, (void *)&cmd, sizeof(cmd));
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2010-09-21 23:54:01 +00:00
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}
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2012-03-06 21:30:36 +00:00
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static int iwl_set_temperature_offset_calib_v2(struct iwl_priv *priv)
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2011-09-15 18:46:50 +00:00
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{
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struct iwl_calib_temperature_offset_v2_cmd cmd;
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2012-03-06 21:30:36 +00:00
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__le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(priv->shrd,
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2011-09-15 18:46:50 +00:00
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EEPROM_KELVIN_TEMPERATURE);
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__le16 *offset_calib_low =
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2012-03-06 21:30:36 +00:00
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(__le16 *)iwl_eeprom_query_addr(priv->shrd,
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2011-11-30 23:37:32 +00:00
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EEPROM_RAW_TEMPERATURE);
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2011-09-15 18:46:51 +00:00
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struct iwl_eeprom_calib_hdr *hdr;
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2011-09-15 18:46:50 +00:00
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memset(&cmd, 0, sizeof(cmd));
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iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
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2012-03-06 21:30:36 +00:00
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hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv->shrd,
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2011-09-15 18:46:51 +00:00
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EEPROM_CALIB_ALL);
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2011-09-15 18:46:50 +00:00
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memcpy(&cmd.radio_sensor_offset_high, offset_calib_high,
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2011-09-15 18:46:53 +00:00
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sizeof(*offset_calib_high));
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2011-09-15 18:46:50 +00:00
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memcpy(&cmd.radio_sensor_offset_low, offset_calib_low,
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2011-09-15 18:46:53 +00:00
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sizeof(*offset_calib_low));
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2011-09-15 18:46:50 +00:00
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if (!(cmd.radio_sensor_offset_low)) {
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2012-03-06 21:30:36 +00:00
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IWL_DEBUG_CALIB(priv, "no info in EEPROM, use default\n");
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2011-09-15 18:46:50 +00:00
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cmd.radio_sensor_offset_low = DEFAULT_RADIO_SENSOR_OFFSET;
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cmd.radio_sensor_offset_high = DEFAULT_RADIO_SENSOR_OFFSET;
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}
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2011-09-15 18:46:51 +00:00
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memcpy(&cmd.burntVoltageRef, &hdr->voltage,
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sizeof(hdr->voltage));
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2011-09-15 18:46:50 +00:00
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2012-03-06 21:30:36 +00:00
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IWL_DEBUG_CALIB(priv, "Radio sensor offset high: %d\n",
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2011-09-15 18:46:50 +00:00
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le16_to_cpu(cmd.radio_sensor_offset_high));
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2012-03-06 21:30:36 +00:00
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IWL_DEBUG_CALIB(priv, "Radio sensor offset low: %d\n",
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2011-09-15 18:46:50 +00:00
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le16_to_cpu(cmd.radio_sensor_offset_low));
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2012-03-06 21:30:36 +00:00
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IWL_DEBUG_CALIB(priv, "Voltage Ref: %d\n",
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2011-09-15 18:46:50 +00:00
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le16_to_cpu(cmd.burntVoltageRef));
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2012-03-06 21:30:36 +00:00
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return iwl_calib_set(priv, (void *)&cmd, sizeof(cmd));
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2011-09-15 18:46:50 +00:00
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}
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2012-03-06 21:30:36 +00:00
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static int iwl_send_calib_cfg(struct iwl_priv *priv)
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2010-03-16 19:37:24 +00:00
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{
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struct iwl_calib_cfg_cmd calib_cfg_cmd;
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struct iwl_host_cmd cmd = {
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.id = CALIBRATION_CFG_CMD,
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2011-05-04 14:50:38 +00:00
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.len = { sizeof(struct iwl_calib_cfg_cmd), },
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.data = { &calib_cfg_cmd, },
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2010-03-16 19:37:24 +00:00
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};
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memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
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calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
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calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL;
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calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL;
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2011-07-08 21:29:45 +00:00
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calib_cfg_cmd.ucd_calib_cfg.flags =
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IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK;
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2010-03-16 19:37:24 +00:00
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2012-03-06 21:30:39 +00:00
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return iwl_dvm_send_cmd(priv, &cmd);
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2010-03-16 19:37:24 +00:00
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}
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2011-09-20 22:37:23 +00:00
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int iwlagn_rx_calib_result(struct iwl_priv *priv,
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2012-03-05 19:24:39 +00:00
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struct iwl_rx_cmd_buffer *rxb,
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2011-09-20 22:37:23 +00:00
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struct iwl_device_cmd *cmd)
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2010-03-16 19:37:24 +00:00
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{
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struct iwl_rx_packet *pkt = rxb_addr(rxb);
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2012-03-06 21:31:02 +00:00
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struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->data;
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2010-03-16 19:37:24 +00:00
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int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
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/* reduce the size of the length field itself */
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len -= 4;
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2012-03-06 21:30:36 +00:00
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if (iwl_calib_set(priv, hdr, len))
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2011-11-17 16:51:57 +00:00
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IWL_ERR(priv, "Failed to record calibration data %d\n",
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hdr->op_code);
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2011-09-20 22:37:23 +00:00
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return 0;
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2010-03-16 19:37:24 +00:00
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}
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2012-03-06 21:30:36 +00:00
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int iwl_init_alive_start(struct iwl_priv *priv)
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2010-03-16 19:37:24 +00:00
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{
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2011-04-22 17:15:23 +00:00
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int ret;
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2010-03-16 19:37:24 +00:00
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2012-03-06 21:30:36 +00:00
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if (cfg(priv)->bt_params &&
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cfg(priv)->bt_params->advanced_bt_coexist) {
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2010-08-23 22:24:49 +00:00
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/*
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* Tell uCode we are ready to perform calibration
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* need to perform this before any calibration
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* no need to close the envlope since we are going
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* to load the runtime uCode later.
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*/
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2012-03-06 21:30:36 +00:00
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ret = iwl_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
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2010-08-23 22:24:49 +00:00
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BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
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2011-04-22 17:15:23 +00:00
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if (ret)
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return ret;
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2010-08-23 22:24:49 +00:00
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}
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2011-04-22 17:15:23 +00:00
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2012-03-06 21:30:36 +00:00
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ret = iwl_send_calib_cfg(priv);
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2011-04-22 17:15:23 +00:00
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if (ret)
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return ret;
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2010-09-21 23:54:01 +00:00
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/**
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* temperature offset calibration is only needed for runtime ucode,
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* so prepare the value now.
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*/
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2012-03-06 21:30:36 +00:00
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if (cfg(priv)->need_temp_offset_calib) {
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if (cfg(priv)->temp_offset_v2)
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return iwl_set_temperature_offset_calib_v2(priv);
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2011-09-15 18:46:50 +00:00
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else
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2012-03-06 21:30:36 +00:00
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return iwl_set_temperature_offset_calib(priv);
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2011-09-15 18:46:50 +00:00
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}
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2010-03-16 19:37:24 +00:00
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2011-04-22 17:15:23 +00:00
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return 0;
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2010-03-16 19:37:24 +00:00
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}
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2012-03-06 21:30:36 +00:00
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static int iwl_send_wimax_coex(struct iwl_priv *priv)
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2010-04-27 21:10:00 +00:00
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{
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struct iwl_wimax_coex_cmd coex_cmd;
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2012-03-06 21:30:36 +00:00
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if (cfg(priv)->base_params->support_wimax_coexist) {
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2010-04-27 21:10:00 +00:00
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/* UnMask wake up src at associated sleep */
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coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
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/* UnMask wake up src at unassociated sleep */
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coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
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memcpy(coex_cmd.sta_prio, cu_priorities,
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sizeof(struct iwl_wimax_coex_event_entry) *
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COEX_NUM_OF_EVENTS);
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/* enabling the coexistence feature */
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coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
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/* enabling the priorities tables */
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coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
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|
|
} else {
|
|
|
|
/* coexistence is disabled */
|
|
|
|
memset(&coex_cmd, 0, sizeof(coex_cmd));
|
|
|
|
}
|
2012-03-06 21:30:39 +00:00
|
|
|
return iwl_dvm_send_cmd_pdu(priv,
|
2011-07-08 15:46:14 +00:00
|
|
|
COEX_PRIORITY_TABLE_CMD, CMD_SYNC,
|
2010-04-27 21:10:00 +00:00
|
|
|
sizeof(coex_cmd), &coex_cmd);
|
|
|
|
}
|
|
|
|
|
2011-11-28 22:35:14 +00:00
|
|
|
static const u8 iwl_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = {
|
2010-08-23 14:57:05 +00:00
|
|
|
((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
|
|
|
|
(0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
|
|
|
|
((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
|
|
|
|
(1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
|
|
|
|
((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
|
|
|
|
(0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
|
|
|
|
((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
|
|
|
|
(1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
|
|
|
|
((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
|
|
|
|
(0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
|
|
|
|
((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
|
|
|
|
(1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
|
|
|
|
((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
|
|
|
|
(0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
|
|
|
|
((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
|
|
|
|
(0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
|
|
|
|
((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
|
|
|
|
(0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
|
|
|
|
0, 0, 0, 0, 0, 0, 0
|
|
|
|
};
|
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
void iwl_send_prio_tbl(struct iwl_priv *priv)
|
2010-08-23 14:57:05 +00:00
|
|
|
{
|
|
|
|
struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd;
|
|
|
|
|
2011-11-28 22:35:14 +00:00
|
|
|
memcpy(prio_tbl_cmd.prio_tbl, iwl_bt_prio_tbl,
|
|
|
|
sizeof(iwl_bt_prio_tbl));
|
2012-03-06 21:30:39 +00:00
|
|
|
if (iwl_dvm_send_cmd_pdu(priv,
|
2011-07-08 15:46:14 +00:00
|
|
|
REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC,
|
2010-08-23 14:57:05 +00:00
|
|
|
sizeof(prio_tbl_cmd), &prio_tbl_cmd))
|
2012-03-06 21:30:36 +00:00
|
|
|
IWL_ERR(priv, "failed to send BT prio tbl command\n");
|
2010-08-23 14:57:05 +00:00
|
|
|
}
|
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
int iwl_send_bt_env(struct iwl_priv *priv, u8 action, u8 type)
|
2010-08-23 14:57:05 +00:00
|
|
|
{
|
|
|
|
struct iwl_bt_coex_prot_env_cmd env_cmd;
|
2011-04-22 17:15:23 +00:00
|
|
|
int ret;
|
2010-08-23 14:57:05 +00:00
|
|
|
|
|
|
|
env_cmd.action = action;
|
|
|
|
env_cmd.type = type;
|
2012-03-06 21:30:39 +00:00
|
|
|
ret = iwl_dvm_send_cmd_pdu(priv,
|
2011-07-08 15:46:14 +00:00
|
|
|
REPLY_BT_COEX_PROT_ENV, CMD_SYNC,
|
2011-04-22 17:15:23 +00:00
|
|
|
sizeof(env_cmd), &env_cmd);
|
|
|
|
if (ret)
|
2012-03-06 21:30:36 +00:00
|
|
|
IWL_ERR(priv, "failed to send BT env command\n");
|
2011-04-22 17:15:23 +00:00
|
|
|
return ret;
|
2010-08-23 14:57:05 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
static int iwl_alive_notify(struct iwl_priv *priv)
|
2010-03-16 19:37:24 +00:00
|
|
|
{
|
2011-04-05 16:42:01 +00:00
|
|
|
int ret;
|
2010-03-16 19:37:24 +00:00
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
iwl_trans_fw_alive(trans(priv));
|
2012-03-07 17:52:16 +00:00
|
|
|
|
|
|
|
priv->passive_no_rx = false;
|
|
|
|
priv->transport_queue_stop = 0;
|
2010-11-18 11:47:38 +00:00
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
ret = iwl_send_wimax_coex(priv);
|
2011-04-05 16:42:01 +00:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2011-12-16 15:07:36 +00:00
|
|
|
if (!cfg(priv)->no_xtal_calib) {
|
2012-03-06 21:30:36 +00:00
|
|
|
ret = iwl_set_Xtal_calib(priv);
|
2011-11-17 16:51:53 +00:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
2010-03-16 19:37:24 +00:00
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
return iwl_send_calib_results(priv);
|
2010-03-16 19:37:24 +00:00
|
|
|
}
|
2010-05-10 21:15:25 +00:00
|
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
* iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
|
|
|
|
* using sample data 100 bytes apart. If these sample points are good,
|
|
|
|
* it's a pretty good bet that everything between them is good, too.
|
|
|
|
*/
|
2012-03-10 21:00:14 +00:00
|
|
|
static int iwl_verify_sec_sparse(struct iwl_priv *priv,
|
2012-03-06 21:30:37 +00:00
|
|
|
const struct fw_desc *fw_desc)
|
2010-05-10 21:15:25 +00:00
|
|
|
{
|
2011-04-05 16:41:56 +00:00
|
|
|
__le32 *image = (__le32 *)fw_desc->v_addr;
|
|
|
|
u32 len = fw_desc->len;
|
2010-05-10 21:15:25 +00:00
|
|
|
u32 val;
|
|
|
|
u32 i;
|
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
|
2010-05-10 21:15:25 +00:00
|
|
|
|
|
|
|
for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
|
|
|
|
/* read data comes through single port, auto-incr addr */
|
|
|
|
/* NOTE: Use the debugless read so we don't flood kernel log
|
|
|
|
* if IWL_DL_IO is set */
|
2012-03-06 21:30:36 +00:00
|
|
|
iwl_write_direct32(trans(priv), HBUS_TARG_MEM_RADDR,
|
2012-03-10 21:00:14 +00:00
|
|
|
i + fw_desc->offset);
|
2012-03-06 21:30:36 +00:00
|
|
|
val = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
|
2011-04-05 16:41:55 +00:00
|
|
|
if (val != le32_to_cpu(*image))
|
|
|
|
return -EIO;
|
2010-05-10 21:15:25 +00:00
|
|
|
}
|
|
|
|
|
2011-04-05 16:41:55 +00:00
|
|
|
return 0;
|
2010-05-10 21:15:25 +00:00
|
|
|
}
|
|
|
|
|
2012-03-10 21:00:14 +00:00
|
|
|
static void iwl_print_mismatch_sec(struct iwl_priv *priv,
|
2012-03-06 21:30:37 +00:00
|
|
|
const struct fw_desc *fw_desc)
|
2010-05-10 21:15:25 +00:00
|
|
|
{
|
2011-04-05 16:41:56 +00:00
|
|
|
__le32 *image = (__le32 *)fw_desc->v_addr;
|
|
|
|
u32 len = fw_desc->len;
|
2010-05-10 21:15:25 +00:00
|
|
|
u32 val;
|
2011-04-05 16:41:55 +00:00
|
|
|
u32 offs;
|
|
|
|
int errors = 0;
|
2010-05-10 21:15:25 +00:00
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
|
2010-05-10 21:15:25 +00:00
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
iwl_write_direct32(trans(priv), HBUS_TARG_MEM_RADDR,
|
2012-03-10 21:00:14 +00:00
|
|
|
fw_desc->offset);
|
2010-05-10 21:15:25 +00:00
|
|
|
|
2011-04-05 16:41:55 +00:00
|
|
|
for (offs = 0;
|
|
|
|
offs < len && errors < 20;
|
|
|
|
offs += sizeof(u32), image++) {
|
2010-05-10 21:15:25 +00:00
|
|
|
/* read data comes through single port, auto-incr addr */
|
2012-03-06 21:30:36 +00:00
|
|
|
val = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
|
2010-05-10 21:15:25 +00:00
|
|
|
if (val != le32_to_cpu(*image)) {
|
2012-03-06 21:30:36 +00:00
|
|
|
IWL_ERR(priv, "uCode INST section at "
|
2011-04-05 16:41:55 +00:00
|
|
|
"offset 0x%x, is 0x%x, s/b 0x%x\n",
|
|
|
|
offs, val, le32_to_cpu(*image));
|
|
|
|
errors++;
|
2010-05-10 21:15:25 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* iwl_verify_ucode - determine which instruction image is in SRAM,
|
|
|
|
* and verify its contents
|
|
|
|
*/
|
2012-03-06 21:30:36 +00:00
|
|
|
static int iwl_verify_ucode(struct iwl_priv *priv,
|
2011-11-10 14:55:10 +00:00
|
|
|
enum iwl_ucode_type ucode_type)
|
2010-05-10 21:15:25 +00:00
|
|
|
{
|
2012-03-06 21:30:37 +00:00
|
|
|
const struct fw_img *img = iwl_get_ucode_image(priv, ucode_type);
|
2011-11-10 14:55:09 +00:00
|
|
|
|
|
|
|
if (!img) {
|
2012-03-06 21:30:36 +00:00
|
|
|
IWL_ERR(priv, "Invalid ucode requested (%d)\n", ucode_type);
|
2011-11-10 14:55:09 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2012-03-10 21:00:14 +00:00
|
|
|
if (!iwl_verify_sec_sparse(priv, &img->sec[IWL_UCODE_SECTION_INST])) {
|
2012-03-06 21:30:36 +00:00
|
|
|
IWL_DEBUG_FW(priv, "uCode is good in inst SRAM\n");
|
2010-05-10 21:15:25 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
IWL_ERR(priv, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n");
|
2011-04-05 16:41:55 +00:00
|
|
|
|
2012-03-10 21:00:14 +00:00
|
|
|
iwl_print_mismatch_sec(priv, &img->sec[IWL_UCODE_SECTION_INST]);
|
2011-04-05 16:41:55 +00:00
|
|
|
return -EIO;
|
2010-05-10 21:15:25 +00:00
|
|
|
}
|
2011-04-22 17:15:23 +00:00
|
|
|
|
2011-12-07 16:50:46 +00:00
|
|
|
struct iwl_alive_data {
|
2011-04-22 17:15:23 +00:00
|
|
|
bool valid;
|
|
|
|
u8 subtype;
|
|
|
|
};
|
|
|
|
|
2012-03-06 21:30:58 +00:00
|
|
|
static void iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
|
2011-04-22 17:15:23 +00:00
|
|
|
struct iwl_rx_packet *pkt,
|
|
|
|
void *data)
|
|
|
|
{
|
2012-03-06 21:30:58 +00:00
|
|
|
struct iwl_priv *priv =
|
|
|
|
container_of(notif_wait, struct iwl_priv, notif_wait);
|
2011-12-07 16:50:46 +00:00
|
|
|
struct iwl_alive_data *alive_data = data;
|
2011-04-22 17:15:23 +00:00
|
|
|
struct iwl_alive_resp *palive;
|
|
|
|
|
2012-03-06 21:31:02 +00:00
|
|
|
palive = (void *)pkt->data;
|
2011-04-22 17:15:23 +00:00
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
IWL_DEBUG_FW(priv, "Alive ucode status 0x%08X revision "
|
2011-04-22 17:15:23 +00:00
|
|
|
"0x%01X 0x%01X\n",
|
|
|
|
palive->is_valid, palive->ver_type,
|
|
|
|
palive->ver_subtype);
|
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
priv->shrd->device_pointers.error_event_table =
|
2011-04-22 17:15:23 +00:00
|
|
|
le32_to_cpu(palive->error_event_table_ptr);
|
2012-03-06 21:30:36 +00:00
|
|
|
priv->shrd->device_pointers.log_event_table =
|
2011-04-22 17:15:23 +00:00
|
|
|
le32_to_cpu(palive->log_event_table_ptr);
|
|
|
|
|
|
|
|
alive_data->subtype = palive->ver_subtype;
|
|
|
|
alive_data->valid = palive->is_valid == UCODE_VALID_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define UCODE_ALIVE_TIMEOUT HZ
|
|
|
|
#define UCODE_CALIB_TIMEOUT (2*HZ)
|
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
int iwl_load_ucode_wait_alive(struct iwl_priv *priv,
|
2011-11-10 14:55:10 +00:00
|
|
|
enum iwl_ucode_type ucode_type)
|
2011-04-22 17:15:23 +00:00
|
|
|
{
|
|
|
|
struct iwl_notification_wait alive_wait;
|
2011-12-07 16:50:46 +00:00
|
|
|
struct iwl_alive_data alive_data;
|
2012-03-06 21:30:37 +00:00
|
|
|
const struct fw_img *fw;
|
2011-04-22 17:15:23 +00:00
|
|
|
int ret;
|
2011-11-10 14:55:10 +00:00
|
|
|
enum iwl_ucode_type old_type;
|
2011-04-22 17:15:23 +00:00
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
old_type = priv->shrd->ucode_type;
|
|
|
|
priv->shrd->ucode_type = ucode_type;
|
|
|
|
fw = iwl_get_ucode_image(priv, ucode_type);
|
2011-04-22 17:15:23 +00:00
|
|
|
|
2012-03-10 21:00:10 +00:00
|
|
|
priv->ucode_loaded = false;
|
|
|
|
|
2012-01-08 14:33:58 +00:00
|
|
|
if (!fw)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2012-03-06 21:30:58 +00:00
|
|
|
iwl_init_notification_wait(&priv->notif_wait, &alive_wait, REPLY_ALIVE,
|
2012-03-06 21:30:57 +00:00
|
|
|
iwl_alive_fn, &alive_data);
|
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
ret = iwl_trans_start_fw(trans(priv), fw);
|
2011-04-22 17:15:23 +00:00
|
|
|
if (ret) {
|
2012-03-06 21:30:36 +00:00
|
|
|
priv->shrd->ucode_type = old_type;
|
2012-03-06 21:30:58 +00:00
|
|
|
iwl_remove_notification(&priv->notif_wait, &alive_wait);
|
2011-04-22 17:15:23 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Some things may run in the background now, but we
|
|
|
|
* just wait for the ALIVE notification here.
|
|
|
|
*/
|
2012-03-06 21:30:58 +00:00
|
|
|
ret = iwl_wait_notification(&priv->notif_wait, &alive_wait,
|
2011-11-29 00:13:19 +00:00
|
|
|
UCODE_ALIVE_TIMEOUT);
|
2011-04-22 17:15:23 +00:00
|
|
|
if (ret) {
|
2012-03-06 21:30:36 +00:00
|
|
|
priv->shrd->ucode_type = old_type;
|
2011-04-22 17:15:23 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!alive_data.valid) {
|
2012-03-06 21:30:36 +00:00
|
|
|
IWL_ERR(priv, "Loaded ucode is not valid!\n");
|
|
|
|
priv->shrd->ucode_type = old_type;
|
2011-04-22 17:15:23 +00:00
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
|
2011-07-15 20:23:45 +00:00
|
|
|
/*
|
|
|
|
* This step takes a long time (60-80ms!!) and
|
|
|
|
* WoWLAN image should be loaded quickly, so
|
|
|
|
* skip it for WoWLAN.
|
|
|
|
*/
|
|
|
|
if (ucode_type != IWL_UCODE_WOWLAN) {
|
2012-03-06 21:30:36 +00:00
|
|
|
ret = iwl_verify_ucode(priv, ucode_type);
|
2011-07-15 20:23:45 +00:00
|
|
|
if (ret) {
|
2012-03-06 21:30:36 +00:00
|
|
|
priv->shrd->ucode_type = old_type;
|
2011-07-15 20:23:45 +00:00
|
|
|
return ret;
|
|
|
|
}
|
2011-04-22 17:15:23 +00:00
|
|
|
|
2011-07-15 20:23:45 +00:00
|
|
|
/* delay a bit to give rfkill time to run */
|
|
|
|
msleep(5);
|
|
|
|
}
|
2011-04-22 17:15:23 +00:00
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
ret = iwl_alive_notify(priv);
|
2011-04-22 17:15:23 +00:00
|
|
|
if (ret) {
|
2012-03-06 21:30:36 +00:00
|
|
|
IWL_WARN(priv,
|
2011-04-22 17:15:23 +00:00
|
|
|
"Could not complete ALIVE transition: %d\n", ret);
|
2012-03-06 21:30:36 +00:00
|
|
|
priv->shrd->ucode_type = old_type;
|
2011-04-22 17:15:23 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-03-10 21:00:10 +00:00
|
|
|
priv->ucode_loaded = true;
|
|
|
|
|
2011-04-22 17:15:23 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
int iwl_run_init_ucode(struct iwl_priv *priv)
|
2011-04-22 17:15:23 +00:00
|
|
|
{
|
|
|
|
struct iwl_notification_wait calib_wait;
|
|
|
|
int ret;
|
|
|
|
|
2012-03-06 21:30:42 +00:00
|
|
|
lockdep_assert_held(&priv->mutex);
|
2011-04-22 17:15:23 +00:00
|
|
|
|
|
|
|
/* No init ucode required? Curious, but maybe ok */
|
2012-03-10 21:00:14 +00:00
|
|
|
if (!priv->fw->img[IWL_UCODE_INIT].sec[0].len)
|
2011-04-22 17:15:23 +00:00
|
|
|
return 0;
|
|
|
|
|
2012-03-10 21:00:11 +00:00
|
|
|
if (priv->init_ucode_run)
|
2011-04-22 17:15:23 +00:00
|
|
|
return 0;
|
|
|
|
|
2012-03-06 21:30:58 +00:00
|
|
|
iwl_init_notification_wait(&priv->notif_wait, &calib_wait,
|
2011-04-22 17:15:23 +00:00
|
|
|
CALIBRATION_COMPLETE_NOTIFICATION,
|
|
|
|
NULL, NULL);
|
|
|
|
|
|
|
|
/* Will also start the device */
|
2012-03-06 21:30:36 +00:00
|
|
|
ret = iwl_load_ucode_wait_alive(priv, IWL_UCODE_INIT);
|
2011-04-22 17:15:23 +00:00
|
|
|
if (ret)
|
|
|
|
goto error;
|
|
|
|
|
2012-03-06 21:30:36 +00:00
|
|
|
ret = iwl_init_alive_start(priv);
|
2011-04-22 17:15:23 +00:00
|
|
|
if (ret)
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Some things may run in the background now, but we
|
|
|
|
* just wait for the calibration complete notification.
|
|
|
|
*/
|
2012-03-06 21:30:58 +00:00
|
|
|
ret = iwl_wait_notification(&priv->notif_wait, &calib_wait,
|
2011-11-29 00:13:19 +00:00
|
|
|
UCODE_CALIB_TIMEOUT);
|
2012-03-10 21:00:11 +00:00
|
|
|
if (!ret)
|
|
|
|
priv->init_ucode_run = true;
|
2011-04-22 17:15:23 +00:00
|
|
|
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
error:
|
2012-03-06 21:30:58 +00:00
|
|
|
iwl_remove_notification(&priv->notif_wait, &calib_wait);
|
2011-04-22 17:15:23 +00:00
|
|
|
out:
|
|
|
|
/* Whatever happened, stop the device */
|
2012-03-06 21:30:36 +00:00
|
|
|
iwl_trans_stop_device(trans(priv));
|
2012-03-10 21:00:10 +00:00
|
|
|
priv->ucode_loaded = false;
|
|
|
|
|
2011-04-22 17:15:23 +00:00
|
|
|
return ret;
|
|
|
|
}
|