2018-07-21 13:31:39 +00:00
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// SPDX-License-Identifier: GPL-2.0
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2008-09-18 09:57:15 +00:00
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/* sercos3: UIO driver for the Automata Sercos III PCI card
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Copyright (C) 2008 Linutronix GmbH
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Author: John Ogness <john.ogness@linutronix.de>
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This is a straight-forward UIO driver, where interrupts are disabled
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by the interrupt handler and re-enabled via a write to the UIO device
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by the userspace-part.
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The only part that may seem odd is the use of a logical OR when
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storing and restoring enabled interrupts. This is done because the
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userspace-part could directly modify the Interrupt Enable Register
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at any time. To reduce possible conflicts, the kernel driver uses
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a logical OR to make more controlled changes (rather than blindly
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overwriting previous values).
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Race conditions exist if the userspace-part directly modifies the
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Interrupt Enable Register while in operation. The consequences are
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that certain interrupts would fail to be enabled or disabled. For
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this reason, the userspace-part should only directly modify the
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Interrupt Enable Register at the beginning (to get things going).
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The userspace-part can safely disable interrupts at any time using
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a write to the UIO device.
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*/
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/uio_driver.h>
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#include <linux/io.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
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#include <linux/slab.h>
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2008-09-18 09:57:15 +00:00
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/* ID's for SERCOS III PCI card (PLX 9030) */
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#define SERCOS_SUB_VENDOR_ID 0x1971
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#define SERCOS_SUB_SYSID_3530 0x3530
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#define SERCOS_SUB_SYSID_3535 0x3535
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#define SERCOS_SUB_SYSID_3780 0x3780
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/* Interrupt Enable Register */
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#define IER0_OFFSET 0x08
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/* Interrupt Status Register */
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#define ISR0_OFFSET 0x18
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struct sercos3_priv {
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u32 ier0_cache;
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spinlock_t ier0_cache_lock;
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};
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/* this function assumes ier0_cache_lock is locked! */
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static void sercos3_disable_interrupts(struct uio_info *info,
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struct sercos3_priv *priv)
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{
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void __iomem *ier0 = info->mem[3].internal_addr + IER0_OFFSET;
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/* add enabled interrupts to cache */
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priv->ier0_cache |= ioread32(ier0);
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/* disable interrupts */
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iowrite32(0, ier0);
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}
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/* this function assumes ier0_cache_lock is locked! */
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static void sercos3_enable_interrupts(struct uio_info *info,
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struct sercos3_priv *priv)
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{
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void __iomem *ier0 = info->mem[3].internal_addr + IER0_OFFSET;
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/* restore previously enabled interrupts */
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iowrite32(ioread32(ier0) | priv->ier0_cache, ier0);
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priv->ier0_cache = 0;
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}
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static irqreturn_t sercos3_handler(int irq, struct uio_info *info)
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{
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struct sercos3_priv *priv = info->priv;
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void __iomem *isr0 = info->mem[3].internal_addr + ISR0_OFFSET;
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void __iomem *ier0 = info->mem[3].internal_addr + IER0_OFFSET;
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if (!(ioread32(isr0) & ioread32(ier0)))
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return IRQ_NONE;
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spin_lock(&priv->ier0_cache_lock);
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sercos3_disable_interrupts(info, priv);
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spin_unlock(&priv->ier0_cache_lock);
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return IRQ_HANDLED;
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}
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static int sercos3_irqcontrol(struct uio_info *info, s32 irq_on)
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{
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struct sercos3_priv *priv = info->priv;
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spin_lock_irq(&priv->ier0_cache_lock);
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if (irq_on)
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sercos3_enable_interrupts(info, priv);
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else
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sercos3_disable_interrupts(info, priv);
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spin_unlock_irq(&priv->ier0_cache_lock);
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return 0;
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}
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static int sercos3_setup_iomem(struct pci_dev *dev, struct uio_info *info,
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int n, int pci_bar)
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{
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info->mem[n].addr = pci_resource_start(dev, pci_bar);
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if (!info->mem[n].addr)
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return -1;
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info->mem[n].internal_addr = ioremap(pci_resource_start(dev, pci_bar),
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pci_resource_len(dev, pci_bar));
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if (!info->mem[n].internal_addr)
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return -1;
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info->mem[n].size = pci_resource_len(dev, pci_bar);
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info->mem[n].memtype = UIO_MEM_PHYS;
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return 0;
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}
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2012-11-19 18:21:49 +00:00
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static int sercos3_pci_probe(struct pci_dev *dev,
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2008-09-18 09:57:15 +00:00
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const struct pci_device_id *id)
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{
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struct uio_info *info;
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struct sercos3_priv *priv;
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int i;
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2020-11-20 08:42:05 +00:00
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info = devm_kzalloc(&dev->dev, sizeof(struct uio_info), GFP_KERNEL);
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2008-09-18 09:57:15 +00:00
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if (!info)
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return -ENOMEM;
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2020-11-20 08:42:05 +00:00
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priv = devm_kzalloc(&dev->dev, sizeof(struct sercos3_priv), GFP_KERNEL);
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2008-09-18 09:57:15 +00:00
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if (!priv)
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2020-11-20 08:42:05 +00:00
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return -ENOMEM;
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2008-09-18 09:57:15 +00:00
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if (pci_enable_device(dev))
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2020-11-20 08:42:05 +00:00
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return -ENODEV;
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2008-09-18 09:57:15 +00:00
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if (pci_request_regions(dev, "sercos3"))
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goto out_disable;
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/* we only need PCI BAR's 0, 2, 3, 4, 5 */
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if (sercos3_setup_iomem(dev, info, 0, 0))
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goto out_unmap;
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if (sercos3_setup_iomem(dev, info, 1, 2))
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goto out_unmap;
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if (sercos3_setup_iomem(dev, info, 2, 3))
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goto out_unmap;
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if (sercos3_setup_iomem(dev, info, 3, 4))
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goto out_unmap;
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if (sercos3_setup_iomem(dev, info, 4, 5))
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goto out_unmap;
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spin_lock_init(&priv->ier0_cache_lock);
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info->priv = priv;
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info->name = "Sercos_III_PCI";
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info->version = "0.0.1";
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info->irq = dev->irq;
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2010-06-09 23:15:49 +00:00
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info->irq_flags = IRQF_SHARED;
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2008-09-18 09:57:15 +00:00
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info->handler = sercos3_handler;
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info->irqcontrol = sercos3_irqcontrol;
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pci_set_drvdata(dev, info);
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if (uio_register_device(&dev->dev, info))
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goto out_unmap;
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return 0;
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out_unmap:
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for (i = 0; i < 5; i++) {
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if (info->mem[i].internal_addr)
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iounmap(info->mem[i].internal_addr);
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}
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pci_release_regions(dev);
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out_disable:
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pci_disable_device(dev);
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return -ENODEV;
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}
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static void sercos3_pci_remove(struct pci_dev *dev)
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{
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struct uio_info *info = pci_get_drvdata(dev);
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int i;
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uio_unregister_device(info);
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pci_release_regions(dev);
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pci_disable_device(dev);
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for (i = 0; i < 5; i++) {
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if (info->mem[i].internal_addr)
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iounmap(info->mem[i].internal_addr);
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}
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}
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2012-11-19 18:24:33 +00:00
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static struct pci_device_id sercos3_pci_ids[] = {
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2008-09-18 09:57:15 +00:00
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{
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.vendor = PCI_VENDOR_ID_PLX,
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.device = PCI_DEVICE_ID_PLX_9030,
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.subvendor = SERCOS_SUB_VENDOR_ID,
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.subdevice = SERCOS_SUB_SYSID_3530,
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},
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{
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.vendor = PCI_VENDOR_ID_PLX,
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.device = PCI_DEVICE_ID_PLX_9030,
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.subvendor = SERCOS_SUB_VENDOR_ID,
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.subdevice = SERCOS_SUB_SYSID_3535,
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},
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{
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.vendor = PCI_VENDOR_ID_PLX,
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.device = PCI_DEVICE_ID_PLX_9030,
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.subvendor = SERCOS_SUB_VENDOR_ID,
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.subdevice = SERCOS_SUB_SYSID_3780,
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},
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{ 0, }
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};
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static struct pci_driver sercos3_pci_driver = {
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.name = "sercos3",
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.id_table = sercos3_pci_ids,
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.probe = sercos3_pci_probe,
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.remove = sercos3_pci_remove,
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};
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2013-05-20 20:47:44 +00:00
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module_pci_driver(sercos3_pci_driver);
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2008-09-18 09:57:15 +00:00
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MODULE_DESCRIPTION("UIO driver for the Automata Sercos III PCI card");
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MODULE_AUTHOR("John Ogness <john.ogness@linutronix.de>");
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MODULE_LICENSE("GPL v2");
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