2007-07-10 12:03:43 +00:00
|
|
|
/*
|
|
|
|
* TI DaVinci GPIO Support
|
|
|
|
*
|
|
|
|
* Copyright (c) 2006 David Brownell
|
|
|
|
* Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License as published by
|
|
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
|
|
* (at your option) any later version.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef __DAVINCI_GPIO_H
|
|
|
|
#define __DAVINCI_GPIO_H
|
|
|
|
|
2007-10-29 23:15:46 +00:00
|
|
|
#include <linux/io.h>
|
2010-05-01 22:37:55 +00:00
|
|
|
#include <linux/spinlock.h>
|
|
|
|
|
2008-09-08 06:41:04 +00:00
|
|
|
#include <asm-generic/gpio.h>
|
2009-04-14 12:04:16 +00:00
|
|
|
|
[ARM] fix AT91, davinci, h720x, ks8695, msm, mx2, mx3, netx, omap1, omap2, pxa, s3c
arch/arm/mach-at91/at91cap9.c:337: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91rm9200.c:301: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9260.c:351: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9261.c:287: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9263.c:312: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9rl.c:304: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-h720x/h7202-eval.c:38: error: implicit declaration of function 'IRQ_CHAINED_GPIOB'
arch/arm/mach-ks8695/devices.c:46: error: 'KS8695_IRQ_WAN_RX_STATUS' undeclared here (not in a function)
arch/arm/mach-msm/devices.c:28: error: 'INT_UART1' undeclared here (not in a function)
arch/arm/mach-mx2/devices.c:233: error: 'MXC_GPIO_IRQ_START' undeclared here (not in a function)
arch/arm/mach-mx3/devices.c:128: error: 'MXC_GPIO_IRQ_START' undeclared here (not in a function)
arch/arm/mach-omap1/mcbsp.c:140: error: 'INT_730_McBSP1RX' undeclared here (not in a function)
arch/arm/mach-omap1/mcbsp.c:165: error: 'INT_McBSP1RX' undeclared here (not in a function)
arch/arm/mach-omap1/mcbsp.c:200: error: 'INT_McBSP1RX' undeclared here (not in a function)
arch/arm/mach-omap2/board-apollon.c:286: error: implicit declaration of function 'omap_set_gpio_direction'
arch/arm/mach-omap2/mcbsp.c:154: error: 'INT_24XX_MCBSP1_IRQ_RX' undeclared here (not in a function)
arch/arm/mach-omap2/mcbsp.c:181: error: 'INT_24XX_MCBSP1_IRQ_RX' undeclared here (not in a function)
arch/arm/mach-pxa/e350.c:36: error: 'IRQ_BOARD_START' undeclared here (not in a function)
arch/arm/plat-s3c/dev-i2c0.c:32: error: 'IRQ_IIC' undeclared here (not in a function)
...
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-01-08 10:01:47 +00:00
|
|
|
#include <mach/irqs.h>
|
2009-04-15 19:40:35 +00:00
|
|
|
#include <mach/common.h>
|
2007-10-29 23:15:46 +00:00
|
|
|
|
2009-04-14 12:04:16 +00:00
|
|
|
#define DAVINCI_GPIO_BASE 0x01C67000
|
|
|
|
|
2010-05-01 22:37:54 +00:00
|
|
|
enum davinci_gpio_type {
|
|
|
|
GPIO_TYPE_DAVINCI = 0,
|
|
|
|
};
|
|
|
|
|
2007-07-10 12:03:43 +00:00
|
|
|
/*
|
|
|
|
* basic gpio routines
|
|
|
|
*
|
|
|
|
* board-specific init should be done by arch/.../.../board-XXX.c (maybe
|
|
|
|
* initializing banks together) rather than boot loaders; kexec() won't
|
|
|
|
* go through boot loaders.
|
|
|
|
*
|
|
|
|
* the gpio clock will be turned on when gpios are used, and you may also
|
2008-12-07 19:46:23 +00:00
|
|
|
* need to pay attention to PINMUX registers to be sure those pins are
|
2007-07-10 12:03:43 +00:00
|
|
|
* used as gpios, not with other peripherals.
|
|
|
|
*
|
2008-09-08 06:41:04 +00:00
|
|
|
* On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation,
|
2008-12-07 19:46:23 +00:00
|
|
|
* and maybe for later updates, code may write GPIO(N). These may be
|
|
|
|
* all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip
|
|
|
|
* may not support all the GPIOs in that range.
|
2008-09-08 06:41:04 +00:00
|
|
|
*
|
|
|
|
* GPIOs can also be on external chips, numbered after the ones built-in
|
|
|
|
* to the DaVinci chip. For now, they won't be usable as IRQ sources.
|
2007-07-10 12:03:43 +00:00
|
|
|
*/
|
2008-12-07 19:46:23 +00:00
|
|
|
#define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
|
2007-07-10 12:03:43 +00:00
|
|
|
|
2009-08-13 16:11:56 +00:00
|
|
|
/* Convert GPIO signal to GPIO pin number */
|
|
|
|
#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
|
|
|
|
|
2010-05-01 22:37:52 +00:00
|
|
|
struct davinci_gpio_controller {
|
|
|
|
struct gpio_chip chip;
|
|
|
|
int irq_base;
|
2010-05-01 22:37:55 +00:00
|
|
|
spinlock_t lock;
|
2010-05-01 22:37:53 +00:00
|
|
|
void __iomem *regs;
|
|
|
|
void __iomem *set_data;
|
|
|
|
void __iomem *clr_data;
|
|
|
|
void __iomem *in_data;
|
2010-05-01 22:37:52 +00:00
|
|
|
};
|
|
|
|
|
2007-07-10 12:03:43 +00:00
|
|
|
/* The __gpio_to_controller() and __gpio_mask() functions inline to constants
|
|
|
|
* with constant parameters; or in outlined code they execute at runtime.
|
|
|
|
*
|
|
|
|
* You'd access the controller directly when reading or writing more than
|
|
|
|
* one gpio value at a time, and to support wired logic where the value
|
|
|
|
* being driven by the cpu need not match the value read back.
|
|
|
|
*
|
|
|
|
* These are NOT part of the cross-platform GPIO interface
|
|
|
|
*/
|
2010-05-01 22:37:53 +00:00
|
|
|
static inline struct davinci_gpio_controller *
|
2007-07-10 12:03:43 +00:00
|
|
|
__gpio_to_controller(unsigned gpio)
|
|
|
|
{
|
2010-05-01 22:37:53 +00:00
|
|
|
struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
|
|
|
|
int index = gpio / 32;
|
|
|
|
|
|
|
|
if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
return ctlrs + index;
|
2007-07-10 12:03:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline u32 __gpio_mask(unsigned gpio)
|
|
|
|
{
|
|
|
|
return 1 << (gpio % 32);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* The get/set/clear functions will inline when called with constant
|
2008-09-08 06:41:04 +00:00
|
|
|
* parameters referencing built-in GPIOs, for low-overhead bitbanging.
|
2007-07-10 12:03:43 +00:00
|
|
|
*
|
2008-09-08 06:41:04 +00:00
|
|
|
* Otherwise, calls with variable parameters or referencing external
|
|
|
|
* GPIOs (e.g. on GPIO expander chips) use outlined functions.
|
2007-07-10 12:03:43 +00:00
|
|
|
*/
|
|
|
|
static inline void gpio_set_value(unsigned gpio, int value)
|
|
|
|
{
|
2010-05-01 22:37:53 +00:00
|
|
|
if (__builtin_constant_p(value) && gpio < davinci_soc_info.gpio_num) {
|
|
|
|
struct davinci_gpio_controller *ctlr;
|
|
|
|
u32 mask;
|
2007-07-10 12:03:43 +00:00
|
|
|
|
2010-05-01 22:37:53 +00:00
|
|
|
ctlr = __gpio_to_controller(gpio);
|
2007-07-10 12:03:43 +00:00
|
|
|
mask = __gpio_mask(gpio);
|
|
|
|
if (value)
|
2010-05-01 22:37:53 +00:00
|
|
|
__raw_writel(mask, ctlr->set_data);
|
2007-07-10 12:03:43 +00:00
|
|
|
else
|
2010-05-01 22:37:53 +00:00
|
|
|
__raw_writel(mask, ctlr->clr_data);
|
2007-07-10 12:03:43 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2008-09-08 06:41:04 +00:00
|
|
|
__gpio_set_value(gpio, value);
|
2007-07-10 12:03:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Returns zero or nonzero; works for gpios configured as inputs OR
|
2008-09-08 06:41:04 +00:00
|
|
|
* as outputs, at least for built-in GPIOs.
|
2007-07-10 12:03:43 +00:00
|
|
|
*
|
2008-09-08 06:41:04 +00:00
|
|
|
* NOTE: for built-in GPIOs, changes in reported values are synchronized
|
|
|
|
* to the GPIO clock. This is easily seen after calling gpio_set_value()
|
|
|
|
* and then immediately gpio_get_value(), where the gpio_get_value() will
|
|
|
|
* return the old value until the GPIO clock ticks and the new value gets
|
|
|
|
* latched.
|
2007-07-10 12:03:43 +00:00
|
|
|
*/
|
|
|
|
static inline int gpio_get_value(unsigned gpio)
|
|
|
|
{
|
2010-05-01 22:37:53 +00:00
|
|
|
struct davinci_gpio_controller *ctlr;
|
2007-07-10 12:03:43 +00:00
|
|
|
|
2010-05-01 22:37:53 +00:00
|
|
|
if (!__builtin_constant_p(gpio) || gpio >= davinci_soc_info.gpio_num)
|
2008-09-08 06:41:04 +00:00
|
|
|
return __gpio_get_value(gpio);
|
2007-07-10 12:03:43 +00:00
|
|
|
|
2010-05-01 22:37:53 +00:00
|
|
|
ctlr = __gpio_to_controller(gpio);
|
|
|
|
return __gpio_mask(gpio) & __raw_readl(ctlr->in_data);
|
2007-07-10 12:03:43 +00:00
|
|
|
}
|
|
|
|
|
2008-09-08 06:41:04 +00:00
|
|
|
static inline int gpio_cansleep(unsigned gpio)
|
|
|
|
{
|
2010-05-01 22:37:53 +00:00
|
|
|
if (__builtin_constant_p(gpio) && gpio < davinci_soc_info.gpio_num)
|
2008-09-08 06:41:04 +00:00
|
|
|
return 0;
|
|
|
|
else
|
|
|
|
return __gpio_cansleep(gpio);
|
|
|
|
}
|
2007-07-10 12:03:43 +00:00
|
|
|
|
|
|
|
static inline int gpio_to_irq(unsigned gpio)
|
|
|
|
{
|
2009-06-26 00:01:31 +00:00
|
|
|
return __gpio_to_irq(gpio);
|
2007-07-10 12:03:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline int irq_to_gpio(unsigned irq)
|
|
|
|
{
|
2009-06-26 00:01:31 +00:00
|
|
|
/* don't support the reverse mapping */
|
|
|
|
return -ENOSYS;
|
2007-07-10 12:03:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* __DAVINCI_GPIO_H */
|