2005-04-16 22:20:36 +00:00
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/*
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* Written by: Garry Forsgren, Unisys Corporation
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* Natalie Protasevich, Unisys Corporation
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* This file contains the code to configure and interface
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* with Unisys ES7000 series hardware system manager.
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*
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* Copyright (c) 2003 Unisys Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it would be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write the Free Software Foundation, Inc., 59
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* Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* Contact information: Unisys Corporation, Township Line & Union Meeting
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* Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
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*
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* http://www.unisys.com
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/smp.h>
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#include <linux/string.h>
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#include <linux/spinlock.h>
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#include <linux/errno.h>
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#include <linux/notifier.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/acpi.h>
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#include <asm/io.h>
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#include <asm/nmi.h>
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#include <asm/smp.h>
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2008-11-18 16:14:14 +00:00
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#include <asm/atomic.h>
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2005-04-16 22:20:36 +00:00
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#include <asm/apicdef.h>
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2007-07-06 09:39:55 +00:00
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#include <mach_mpparse.h>
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2008-11-17 23:19:53 +00:00
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#include <asm/genapic.h>
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x86: fix wakeup_cpu with numaq/es7000, v2
Impact: fix secondary-CPU wakeup/init path with numaq and es7000
While looking at wakeup_secondary_cpu for WAKE_SECONDARY_VIA_NMI:
|#ifdef WAKE_SECONDARY_VIA_NMI
|/*
| * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
| * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
| * won't ... remember to clear down the APIC, etc later.
| */
|static int __devinit
|wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
|{
| unsigned long send_status, accept_status = 0;
| int maxlvt;
|...
| if (APIC_INTEGRATED(apic_version[phys_apicid])) {
| maxlvt = lapic_get_maxlvt();
I noticed that there is no warning about undefined phys_apicid...
because WAKE_SECONDARY_VIA_NMI and WAKE_SECONDARY_VIA_INIT can not be
defined at the same time. So NUMAQ is using wrong wakeup_secondary_cpu.
WAKE_SECONDARY_VIA_NMI, WAKE_SECONDARY_VIA_INIT and
WAKE_SECONDARY_VIA_MIP are variants of a weird and fragile
preprocessor-driven "HAL" mechanisms to specify the kind of secondary-CPU
wakeup strategy a given x86 kernel will use.
The vast majority of systems want to use INIT for secondary wakeup - NUMAQ
uses an NMI, (old-style-) ES7000 uses 'MIP' (a firmware driven in-memory
flag to let secondaries continue).
So convert these mechanisms to x86_quirks and add a
->wakeup_secondary_cpu() method to specify the rare exception
to the sane default.
Extend genapic accordingly as well, for 32-bit.
While looking further, I noticed that functions in wakecup.h for numaq
and es7000 are different to the default in mach_wakecpu.h - but smpboot.c
will only use default mach_wakecpu.h with smphook.h.
So we need to add mach_wakecpu.h for mach_generic, to properly support
numaq and es7000, and vectorize the following SMP init methods:
int trampoline_phys_low;
int trampoline_phys_high;
void (*wait_for_init_deassert)(atomic_t *deassert);
void (*smp_callin_clear_local_apic)(void);
void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
void (*inquire_remote_apic)(int apicid);
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-11-16 11:12:49 +00:00
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#include <asm/setup.h>
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2005-04-16 22:20:36 +00:00
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2008-08-28 06:01:16 +00:00
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/*
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* ES7000 chipsets
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*/
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#define NON_UNISYS 0
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#define ES7000_CLASSIC 1
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#define ES7000_ZORRO 2
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#define MIP_REG 1
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#define MIP_PSAI_REG 4
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#define MIP_BUSY 1
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#define MIP_SPIN 0xf0000
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#define MIP_VALID 0x0100000000000000ULL
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#define MIP_PORT(VALUE) ((VALUE >> 32) & 0xffff)
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#define MIP_RD_LO(VALUE) (VALUE & 0xffffffff)
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struct mip_reg_info {
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unsigned long long mip_info;
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unsigned long long delivery_info;
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unsigned long long host_reg;
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unsigned long long mip_reg;
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};
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struct part_info {
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unsigned char type;
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unsigned char length;
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unsigned char part_id;
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unsigned char apic_mode;
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unsigned long snum;
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char ptype[16];
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char sname[64];
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char pname[64];
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};
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struct psai {
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unsigned long long entry_type;
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unsigned long long addr;
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unsigned long long bep_addr;
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};
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struct es7000_mem_info {
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unsigned char type;
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unsigned char length;
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unsigned char resv[6];
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unsigned long long start;
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unsigned long long size;
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};
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struct es7000_oem_table {
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unsigned long long hdr;
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struct mip_reg_info mip;
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struct part_info pif;
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struct es7000_mem_info shm;
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struct psai psai;
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};
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#ifdef CONFIG_ACPI
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struct oem_table {
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struct acpi_table_header Header;
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u32 OEMTableAddr;
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u32 OEMTableSize;
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};
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extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
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2008-09-14 09:33:14 +00:00
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extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
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2008-08-28 06:01:16 +00:00
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#endif
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struct mip_reg {
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unsigned long long off_0;
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unsigned long long off_8;
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unsigned long long off_10;
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unsigned long long off_18;
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unsigned long long off_20;
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unsigned long long off_28;
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unsigned long long off_30;
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unsigned long long off_38;
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};
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#define MIP_SW_APIC 0x1020b
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#define MIP_FUNC(VALUE) (VALUE & 0xff)
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2005-04-16 22:20:36 +00:00
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/*
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* ES7000 Globals
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*/
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2007-10-17 16:04:37 +00:00
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static volatile unsigned long *psai = NULL;
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static struct mip_reg *mip_reg;
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static struct mip_reg *host_reg;
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static int mip_port;
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static unsigned long mip_addr, host_addr;
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2005-04-16 22:20:36 +00:00
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2008-05-14 15:02:51 +00:00
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int es7000_plat;
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2005-04-16 22:20:36 +00:00
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/*
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* GSI override for ES7000 platforms.
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*/
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static unsigned int base;
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static int
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es7000_rename_gsi(int ioapic, int gsi)
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{
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2005-10-30 22:59:38 +00:00
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if (es7000_plat == ES7000_ZORRO)
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return gsi;
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2005-04-16 22:20:36 +00:00
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if (!base) {
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int i;
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for (i = 0; i < nr_ioapics; i++)
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base += nr_ioapic_registers[i];
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}
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2008-07-25 09:17:33 +00:00
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if (!ioapic && (gsi < 16))
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2005-04-16 22:20:36 +00:00
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gsi += base;
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return gsi;
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}
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|
x86: fix wakeup_cpu with numaq/es7000, v2
Impact: fix secondary-CPU wakeup/init path with numaq and es7000
While looking at wakeup_secondary_cpu for WAKE_SECONDARY_VIA_NMI:
|#ifdef WAKE_SECONDARY_VIA_NMI
|/*
| * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
| * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
| * won't ... remember to clear down the APIC, etc later.
| */
|static int __devinit
|wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
|{
| unsigned long send_status, accept_status = 0;
| int maxlvt;
|...
| if (APIC_INTEGRATED(apic_version[phys_apicid])) {
| maxlvt = lapic_get_maxlvt();
I noticed that there is no warning about undefined phys_apicid...
because WAKE_SECONDARY_VIA_NMI and WAKE_SECONDARY_VIA_INIT can not be
defined at the same time. So NUMAQ is using wrong wakeup_secondary_cpu.
WAKE_SECONDARY_VIA_NMI, WAKE_SECONDARY_VIA_INIT and
WAKE_SECONDARY_VIA_MIP are variants of a weird and fragile
preprocessor-driven "HAL" mechanisms to specify the kind of secondary-CPU
wakeup strategy a given x86 kernel will use.
The vast majority of systems want to use INIT for secondary wakeup - NUMAQ
uses an NMI, (old-style-) ES7000 uses 'MIP' (a firmware driven in-memory
flag to let secondaries continue).
So convert these mechanisms to x86_quirks and add a
->wakeup_secondary_cpu() method to specify the rare exception
to the sane default.
Extend genapic accordingly as well, for 32-bit.
While looking further, I noticed that functions in wakecup.h for numaq
and es7000 are different to the default in mach_wakecpu.h - but smpboot.c
will only use default mach_wakecpu.h with smphook.h.
So we need to add mach_wakecpu.h for mach_generic, to properly support
numaq and es7000, and vectorize the following SMP init methods:
int trampoline_phys_low;
int trampoline_phys_high;
void (*wait_for_init_deassert)(atomic_t *deassert);
void (*smp_callin_clear_local_apic)(void);
void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
void (*inquire_remote_apic)(int apicid);
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-11-16 11:12:49 +00:00
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static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
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{
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unsigned long vect = 0, psaival = 0;
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if (psai == NULL)
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return -1;
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vect = ((unsigned long)__pa(eip)/0x1000) << 16;
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psaival = (0x1000000 | vect | cpu);
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while (*psai & 0x1000000)
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;
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*psai = psaival;
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return 0;
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}
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2008-11-17 23:19:53 +00:00
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2008-11-18 16:14:14 +00:00
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static void noop_wait_for_deassert(atomic_t *deassert_not_used)
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{
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}
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2008-11-17 23:19:53 +00:00
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static int __init es7000_update_genapic(void)
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{
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2009-01-27 23:14:11 +00:00
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apic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
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2008-11-17 23:19:53 +00:00
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2008-11-18 16:14:14 +00:00
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/* MPENTIUMIII */
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if (boot_cpu_data.x86 == 6 &&
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(boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) {
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es7000_update_genapic_to_cluster();
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2009-01-27 23:14:11 +00:00
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apic->wait_for_init_deassert = noop_wait_for_deassert;
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apic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
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2008-11-18 16:14:14 +00:00
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}
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2008-11-17 23:19:53 +00:00
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return 0;
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}
|
x86: fix wakeup_cpu with numaq/es7000, v2
Impact: fix secondary-CPU wakeup/init path with numaq and es7000
While looking at wakeup_secondary_cpu for WAKE_SECONDARY_VIA_NMI:
|#ifdef WAKE_SECONDARY_VIA_NMI
|/*
| * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
| * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
| * won't ... remember to clear down the APIC, etc later.
| */
|static int __devinit
|wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
|{
| unsigned long send_status, accept_status = 0;
| int maxlvt;
|...
| if (APIC_INTEGRATED(apic_version[phys_apicid])) {
| maxlvt = lapic_get_maxlvt();
I noticed that there is no warning about undefined phys_apicid...
because WAKE_SECONDARY_VIA_NMI and WAKE_SECONDARY_VIA_INIT can not be
defined at the same time. So NUMAQ is using wrong wakeup_secondary_cpu.
WAKE_SECONDARY_VIA_NMI, WAKE_SECONDARY_VIA_INIT and
WAKE_SECONDARY_VIA_MIP are variants of a weird and fragile
preprocessor-driven "HAL" mechanisms to specify the kind of secondary-CPU
wakeup strategy a given x86 kernel will use.
The vast majority of systems want to use INIT for secondary wakeup - NUMAQ
uses an NMI, (old-style-) ES7000 uses 'MIP' (a firmware driven in-memory
flag to let secondaries continue).
So convert these mechanisms to x86_quirks and add a
->wakeup_secondary_cpu() method to specify the rare exception
to the sane default.
Extend genapic accordingly as well, for 32-bit.
While looking further, I noticed that functions in wakecup.h for numaq
and es7000 are different to the default in mach_wakecpu.h - but smpboot.c
will only use default mach_wakecpu.h with smphook.h.
So we need to add mach_wakecpu.h for mach_generic, to properly support
numaq and es7000, and vectorize the following SMP init methods:
int trampoline_phys_low;
int trampoline_phys_high;
void (*wait_for_init_deassert)(atomic_t *deassert);
void (*smp_callin_clear_local_apic)(void);
void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
void (*inquire_remote_apic)(int apicid);
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-11-16 11:12:49 +00:00
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2005-09-03 22:56:34 +00:00
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void __init
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2005-10-30 22:59:38 +00:00
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setup_unisys(void)
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2005-09-03 22:56:34 +00:00
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{
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/*
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* Determine the generation of the ES7000 currently running.
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*
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* es7000_plat = 1 if the machine is a 5xx ES7000 box
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* es7000_plat = 2 if the machine is a x86_64 ES7000 box
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*
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*/
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if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
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2005-10-30 22:59:38 +00:00
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es7000_plat = ES7000_ZORRO;
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2005-09-03 22:56:34 +00:00
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else
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2005-10-30 22:59:38 +00:00
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es7000_plat = ES7000_CLASSIC;
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2005-09-03 22:56:34 +00:00
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ioapic_renumber_irq = es7000_rename_gsi;
|
2008-11-17 23:19:53 +00:00
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x86_quirks->update_genapic = es7000_update_genapic;
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2005-09-03 22:56:34 +00:00
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}
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2005-04-16 22:20:36 +00:00
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/*
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* Parse the OEM Table
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*/
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int __init
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2005-09-03 22:56:34 +00:00
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parse_unisys_oem (char *oemptr)
|
2005-04-16 22:20:36 +00:00
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{
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int i;
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int success = 0;
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unsigned char type, size;
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unsigned long val;
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char *tp = NULL;
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struct psai *psaip = NULL;
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struct mip_reg_info *mi;
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struct mip_reg *host, *mip;
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tp = oemptr;
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tp += 8;
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2005-09-03 22:56:34 +00:00
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for (i=0; i <= 6; i++) {
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2005-04-16 22:20:36 +00:00
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type = *tp++;
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size = *tp++;
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tp -= 2;
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switch (type) {
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case MIP_REG:
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|
|
mi = (struct mip_reg_info *)tp;
|
|
|
|
val = MIP_RD_LO(mi->host_reg);
|
|
|
|
host_addr = val;
|
|
|
|
host = (struct mip_reg *)val;
|
|
|
|
host_reg = __va(host);
|
|
|
|
val = MIP_RD_LO(mi->mip_reg);
|
|
|
|
mip_port = MIP_PORT(mi->mip_info);
|
|
|
|
mip_addr = val;
|
|
|
|
mip = (struct mip_reg *)val;
|
|
|
|
mip_reg = __va(mip);
|
2008-07-21 19:58:34 +00:00
|
|
|
pr_debug("es7000_mipcfg: host_reg = 0x%lx \n",
|
|
|
|
(unsigned long)host_reg);
|
|
|
|
pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n",
|
|
|
|
(unsigned long)mip_reg);
|
2005-04-16 22:20:36 +00:00
|
|
|
success++;
|
|
|
|
break;
|
|
|
|
case MIP_PSAI_REG:
|
|
|
|
psaip = (struct psai *)tp;
|
|
|
|
if (tp != NULL) {
|
|
|
|
if (psaip->addr)
|
|
|
|
psai = __va(psaip->addr);
|
|
|
|
else
|
|
|
|
psai = NULL;
|
|
|
|
success++;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
tp += size;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (success < 2) {
|
2005-10-30 22:59:38 +00:00
|
|
|
es7000_plat = NON_UNISYS;
|
2005-09-03 22:56:34 +00:00
|
|
|
} else
|
|
|
|
setup_unisys();
|
2005-04-16 22:20:36 +00:00
|
|
|
return es7000_plat;
|
|
|
|
}
|
|
|
|
|
2006-03-23 10:59:36 +00:00
|
|
|
#ifdef CONFIG_ACPI
|
2008-09-14 09:33:14 +00:00
|
|
|
static unsigned long oem_addrX;
|
|
|
|
static unsigned long oem_size;
|
|
|
|
int __init find_unisys_acpi_oem_table(unsigned long *oem_addr)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
2007-02-02 16:48:22 +00:00
|
|
|
struct acpi_table_header *header = NULL;
|
|
|
|
int i = 0;
|
2008-09-14 09:33:14 +00:00
|
|
|
|
2008-11-16 08:49:31 +00:00
|
|
|
while (ACPI_SUCCESS(acpi_get_table("OEM1", i++, &header))) {
|
2007-02-02 16:48:22 +00:00
|
|
|
if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) {
|
|
|
|
struct oem_table *t = (struct oem_table *)header;
|
2008-09-14 09:33:14 +00:00
|
|
|
|
|
|
|
oem_addrX = t->OEMTableAddr;
|
|
|
|
oem_size = t->OEMTableSize;
|
|
|
|
|
|
|
|
*oem_addr = (unsigned long)__acpi_map_table(oem_addrX,
|
|
|
|
oem_size);
|
2007-02-02 16:48:22 +00:00
|
|
|
return 0;
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
return -1;
|
|
|
|
}
|
2008-09-14 09:33:14 +00:00
|
|
|
|
|
|
|
void __init unmap_unisys_acpi_oem_table(unsigned long oem_addr)
|
|
|
|
{
|
|
|
|
}
|
2006-03-23 10:59:36 +00:00
|
|
|
#endif
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
static void
|
|
|
|
es7000_spin(int n)
|
|
|
|
{
|
|
|
|
int i = 0;
|
|
|
|
|
|
|
|
while (i++ < n)
|
|
|
|
rep_nop();
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __init
|
|
|
|
es7000_mip_write(struct mip_reg *mip_reg)
|
|
|
|
{
|
|
|
|
int status = 0;
|
|
|
|
int spin;
|
|
|
|
|
|
|
|
spin = MIP_SPIN;
|
|
|
|
while (((unsigned long long)host_reg->off_38 &
|
|
|
|
(unsigned long long)MIP_VALID) != 0) {
|
|
|
|
if (--spin <= 0) {
|
|
|
|
printk("es7000_mip_write: Timeout waiting for Host Valid Flag");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
es7000_spin(MIP_SPIN);
|
|
|
|
}
|
|
|
|
|
|
|
|
memcpy(host_reg, mip_reg, sizeof(struct mip_reg));
|
|
|
|
outb(1, mip_port);
|
|
|
|
|
|
|
|
spin = MIP_SPIN;
|
|
|
|
|
|
|
|
while (((unsigned long long)mip_reg->off_38 &
|
|
|
|
(unsigned long long)MIP_VALID) == 0) {
|
|
|
|
if (--spin <= 0) {
|
|
|
|
printk("es7000_mip_write: Timeout waiting for MIP Valid Flag");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
es7000_spin(MIP_SPIN);
|
|
|
|
}
|
|
|
|
|
|
|
|
status = ((unsigned long long)mip_reg->off_0 &
|
|
|
|
(unsigned long long)0xffff0000000000ULL) >> 48;
|
|
|
|
mip_reg->off_38 = ((unsigned long long)mip_reg->off_38 &
|
|
|
|
(unsigned long long)~MIP_VALID);
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
2009-01-28 12:15:06 +00:00
|
|
|
void __init es7000_enable_apic_mode(void)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
2009-01-28 12:15:06 +00:00
|
|
|
struct mip_reg es7000_mip_reg;
|
|
|
|
int mip_status;
|
|
|
|
|
|
|
|
if (!es7000_plat)
|
2005-04-16 22:20:36 +00:00
|
|
|
return;
|
2009-01-28 12:15:06 +00:00
|
|
|
|
|
|
|
printk("ES7000: Enabling APIC mode.\n");
|
|
|
|
memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
|
|
|
|
es7000_mip_reg.off_0 = MIP_SW_APIC;
|
|
|
|
es7000_mip_reg.off_38 = MIP_VALID;
|
|
|
|
|
|
|
|
while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0) {
|
|
|
|
printk("es7000_enable_apic_mode: command failed, status = %x\n",
|
|
|
|
mip_status);
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
}
|