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148 lines
3.4 KiB
C
148 lines
3.4 KiB
C
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2019 Linaro, Ltd. <ard.biesheuvel@linaro.org>
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*/
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#ifdef CONFIG_ARM64
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#include <asm/neon-intrinsics.h>
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#define AES_ROUND "aese %0.16b, %1.16b \n\t aesmc %0.16b, %0.16b"
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#else
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#include <arm_neon.h>
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#define AES_ROUND "aese.8 %q0, %q1 \n\t aesmc.8 %q0, %q0"
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#endif
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#define AEGIS_BLOCK_SIZE 16
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#include <stddef.h>
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void *memcpy(void *dest, const void *src, size_t n);
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void *memset(void *s, int c, size_t n);
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struct aegis128_state {
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uint8x16_t v[5];
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};
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static struct aegis128_state aegis128_load_state_neon(const void *state)
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{
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return (struct aegis128_state){ {
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vld1q_u8(state),
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vld1q_u8(state + 16),
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vld1q_u8(state + 32),
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vld1q_u8(state + 48),
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vld1q_u8(state + 64)
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} };
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}
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static void aegis128_save_state_neon(struct aegis128_state st, void *state)
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{
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vst1q_u8(state, st.v[0]);
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vst1q_u8(state + 16, st.v[1]);
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vst1q_u8(state + 32, st.v[2]);
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vst1q_u8(state + 48, st.v[3]);
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vst1q_u8(state + 64, st.v[4]);
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}
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static inline __attribute__((always_inline))
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uint8x16_t aegis_aes_round(uint8x16_t w)
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{
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uint8x16_t z = {};
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/*
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* We use inline asm here instead of the vaeseq_u8/vaesmcq_u8 intrinsics
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* to force the compiler to issue the aese/aesmc instructions in pairs.
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* This is much faster on many cores, where the instruction pair can
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* execute in a single cycle.
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*/
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asm(AES_ROUND : "+w"(w) : "w"(z));
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return w;
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}
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static inline __attribute__((always_inline))
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struct aegis128_state aegis128_update_neon(struct aegis128_state st,
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uint8x16_t m)
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{
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m ^= aegis_aes_round(st.v[4]);
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st.v[4] ^= aegis_aes_round(st.v[3]);
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st.v[3] ^= aegis_aes_round(st.v[2]);
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st.v[2] ^= aegis_aes_round(st.v[1]);
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st.v[1] ^= aegis_aes_round(st.v[0]);
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st.v[0] ^= m;
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return st;
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}
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void crypto_aegis128_update_neon(void *state, const void *msg)
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{
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struct aegis128_state st = aegis128_load_state_neon(state);
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st = aegis128_update_neon(st, vld1q_u8(msg));
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aegis128_save_state_neon(st, state);
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}
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void crypto_aegis128_encrypt_chunk_neon(void *state, void *dst, const void *src,
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unsigned int size)
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{
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struct aegis128_state st = aegis128_load_state_neon(state);
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uint8x16_t msg;
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while (size >= AEGIS_BLOCK_SIZE) {
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uint8x16_t s = st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4];
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msg = vld1q_u8(src);
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st = aegis128_update_neon(st, msg);
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vst1q_u8(dst, msg ^ s);
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size -= AEGIS_BLOCK_SIZE;
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src += AEGIS_BLOCK_SIZE;
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dst += AEGIS_BLOCK_SIZE;
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}
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if (size > 0) {
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uint8x16_t s = st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4];
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uint8_t buf[AEGIS_BLOCK_SIZE] = {};
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memcpy(buf, src, size);
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msg = vld1q_u8(buf);
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st = aegis128_update_neon(st, msg);
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vst1q_u8(buf, msg ^ s);
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memcpy(dst, buf, size);
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}
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aegis128_save_state_neon(st, state);
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}
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void crypto_aegis128_decrypt_chunk_neon(void *state, void *dst, const void *src,
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unsigned int size)
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{
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struct aegis128_state st = aegis128_load_state_neon(state);
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uint8x16_t msg;
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while (size >= AEGIS_BLOCK_SIZE) {
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msg = vld1q_u8(src) ^ st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4];
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st = aegis128_update_neon(st, msg);
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vst1q_u8(dst, msg);
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size -= AEGIS_BLOCK_SIZE;
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src += AEGIS_BLOCK_SIZE;
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dst += AEGIS_BLOCK_SIZE;
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}
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if (size > 0) {
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uint8x16_t s = st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4];
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uint8_t buf[AEGIS_BLOCK_SIZE];
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vst1q_u8(buf, s);
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memcpy(buf, src, size);
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msg = vld1q_u8(buf) ^ s;
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vst1q_u8(buf, msg);
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memcpy(dst, buf, size);
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st = aegis128_update_neon(st, msg);
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}
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aegis128_save_state_neon(st, state);
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}
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