2024-06-10 08:57:34 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020 MediaTek Inc.
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* Copyright (c) 2024 Collabora Ltd.
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* AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/of_regulator.h>
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#include <linux/soc/mediatek/dvfsrc.h>
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enum dvfsrc_regulator_id {
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DVFSRC_ID_VCORE,
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DVFSRC_ID_VSCP,
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DVFSRC_ID_MAX
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};
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struct dvfsrc_regulator_pdata {
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const struct regulator_desc *descs;
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u32 size;
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};
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#define MTK_DVFSRC_VREG(match, _name, _volt_table) \
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{ \
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.name = match, \
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.of_match = match, \
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.ops = &dvfsrc_vcore_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = DVFSRC_ID_##_name, \
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.owner = THIS_MODULE, \
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.n_voltages = ARRAY_SIZE(_volt_table), \
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.volt_table = _volt_table, \
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}
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static inline struct device *to_dvfs_regulator_dev(struct regulator_dev *rdev)
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{
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return rdev_get_dev(rdev)->parent;
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}
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static inline struct device *to_dvfsrc_dev(struct regulator_dev *rdev)
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{
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return to_dvfs_regulator_dev(rdev)->parent;
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}
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static int dvfsrc_get_cmd(int rdev_id, enum mtk_dvfsrc_cmd *cmd)
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{
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switch (rdev_id) {
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case DVFSRC_ID_VCORE:
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*cmd = MTK_DVFSRC_CMD_VCORE_LEVEL;
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break;
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case DVFSRC_ID_VSCP:
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*cmd = MTK_DVFSRC_CMD_VSCP_LEVEL;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int dvfsrc_set_voltage_sel(struct regulator_dev *rdev,
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unsigned int selector)
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{
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struct device *dvfsrc_dev = to_dvfsrc_dev(rdev);
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enum mtk_dvfsrc_cmd req_cmd;
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int id = rdev_get_id(rdev);
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int ret;
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ret = dvfsrc_get_cmd(id, &req_cmd);
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if (ret)
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return ret;
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return mtk_dvfsrc_send_request(dvfsrc_dev, req_cmd, selector);
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}
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static int dvfsrc_get_voltage_sel(struct regulator_dev *rdev)
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{
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struct device *dvfsrc_dev = to_dvfsrc_dev(rdev);
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enum mtk_dvfsrc_cmd query_cmd;
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int id = rdev_get_id(rdev);
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int val, ret;
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ret = dvfsrc_get_cmd(id, &query_cmd);
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if (ret)
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return ret;
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ret = mtk_dvfsrc_query_info(dvfsrc_dev, query_cmd, &val);
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if (ret)
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return ret;
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return val;
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}
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static const struct regulator_ops dvfsrc_vcore_ops = {
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.list_voltage = regulator_list_voltage_table,
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.get_voltage_sel = dvfsrc_get_voltage_sel,
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.set_voltage_sel = dvfsrc_set_voltage_sel,
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};
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static const unsigned int mt6873_voltages[] = {
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575000,
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600000,
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650000,
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725000,
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};
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2024-09-09 13:51:22 +00:00
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static const struct regulator_desc mt6873_regulators[] = {
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MTK_DVFSRC_VREG("dvfsrc-vcore", VCORE, mt6873_voltages),
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MTK_DVFSRC_VREG("dvfsrc-vscp", VSCP, mt6873_voltages),
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};
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static const struct dvfsrc_regulator_pdata mt6873_data = {
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.descs = mt6873_regulators,
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.size = ARRAY_SIZE(mt6873_regulators),
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};
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static const unsigned int mt8183_voltages[] = {
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725000,
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800000,
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};
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static const struct regulator_desc mt8183_regulators[] = {
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MTK_DVFSRC_VREG("dvfsrc-vcore", VCORE, mt8183_voltages),
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};
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static const struct dvfsrc_regulator_pdata mt8183_data = {
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.descs = mt8183_regulators,
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.size = ARRAY_SIZE(mt8183_regulators),
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};
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static const unsigned int mt8195_voltages[] = {
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550000,
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600000,
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650000,
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750000,
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};
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static const struct regulator_desc mt8195_regulators[] = {
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MTK_DVFSRC_VREG("dvfsrc-vcore", VCORE, mt8195_voltages),
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MTK_DVFSRC_VREG("dvfsrc-vscp", VSCP, mt8195_voltages),
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};
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static const struct dvfsrc_regulator_pdata mt8195_data = {
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.descs = mt8195_regulators,
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.size = ARRAY_SIZE(mt8195_regulators),
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};
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static int dvfsrc_vcore_regulator_probe(struct platform_device *pdev)
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{
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struct regulator_config config = { .dev = &pdev->dev };
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const struct dvfsrc_regulator_pdata *pdata;
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int i;
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pdata = device_get_match_data(&pdev->dev);
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if (!pdata)
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return -EINVAL;
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for (i = 0; i < pdata->size; i++) {
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const struct regulator_desc *vrdesc = &pdata->descs[i];
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struct regulator_dev *rdev;
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rdev = devm_regulator_register(&pdev->dev, vrdesc, &config);
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if (IS_ERR(rdev))
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return dev_err_probe(&pdev->dev, PTR_ERR(rdev),
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"failed to register %s\n", vrdesc->name);
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}
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return 0;
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}
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static const struct of_device_id mtk_dvfsrc_regulator_match[] = {
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{ .compatible = "mediatek,mt6873-dvfsrc-regulator", .data = &mt6873_data },
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{ .compatible = "mediatek,mt8183-dvfsrc-regulator", .data = &mt8183_data },
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{ .compatible = "mediatek,mt8192-dvfsrc-regulator", .data = &mt6873_data },
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{ .compatible = "mediatek,mt8195-dvfsrc-regulator", .data = &mt8195_data },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, mtk_dvfsrc_regulator_match);
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static struct platform_driver mtk_dvfsrc_regulator_driver = {
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.driver = {
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.name = "mtk-dvfsrc-regulator",
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.of_match_table = mtk_dvfsrc_regulator_match,
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.probe_type = PROBE_PREFER_ASYNCHRONOUS,
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},
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.probe = dvfsrc_vcore_regulator_probe,
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};
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module_platform_driver(mtk_dvfsrc_regulator_driver);
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MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>");
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MODULE_AUTHOR("Arvin wang <arvin.wang@mediatek.com>");
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MODULE_DESCRIPTION("MediaTek DVFS Resource Collector Regulator driver");
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MODULE_LICENSE("GPL");
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