2018-09-07 01:43:23 +00:00
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// SPDX-License-Identifier: GPL-2.0
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2010-12-14 07:57:11 +00:00
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/*
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* SMP support for R-Mobile / SH-Mobile - sh73a0 portion
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*
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* Copyright (C) 2010 Magnus Damm
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* Copyright (C) 2010 Takashi Yoshii
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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2011-09-08 12:15:22 +00:00
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#include <linux/delay.h>
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2014-06-20 16:53:09 +00:00
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2013-07-31 07:07:59 +00:00
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#include <asm/smp_plat.h>
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2014-06-20 16:53:09 +00:00
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2014-06-17 07:47:37 +00:00
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#include "common.h"
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2014-06-20 16:53:09 +00:00
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#include "sh73a0.h"
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2010-12-14 07:57:11 +00:00
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2020-11-17 10:30:21 +00:00
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#define CPG_BASE2 0xe6151000
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#define WUPCR 0x10 /* System-CPU Wake Up Control Register */
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#define SRESCR 0x18 /* System-CPU Software Reset Control Register */
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#define PSTR 0x40 /* System-CPU Power Status Register */
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#define SYSC_BASE 0xe6180000
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#define SBAR 0x20 /* SYS Boot Address Register */
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#define AP_BASE 0xe6f10000
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#define APARMBAREA 0x20 /* Address Translation Area Register */
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2010-12-14 07:57:11 +00:00
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2013-02-18 13:47:07 +00:00
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#define SH73A0_SCU_BASE 0xf0000000
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2013-02-13 13:46:38 +00:00
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2013-06-17 19:43:14 +00:00
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static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
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2010-12-14 07:57:11 +00:00
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{
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2013-07-31 07:07:21 +00:00
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unsigned int lcpu = cpu_logical_map(cpu);
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2020-11-17 10:30:21 +00:00
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void __iomem *cpg2 = ioremap(CPG_BASE2, PAGE_SIZE);
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2013-07-31 07:07:21 +00:00
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2020-11-17 14:24:47 +00:00
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if (((readl(cpg2 + PSTR) >> (4 * lcpu)) & 3) == 3)
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writel(1 << lcpu, cpg2 + WUPCR); /* wake up */
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2010-12-14 07:57:11 +00:00
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else
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2020-11-17 14:24:47 +00:00
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writel(1 << lcpu, cpg2 + SRESCR); /* reset */
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2020-11-17 10:30:21 +00:00
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iounmap(cpg2);
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2010-12-14 07:57:11 +00:00
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return 0;
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}
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2011-09-08 12:15:22 +00:00
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static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
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2010-12-14 07:57:11 +00:00
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{
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2023-08-31 11:17:47 +00:00
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void __iomem *ap, *sysc;
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if (!request_mem_region(0, SZ_4K, "Boot Area")) {
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pr_err("Failed to request boot area\n");
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return;
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}
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2020-11-17 10:30:21 +00:00
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2013-07-31 07:07:21 +00:00
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/* Map the reset vector (in headsmp.S) */
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2023-08-31 11:17:47 +00:00
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ap = ioremap(AP_BASE, PAGE_SIZE);
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sysc = ioremap(SYSC_BASE, PAGE_SIZE);
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2020-11-17 14:24:47 +00:00
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writel(0, ap + APARMBAREA); /* 4k */
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writel(__pa(shmobile_boot_vector), sysc + SBAR);
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2020-11-17 10:30:21 +00:00
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iounmap(sysc);
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iounmap(ap);
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2010-12-14 07:57:11 +00:00
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2013-07-31 07:07:21 +00:00
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/* setup sh73a0 specific SCU bits */
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ARM: shmobile: Consolidate SCU mapping code
Currently the SCU registers are mapped in SoC-specific code, using
different methods, all involving the static mapping set up from
machine_desc.map_io():
- On emev2, a static (non-identity) mapping is used, with ioremap().
As the static mapping uses the MT_DEVICE type, ioremap() reuses it,
and the returned virtual address is suitable for passing to
shmobile_smp_hook(),
- On sh73a0 and r8a7779, a static identity mapping is used, with the
legacy IOMEM() macro.
As the static mapping uses the MT_DEVICE_NONSHARED type, replacing
IOMEM() by ioremap() would create a new mapping, whose virtual
address cannot be passed to shmobile_smp_hook().
Move the mapping of the SCU registers from SoC-specific code to common
code, always using ioremap(). To work in the absence of a static
mapping, this requires passing the physical SCU base address to
shmobile_smp_hook().
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-28 15:13:32 +00:00
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shmobile_smp_scu_prepare_cpus(SH73A0_SCU_BASE, max_cpus);
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2010-12-14 07:57:11 +00:00
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}
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2011-09-08 12:15:22 +00:00
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2015-11-15 01:39:53 +00:00
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const struct smp_operations sh73a0_smp_ops __initconst = {
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2011-09-08 12:15:22 +00:00
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.smp_prepare_cpus = sh73a0_smp_prepare_cpus,
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.smp_boot_secondary = sh73a0_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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2015-07-28 23:34:48 +00:00
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.cpu_can_disable = shmobile_smp_cpu_can_disable,
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2013-07-31 07:07:59 +00:00
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.cpu_die = shmobile_smp_scu_cpu_die,
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.cpu_kill = shmobile_smp_scu_cpu_kill,
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2011-09-08 12:15:22 +00:00
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#endif
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};
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