2023-05-15 07:10:26 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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2024-06-17 12:13:18 +00:00
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// Copyright(c) 2023 Intel Corporation
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2023-05-15 07:10:26 +00:00
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#include <linux/acpi.h>
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#include <linux/debugfs.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/pm_runtime.h>
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#include <linux/soundwire/sdw.h>
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#include <linux/soundwire/sdw_intel.h>
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#include <linux/soundwire/sdw_registers.h>
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#include "bus.h"
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#include "cadence_master.h"
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#include "intel.h"
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/*
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* debugfs
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*/
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#ifdef CONFIG_DEBUG_FS
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#define RD_BUF (2 * PAGE_SIZE)
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static ssize_t intel_sprintf(void __iomem *mem, bool l,
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char *buf, size_t pos, unsigned int reg)
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{
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int value;
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if (l)
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value = intel_readl(mem, reg);
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else
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value = intel_readw(mem, reg);
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return scnprintf(buf + pos, RD_BUF - pos, "%4x\t%4x\n", reg, value);
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}
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static int intel_reg_show(struct seq_file *s_file, void *data)
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{
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struct sdw_intel *sdw = s_file->private;
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void __iomem *s = sdw->link_res->shim;
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void __iomem *vs_s = sdw->link_res->shim_vs;
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ssize_t ret;
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u32 pcm_cap;
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int pcm_bd;
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char *buf;
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int j;
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buf = kzalloc(RD_BUF, GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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ret = scnprintf(buf, RD_BUF, "Register Value\n");
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ret += scnprintf(buf + ret, RD_BUF - ret, "\nShim\n");
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ret += intel_sprintf(s, true, buf, ret, SDW_SHIM2_LECAP);
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ret += intel_sprintf(s, false, buf, ret, SDW_SHIM2_PCMSCAP);
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pcm_cap = intel_readw(s, SDW_SHIM2_PCMSCAP);
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pcm_bd = FIELD_GET(SDW_SHIM2_PCMSCAP_BSS, pcm_cap);
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for (j = 0; j < pcm_bd; j++) {
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ret += intel_sprintf(s, false, buf, ret,
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SDW_SHIM2_PCMSYCHM(j));
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ret += intel_sprintf(s, false, buf, ret,
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SDW_SHIM2_PCMSYCHC(j));
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}
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ret += scnprintf(buf + ret, RD_BUF - ret, "\nVS CLK controls\n");
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ret += intel_sprintf(vs_s, true, buf, ret, SDW_SHIM2_INTEL_VS_LVSCTL);
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ret += scnprintf(buf + ret, RD_BUF - ret, "\nVS Wake registers\n");
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ret += intel_sprintf(vs_s, false, buf, ret, SDW_SHIM2_INTEL_VS_WAKEEN);
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ret += intel_sprintf(vs_s, false, buf, ret, SDW_SHIM2_INTEL_VS_WAKESTS);
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ret += scnprintf(buf + ret, RD_BUF - ret, "\nVS IOCTL, ACTMCTL\n");
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ret += intel_sprintf(vs_s, false, buf, ret, SDW_SHIM2_INTEL_VS_IOCTL);
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ret += intel_sprintf(vs_s, false, buf, ret, SDW_SHIM2_INTEL_VS_ACTMCTL);
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seq_printf(s_file, "%s", buf);
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kfree(buf);
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return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(intel_reg);
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static int intel_set_m_datamode(void *data, u64 value)
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{
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struct sdw_intel *sdw = data;
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struct sdw_bus *bus = &sdw->cdns.bus;
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if (value > SDW_PORT_DATA_MODE_STATIC_1)
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return -EINVAL;
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/* Userspace changed the hardware state behind the kernel's back */
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add_taint(TAINT_USER, LOCKDEP_STILL_OK);
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bus->params.m_data_mode = value;
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return 0;
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}
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DEFINE_DEBUGFS_ATTRIBUTE(intel_set_m_datamode_fops, NULL,
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intel_set_m_datamode, "%llu\n");
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static int intel_set_s_datamode(void *data, u64 value)
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{
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struct sdw_intel *sdw = data;
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struct sdw_bus *bus = &sdw->cdns.bus;
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if (value > SDW_PORT_DATA_MODE_STATIC_1)
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return -EINVAL;
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/* Userspace changed the hardware state behind the kernel's back */
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add_taint(TAINT_USER, LOCKDEP_STILL_OK);
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bus->params.s_data_mode = value;
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return 0;
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}
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DEFINE_DEBUGFS_ATTRIBUTE(intel_set_s_datamode_fops, NULL,
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intel_set_s_datamode, "%llu\n");
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void intel_ace2x_debugfs_init(struct sdw_intel *sdw)
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{
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struct dentry *root = sdw->cdns.bus.debugfs;
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if (!root)
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return;
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sdw->debugfs = debugfs_create_dir("intel-sdw", root);
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debugfs_create_file("intel-registers", 0400, sdw->debugfs, sdw,
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&intel_reg_fops);
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debugfs_create_file("intel-m-datamode", 0200, sdw->debugfs, sdw,
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&intel_set_m_datamode_fops);
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debugfs_create_file("intel-s-datamode", 0200, sdw->debugfs, sdw,
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&intel_set_s_datamode_fops);
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sdw_cdns_debugfs_init(&sdw->cdns, sdw->debugfs);
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}
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void intel_ace2x_debugfs_exit(struct sdw_intel *sdw)
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{
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debugfs_remove_recursive(sdw->debugfs);
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}
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#endif /* CONFIG_DEBUG_FS */
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